Merge r203608 from amd64/i386:
In syscall(), reread syscall number and arguments after ptracestop(),
if debugger modified anything in the process environment.
- Zero the MSI/MSI-X queue argument, otherwise mtx_init(9) can panic
indicating an already initialized lock.
- Check for an empty MSI/MSI-X queue entry before asserting that we have
received a MSI/MSI-X message in order to not panic in case of stray MSI/
MSI-X queue interrupts which may happen in case of using an interrupt
handler rather than a filter.
Add a facility for associating optional descriptions with active interrupt
handlers. This is primarily intended as a way to allow devices that use
multiple interrupts (e.g. MSI) to meaningfully distinguish the various
interrupt handlers.
- Add a new BUS_DESCRIBE_INTR() method to the bus interface to associate
a description with an active interrupt handler setup by BUS_SETUP_INTR.
It has a default method (bus_generic_describe_intr()) which simply passes
the request up to the parent device.
- Add a bus_describe_intr() wrapper around BUS_DESCRIBE_INTR() that supports
printf(9) style formatting using var args.
- Reserve MAXCOMLEN bytes in the intr_handler structure to hold the name of
an interrupt handler and copy the name passed to intr_event_add_handler()
into that buffer instead of just saving the pointer to the name.
- Add a new intr_event_describe_handler() which appends a description string
to an interrupt handler's name.
- Implement support for interrupt descriptions on amd64, i386, and sparc64 by
having the nexus(4) driver supply a custom bus_describe_intr method that
invokes a new intr_describe() MD routine which in turn looks up the
associated interrupt event and invokes intr_event_describe_handler().
Add a driver for the `Fire' JBus to PCIe bridges found in at least
the Sun Fire V215/V245 and Sun Ultra 25/45 machines. This driver also
already includes all the code to support the `Oberon' Uranus to PCIe
bridges found in the Fujitsu-Siemens based Mx000 machines but due to
lack of access to such a system for testing, probing of these bridges
is currently disabled.
Unfortunately, the event queue mechanism of these bridges for MSIs/
MSI-Xs matches our current MD and MI interrupt frameworks like square
pegs fit into round holes so for now we are generous and use one event
queue per MSI, which limits us to 35 MSIs/MSI-Xs per Host-PCIe-bridge
(we use one event queue for the PCIe error messages). This seems
tolerable as long as most devices just use one MSI/MSI-X anyway.
Adding knowledge about MSIs/MSI-Xs to the MD interrupt code should
allow us to decouple the 1:1 mapping at the cost of no longer being
able to bind MSIs/MSI-Xs to specific CPUs as we currently have no
reliable way to quiesce a device during the transition of its MSIs/
MSI-Xs to another event queue. This would still require the problem
of interrupt storms generated by devices which have no one-shot
behavior or can't/don't mask interrupts while the filter/handler is
executed (like the older PCIe NICs supported by bge(4)) to be solved
though.
- Demapping unused kernel TLB slots has proven to work reliably so move
the associated debugging under bootverbose.
- Remove freebsd4_sigreturn(); given that FreeBSD 4 didn't supported
sparc64 this only ever served as a transition aid prior to FreeBSD
5.0 and is unused by default since COMPAT_FREEBSD4 was removed from
GENERIC in r143072 nearly 5 years ago.
- Preserve the PROM IOMMU in order to allow OFW drivers to continue to
work.
- Sanity check the parameters passed to the implementations of the
pcib_{read,write}_config() methods. Using illegal values can cause
no real harm but it doesn't hurt to avoid unnecessary data error
traps requiring to flush and re-enable the level 1 caches.
- Prefer i and j over i and n for temporary integer variables.
- Wrap/shorten too long lines.
- Remove a redundant variable and an unnecessary cast in schizo(4).
- Take advantage of bus_{read,write}_*(9).
- Set dow = -1 in mk48txx_gettime() because some drivers (for example
the NetBSD and OpenBSD mk48txx(4)) don't set it correctly.
so requests may bubble up to a host-PCI bridge driver.
- Distinguish between PCI and PCIe bridges in the device description
so it's a bit easier to follow what hangs off of what in the dmesg.
Unfortunately we can't also tell PCI and PCI-X apart based on the
information provided in the OFW device tree.
- Add quirk handling for the ALi M5249 found in Fire-based machines
which are used as a PCIe-PCIe bridge there. These are obviously
subtractive decoding as as they have a PCI-ISA bridge on their
secondary side (and likewise don't include the ISA I/O range in
their bridge decode) but don't indicate this via the class code.
Given that this quirk isn't likely to apply to all ALi M5249 and
I have no datasheet for these chips so I could implement a check
using the chip specific bits enabling subtractive decoding this
quirk handling is added to the MD code rather than the MI one.
- Don't check for a valid interrupt controller on every interrupt
in intr_execute_handlers(). If we managed to get here without an
associated interrupt controller we have way bigger problems.
While at it predict stray vector interrupts as false as they are
rather unlikely.
- Don't blindly call the clear function of an interrupt controller
when adding a handler in inthand_add() as interrupt controllers
like the one driven by upa(4) are auto-clearing and thus provide
NULL instead.
- By re-arranging the code in OF_decode_addr() somewhat and accepting
a bit of a detour we can just iterate through the banks array instead
of having to calculate every offset. This change is inspired by the
powerpc version of this function.
- Add support for the JBus to EBus bridges which hang off of nexus(4).
- Add support for the IOMMUs of Fire JBus to PCIe and Oberon Uranus
to PCIe bridges.
- Add support for talking the PROM mappings over to the kernel IOTSB
just like we do with the kernel TSB in order to allow OFW drivers
to continue to work.
- Change some members, parameters and variables to unsigned where
more appropriate.
- Add quirk handling for ALi M5229, mainly setting the magic "force
enable IDE I/O" bit which prevents data access traps with revision
0xc8 in Fire-based machines when pci(4) enables PCIM_CMD_PORTEN.
- Like for sun4v also don't add the PCI side of host-PCIe bridges to
the bus on sun4u as they don't have configuration space implement
there either.
Don't probe the bq4802 variant found in Ultra 25 and 45 for now as
this chip isn't MC146818 compatible and requires different handlers
(but which I can't test due to lack of such hardware).
Don't use an out register to hold the vector number across the call
of the interrupt handler in intr_fast() as the handler might clobber
it (no in-tree handler currently does but an upcoming one will).
While at it, tidy the register usage in the interrupt counting code.
- Add support for the JBus to EBus bridges which hang off of nexus(4)
and are found in sun4u and sun4v machines based on the Fire ASIC.
- Initialize the configuration space of the PCI to EBus variant the
same way as OpenSolaris does.
- Add macros for the states of the interrupt clear registers.
- Change INTMAP_VEC() to take an INO as its second argument rather
than an INR. The former is what I actually intended with this
macro and how it's currently used.
Enroll these drivers in multipass probing. The motivation behind this
is that the JBus to EBus bridges share the interrupt controller of a
sibling JBus to PCIe bridge (at least as far as the OFW device tree
is concerned, in reality they are part of the same chip) so we have to
probe and attach the latter first. That happens to be also the case
due to the fact that the JBus to PCIe bridges appear first in the OFW
device tree but it doesn't hurt to ensure the right order.
Factor out the duplicated macro for the device type used in the
OFW device tree for PCI bridges and add a new one for PCI Express.
While at it, take advantage of the former for the rman(9) work-
around in jbusppm(4).
Use kern_sigprocmask() instead of direct manipulation of td_sigmask to
reschedule newly blocked signals.
MFC r198590:
Trapsignal() calls kern_sigprocmask() when delivering catched signal
with proc lock held.
MFC r198670:
For trapsignal() and postsig(), kern_sigprocmask() is called with
both process lock and curproc->p_sigacts->ps_mtx locked. Prevent lock
recursion on ps_mtx in reschedule_signals().
Make sure that the primary native brandinfo always gets added
first and the native ia32 compat as middle (before other things).
o(ld)brandinfo as well as third party like linux, kfreebsd, etc.
stays on SI_ORDER_ANY coming last.
The reason for this is only to make sure that even in case we would
overflow the MAX_BRANDS sized array, the native FreeBSD brandinfo
would still be there and the system would be operational.
Reviewed by: kib
Unroll copying of the registers in {g,s}et_mcontext() and limit it
to the set actually restored by tl0_ret() instead of using the whole
trapframe. Additionally skip %g7 as that register is used as the
userland TLS pointer.
PR: 140523
There are known issues with this driver that are beyond what can be
fixed for 8.0-RELEASE and the bugs can cause boot failure on some systems.
It's not clear if it impacts all systems and there is interest in getting
the problem fixed so for now just comment it out instead of remove it.
Commit straight to stable/8, this is an 8.0-RELEASE issue. Head was left
alone so work on it can continue there.
Reviewed by: Primary misc. architecture maintainers (marcel, marius)
Define architectural load bases for PIE binaries.
MFC r198203 (by marius):
Change load base for sparc to match default gcc memory layout model.
Approved by: re (kensmith)
