Commit Graph

3 Commits

Author SHA1 Message Date
Andrew Turner
9346e9130d Return the struct intr_pic pointer from intr_pic_register. This will be
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-18 15:05:44 +00:00
Svatopluk Kraus
cd642c88a1 INTRNG - redefine struct intr_map_data to avoid headers pollution. Each
struct associated with some type defined in enum intr_map_data_type
must have struct intr_map_data on the top of its own definition now.
When such structs are used, correct type and size must be filled in.

There are three such structs defined in sys/intr.h now. Their
definitions should be moved to corresponding headers by follow-up
commits.

While this change was propagated to all INTRNG like PICs,
pic_map_intr() method implementations were corrected on some places.
For this specific method, it's ensured by a caller that the 'data'
argument passed to this method is never NULL. Also, the return error
values were standardized there.
2016-05-05 13:31:19 +00:00
Stanislav Galabov
e56e179d55 Initial import of Ralink/Mediatek MIPS SoC support #3
Interrupt controllers found in various Mediatek/Ralink SoCs.

mtk_intr_v1 and mtk_intr_v2 are basically the same at the moment, with
just different register mappings.

However, v1 interrupt controller has a subset of the functionality of the
v2 interrupt controller, so in the future the v2 interrupt controller driver
may be enhanced, if needed, with things like level/edge interrupts and soft
interrupts. So, for the moment I suggest we keep them as 2 separate files.

mtk_intr_gic provides very basic (similar to v1 and v2) support for MIPS GIC
controllers, which currently maps all interrupts to a single core and sets
them to type level, active high. In the future this may be developed into a
generic GIC controller to support any new MIPS SoCs that include it. The GIC
is a standard MTI interrupt controller in their multi-core line-up (e.g.,
1004K, 1074K, etc.), rather than a SoC-specific controller.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5839
2016-04-07 11:12:37 +00:00