Commit Graph

3 Commits

Author SHA1 Message Date
Stanislav Galabov
3154bc4680 Implement support for sysctl hw.model for Mediatek/Ralink SoCs
These SoCs have CHIPID registers, which store the Chip model, according
to the manufacturer; make use of those in order to better identify
the chip we're actually running on.

If we're unable to read the CHIPID registers for some reason we will
use the string "unknown " as a value for hw.model.

Reported by:	yamori813@yahoo.co.jp
Sponsored by:	Smartcom - Bulgaria AD
2018-11-16 11:17:18 +00:00
Stanislav Galabov
3378bfdb23 Allow RT3350 CPU clock to be detected as part of RT3050/RT3052 detection
OpenWRT's dts files treat RT3050/RT3052/RT3350 within the same SoC dtsi
file, so we need to distinguish between the three dynamically, mainly
because the bit we use to determine the clock speed on RT3050/RT3052
can actually be floating on RT3350 and RT3350 is always at 320MHz.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5983
2016-04-18 06:15:58 +00:00
Stanislav Galabov
10998af48d This revision adds the following parts:
- machine dependent low level init code
- SoC clocks detection and some utility functions
- Common interface to read/write/modify SoC system control registers, used
  by some of the other drivers and utility functions
- simple FDT resets support, based on the fdt_clock implementation already
  in the tree. For the moment resets and clocks are managed using these
  implementations. I am planning to port those to the new extres framework
  in the future, but currently I simply don't have time to do this part too.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5826
2016-04-07 11:02:49 +00:00