Ian Lepore
7ce00ee7b4
Rename arm_init_secondary_ic() -> arm_pic_init_secondary(). The latter is
...
the name the function will have when the new ARM_INTRNG code is integrated,
and doing this rename first will make it easier to toggle the new interrupt
handling code on/off with a config option for debugging.
2015-10-18 16:54:34 +00:00
Andrew Turner
087af50ab8
Include vm/pmap.h for pmap_kextract.
2015-04-04 23:03:11 +00:00
Andrew Turner
3f53a2d612
Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
...
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Ian Lepore
1e3d53c687
Use named constant rather than '0' to access the reset controller register.
2014-07-08 14:35:09 +00:00
Ian Lepore
f5a477a34b
Add a tunable to set the number of active cores, and enable SMP by default.
2014-03-02 19:46:03 +00:00
Ian Lepore
f32801f42b
Invalidate the SCU cache tag ram on all 4 cores, not just 1-3. I misread
...
Juergen's original code, it was doing all 4 cores. Also remove the L2
cache invalidate operation, this code runs before L2 is activated.
2014-02-25 15:22:40 +00:00
Ian Lepore
1f22526981
Add the bits needed to run SMP on imx6.
...
The 'option SMP' isn't added to the kernel config yet; people wanting to
test this have to opt-in for now.
2014-02-24 03:51:31 +00:00
