hypervisor. This prevents an infinite loop where processes with evicted
pages would page fault forever when PMAP decided the evicted pages on
which the process was faulting was actually present and did not need to
be restored.
Found while building LLVM with make -j32.
Sponsored by: FreeBSD Foundation
I was going to use __FreeBSD_version to determine if
xz(1) should be multi-threaded by default, but doing
this will cause problems if/when the changes are merged
from head.
Sponsored by: The FreeBSD Foundation
Allow multi-threaded xz(1) to be turned off by specifying
NO_XZTHREADS, and allow number of threads to be overridden
by specifying XZ_THREADS=N.
MFC after: 1 week
X-MFC-needs: r278433
Sponsored by: The FreeBSD Foundation
This brings support for multi-threaded compression. This brings close
N times faster compression where N is the number of CPU cores.
Because of this, liblzma now depends on libthr.
Soon libarchive will be modified to use the new lzma API.
Thanks to antoine@ for the exp-run.
Differential Revision: https://reviews.freebsd.org/D1786
Reviewed by: bapt
If structure packed as __packed clang (and probably gcc) generates
code that loads word fields (e.g. tx_pos) byte-by-byte and if it's
modified by VideoCore in the same time as ARM loads the value result
is going to be mixed combination of bytes from previous value and
new one.
POWER8 systems. During thread switch, there was a very small window when
the stack pointer was set to the stack pointer of the outgoing thread, but
after the lock on that thread had already been released.
If, during that window, the outgoing thread were rescheduled on another CPU
and begin execution and an exception were taken on the original CPU, the
trap handler and the outgoing thread would simultaneously execute on the same
stack, causing memory corruption. Fix this by making sure to release the
old thread only after cpu_switch() is done with its stack.
MFC after: 2 weeks
Sponsored by: FreeBSD Foundation
every possible trap address by default. This also makes sure the kernel
notices (and panics at) traps from newer CPUs that the kernel was not
expecting rather than executing gibberish memory.
that we (a) get the correct large page size to provide to pmap and (b)
we can alert the user if running under incorrectly-configured PowerKVM
on POWER7 and POWER8 systems.
MFC after: 1 week
There's an unfortunate layering issue between LLDB's Process/POSIX and
Process/{FreeBSD,Linux}, exposed by a refactoring in upstream revision
218568. Work around it by adding explicit #if defined(__FreeBSD__)
guards to include the correct header.
Drivers (ULDs) and the base if_cxgbe driver.
Track the per-adapter activation of ULDs in a new "active_ulds" field.
This was done pretty arbitrarily before this change -- via TOM_INIT_DONE
in adapter->flags for TOM, and the (1 << MAX_NPORTS) bit in
adapter->offload_map for iWARP.
iWARP and hw-accelerated iSCSI rely on the TOE (supported by the TOM
ULD). The rules are:
a) If the iWARP and/or iSCSI ULDs are available when TOE is enabled then
iWARP and/or iSCSI are enabled too.
b) When the iWARP and iSCSI modules are loaded they go looking for
adapters with TOE enabled and enable themselves on that adapter.
c) You cannot deactivate or unload the TOM module from underneath iWARP
or iSCSI. Any such attempt will fail with EBUSY.
MFC after: 2 weeks
[mips] Enable arithmetic and binary operations for the i128 data type.
Summary:
This patch adds support for some operations that were missing from
128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these
changes we can support the __int128_t and __uint128_t data types
from C/C++.
Depends on D7125
Reviewers: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D7143
This fixes "error in backend" messages, when compiling parts of
compiler-rt using 128-bit integer types for mips64.
Reported by: sbruno
PR: 197259
This is a sync against iwn(4) and openbsd.
- Add power management support;
- Add background scanning support;
- Fix few LORs;
- Handle rfkill switch state changes properly;
- Fix recovering after firmware failure;
- Add more error checking;
- Cleanup & disable by default debug output;
- Update macroses names;
- Other various fixes;
- Add IBSS support:
- don't set data_ntries field for management frames;
- Add AHDEMO support:
- fix padding;
- Sync eeprom functions;
- Use CMD_RXON_ASSOC where possible;
- Enable HW CCMP encryption/decryption for pairwise keys;
- Fix filter flags for CMD_RXON.
Tested (by submitter) - iwn 3945 NIC. I have one somewhere; I'll
validate this later on and revert it if it's a problem.
Thanks!
PR: 197143
Submitted by: Andriy Voskoboinyk <s3erios@gmail.com>
In a couple of cases a variable "stayopen" can be checked
unitialized. This is of no danger as the complementary
condition is false but prevent the access by switching
the checks.
CID: 1018729
CID: 1018732
This change introduces new target option "port", that assigns current target
to specified CTL port. On config application ctld(8) will apply LUN mapping
according to target configuration to specified port and bring the port up.
On shutdown cltd(8) will remove the mapping and put the port down.
This change allows to configure both iSCSI and FibreChannel targets in the
same configuration file in alike way.
Kernel side support was added earlier at r278037.
MFC after: 2 weeks
Relnotes: yes
Sponsored by: iXsystems, Inc.
[FastIsel][X86] Fix invalid register replacement for bool args
Summary:
Consider the following IR:
%3 = load i8* undef
%4 = trunc i8 %3 to i1
%5 = call %jl_value_t.0* @foo(..., i1 %4, ...)
ret %jl_value_t.0* %5
Bools (that are the result of direct truncs) are lowered as whatever
the argument to the trunc was and a "and 1", causing the part of the
MBB responsible for this argument to look something like this:
%vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7
Later, when the load is lowered, it will insert
%vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14
but remember to (at the end of isel) replace vreg7 by vreg15. Now for
the bug. In fast isel lowering, we mistakenly mark vreg8 as the result
of the load instead of the trunc. This adds a fixup to have
vreg8 replaced by whatever the result of the load is as well, so
we end up with
%vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15
which is an SSA violation and causes problems later down the road.
This fixes PR21557.
Test Plan: Test test case from PR21557 is added to the test suite.
Reviewers: ributzka
Reviewed By: ributzka
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6245
This fixes a possible assertion failure when compiling toolbox.cxx from
LibreOffice 4.3.5.
Reported by: kwm
the ia_array field of struct ar9300_ini_array const, and removing the
const-dropping casts. No functional change.
Reviewed by: adrian
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D1725
