Commit Graph

977 Commits

Author SHA1 Message Date
Peter Wemm
59cc2230c6 Fix a dumbass mistake. I had the 'set' and 'get' reversed in the
fpsetround/fpgetround macro pairs.
2003-08-02 00:26:30 +00:00
Peter Wemm
3950c40739 KSTACK_PAGES is a global option. 2003-07-31 01:27:18 +00:00
Maxime Henrion
d5afecd068 - Introduce a new busdma flag BUS_DMA_ZERO to request for zero'ed
memory in bus_dmamem_alloc().  This is possible now that
  contigmalloc() supports the M_ZERO flag.
- Remove the locking of Giant around calls to contigmalloc() since
  contigmalloc() now grabs Giant itself.
2003-07-27 13:52:10 +00:00
John Baldwin
e47d4f0fc2 Use macros from apic.h to when writing to the ICR to send IPIs to startup
APs rather than magic numbers.

Tested by:	scottl
2003-07-23 19:04:28 +00:00
John Baldwin
55fb372edd Add a new macro APIC_ICRLO_RESV_MASK that contains all of the reserved
fields in the low 32 bits of the local APIC ICR register.  Use this macro
in place of APIC_RESV2_MASK when masking off existing bits from the ICR
when writing to it to send an IPI.

Tested by:	scottl
2003-07-23 18:59:38 +00:00
Peter Wemm
5b9f8ddbbd Go back to 64 bit precision for fadd/fsub/fsqrt etc. This is because on
AMD64, gcc (and the ABI) expects the x87 unit to be running in 80/64
mode (not 64/53) so that it can use it for 'long double' operations.  It
takes the expected precision differences into account when generating
code.
2003-07-22 06:50:34 +00:00
Peter Wemm
76537e43f5 Extend the machine/ieeefp.h that was inherited from i386 to support
the SSE mxcsr register as well.  Since gcc will intermix SSE2 and x87
FP code, the fpsetround() etc mode had better be the same.

There are hooks to enable these inlines to be instantiated inside libc
for non-gcc or C++ callers. (g++ doesn't like the inlines that tried
to extract an integer and convert it to an enum).
2003-07-22 06:44:54 +00:00
Mark Murray
c7b132c974 Protect lint(1) from a #error. 2003-07-10 18:05:02 +00:00
Peter Wemm
e95babf3a8 unifdef -DLAZY_SWITCH and start to tidy up the associated glue. 2003-07-10 01:02:59 +00:00
Peter Wemm
bf8ca114e2 Fix the VADDR() macros to use either KVADDR() or UVADDR(), depending
on the implied sign extension.  The single unified VADDR() macro was
not able to avoid sign extending the VM_MAXUSER_ADDRESS/USRSTACK values.
Be explicit about UVADDR() (positive address space) and KVADDR()
(kernel negative address space) to make mistakes show up more
spectacularly.

Increase user VM space from 1/2TB (512GB) to 128TB.
2003-07-09 23:04:23 +00:00
Scott Long
f6b1c44d1f Mega busdma API commit.
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma.  At the moment, this is used for the
asynchronous busdma_swi and callback mechanism.  Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg.  dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create().  The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms.  The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by:	tmm, gibbs
2003-07-01 15:52:06 +00:00
Jeff Roberson
ab875ef896 - Construct a cpu topology map for Hyper Threading systems so that ULE may
take advantage of them.
2003-06-28 22:07:42 +00:00
Hidetoshi Shimokawa
e07324646e Move KERNBASE to -2GB.
Currently, we cannot increase KVA more than 2GB.
2003-06-22 13:02:45 +00:00
Alan Cox
49a2507bd1 Migrate the thread stack management functions from the machine-dependent
to the machine-independent parts of the VM.  At the same time, this
introduces vm object locking for the non-i386 platforms.

Two details:

1. KSTACK_GUARD has been removed in favor of KSTACK_GUARD_PAGES.  The
different machine-dependent implementations used various combinations
of KSTACK_GUARD and KSTACK_GUARD_PAGES.  To disable guard page, set
KSTACK_GUARD_PAGES to 0.

2. Remove the (unnecessary) clearing of PG_ZERO in vm_thread_new.  In
5.x, (but not 4.x,) PG_ZERO can only be set if VM_ALLOC_ZERO is passed
to vm_page_alloc() or vm_page_grab().
2003-06-14 23:23:55 +00:00
John Baldwin
e59ae32f18 - Document the thermal and performance counter LVT entries in the local
APIC.
- Add a lvt_thermal member to the LAPIC struct.
- Add constants for the SMI and INIT LVT delivery modes.
2003-06-06 17:22:15 +00:00
Peter Wemm
7fc03ef474 Fix ALIGNED_POINTER(). sizeof((u_int32_t)) is not legal C. 2003-06-04 02:15:13 +00:00
Peter Wemm
c35518b4ed Make this more compatable with libc_r. Make the internal types for storing
registers an array of longs rather than int.
2003-06-02 21:49:35 +00:00
David E. O'Brien
9676a785e7 Use __FBSDID(). 2003-06-02 06:43:15 +00:00
Peter Wemm
193b147c05 MFi386: i386/include/asm.h rev 1.11: Do not abuse ##. 2003-06-02 05:59:35 +00:00
David E. O'Brien
69bb404192 Use C99 compatable asm statements. 2003-06-02 00:29:35 +00:00
Peter Wemm
cc71eb5e10 With the help of jhb, fix the ACPI_ACQUIRE_GLOBAL_LOCK() macros and
port to amd64 after repocopy.

Approved by: re (amd64/*)
2003-05-31 06:43:55 +00:00
Hiten Pandya
b77c32a07e Rename BUS_DMAMEM_NOSYNC to BUS_DMA_COHERENT.
The current name is confusing, because it indicates to
the client that a bus_dmamap_sync() operation is not
necessary when the flag is specified, which is wrong.

The main purpose of this flag is to hint the underlying
architecture that DMA memory should be mapped in a coherent
way, but the architecture can ignore it.  But if the
architecture does supports coherent mapping of memory, then
it makes bus_dmamap_sync() calls cheap.

This flag is the same as the one in NetBSD's Bus DMA.

Reviewed by: gibbs, scottl, des (implicitly)
Approved by: re@ (jhb)
2003-05-30 20:40:33 +00:00
Peter Wemm
5feb2148ba Initial port to amd64 after repocopy from i386. Note that the
disassembler has not been updated yet, and will do some very strange
things.  It does tracebacks (without function arguments due to regparm
calling conventions) if -fno-omit-frame-pointer is used (to come later).
This achieves basic functionality.

Approved by:	re (amd64/* blanket)
2003-05-30 01:01:07 +00:00
Scott Long
7e71df9339 Bring back bus_dmasync_op_t. It is now a typedef to an int, though the
BUS_DMASYNC_ definitions remain as before.  The does not change the ABI,
and reverts the API to be a bit more compatible and flexible.  This has
survived a full 'make universe'.

Approved by:	re (bmah)
2003-05-27 04:59:59 +00:00
Scott Long
c87d464f28 De-orbit bus_dmamem_alloc_size(). It's a hack and was never used anyways.
No need for it to pollute the 5.x API any further.

Approved by:	re (bmah)
2003-05-26 04:00:52 +00:00
Peter Wemm
3ebd9b48ce Stop profiled libc from exploding, matching gcc's generated code.
Approved by: re (amd64/* blanket)
2003-05-24 18:24:03 +00:00
Peter Wemm
d9cd1af4aa Typo fix. oops.
Submitted by:  jmallett
Approved by:   re (blanket amd64/*)
2003-05-23 06:36:46 +00:00
Peter Wemm
cbd667fa2f Update comments. Note that the kernel is at -1GB, not -2GB as erroniously
implied by the previous commit.  KVM is still only 1GB until
pmap_growkernel() learns about the extra page table level.

Approved by:  re (blanket)
2003-05-23 06:35:45 +00:00
Peter Wemm
f229f5cf85 As suggested by the gdb folks, pad the 'struct fpreg' to a full 512 bytes
to match the native fxsave/fxrstor object size since thats apparently what
the Linux/NetBSD folks do.
2003-05-23 06:31:56 +00:00
Peter Wemm
3c9a3c9ca3 Major pmap rework to take advantage of the larger address space on amd64
systems.  Of note:
- Implement a direct mapped region using 2MB pages.  This eliminates the
  need for temporary mappings when getting ptes.  This supports up to
  512GB of physical memory for now.  This should be enough for a while.
- Implement a 4-tier page table system.  Most of the infrastructure is
  there for 128TB of userland virtual address space, but only 512GB is
  presently enabled due to a mystery bug somewhere.  The design of this
  was heavily inspired by the alpha pmap.c.
- The kernel is moved into the negative address space(!).
- The kernel has 2GB of KVM available.
- Provide a uma memory allocator to use the direct map region to take
  advantage of the 2MB TLBs.
- Fixed some assumptions in the bus_space macros about the ability
  to fit virtual addresses in an 'int'.

Notable missing things:
- pmap_growkernel() should be able to grow to 512GB of KVM by expanding
  downwards below kernbase.  The kernel must be at the top 2GB of the
  negative address space because of gcc code generation strategies.
- need to fix the >512GB user vm code.

Approved by:	re (blanket)
2003-05-23 05:04:54 +00:00
Alexander Kabaev
980ded9a7d sys/sys/limits.h:
- Fix visibilty test for LONG_BIT and WORD_BIT.  `#if defined(__FOO_VISIBLE)'
   is alays wrong because __FOO_VISIBLE is always defined (to 0 for
   invisibility).

sys/<arch>/include/limits.h
sys/<arch>/include/_limits.h:

 - Style fixes.

Submitted by:	bde
Reviewed by:	bsdmike
Approved by:	re (scottl)
2003-05-19 20:29:07 +00:00
Alan Cox
4a0d6dfd2c Initialize logical_cpus_mask when the logical CPUs are enumerated in
the mptable.  (Previously, logical_cpus_mask was only initialized if
the hyperthreading fixup was executed.)

Approved by:	re (jhb)
Reviewed by:	ps
2003-05-15 05:12:24 +00:00
Peter Wemm
c0a54ff621 Collect the nastiness for preserving the kernel MSR_GSBASE around the
load_gs() calls into a single place that is less likely to go wrong.

Eliminate the per-process context switching of MSR_GSBASE, because it
should be constant for a single cpu.  Instead, save/restore it during
the loading of the new %gs selector for the new process.

Approved by:	re (amd64/* blanket)
2003-05-15 00:23:40 +00:00
Peter Wemm
be52ef1399 Use compile time constants for things like PTmap[] etc because they're
about to move outside of the +/- 2GB range

Suggested by:	jake
Approved by:	re (amd64/* blanket)
2003-05-15 00:20:17 +00:00
Peter Wemm
d85631c4ac Add BASIC i386 binary support for the amd64 kernel. This is largely
stolen from the ia64/ia32 code (indeed there was a repocopy), but I've
redone the MD parts and added and fixed a few essential syscalls.  It
is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic)
and p4.  The ia64 code has not implemented signal delivery, so I had
to do that.

Before you say it, yes, this does need to go in a common place.  But
we're in a freeze at the moment and I didn't want to risk breaking ia64.
I will sort this out after the freeze so that the common code is in a
common place.

On the AMD64 side, this required adding segment selector context switch
support and some other support infrastructure.  The %fs/%gs etc code
is hairy because loading %gs will clobber the kernel's current MSR_GSBASE
setting.  The segment selectors are not used by the kernel, so they're only
changed at context switch time or when changing modes.  This still needs
to be optimized.

Approved by:	re (amd64/* blanket)
2003-05-14 04:10:49 +00:00
Peter Wemm
0fe93e7480 For the page fault handler, save %cr2 in the outer trap handler so that
we do not have to run so long with interrupts disabled.  This involved
creating tf_addr in the trapframe.  Reorganize the trap stubs so that
they consistently reserve the stack space and initialize any missing
bits.

Approved by:	re (amd64 stuff)
2003-05-12 18:33:19 +00:00
Peter Wemm
0f6241620b Sync ucontext with reality. The struct trapframe changes need to be
reflected here.

Approved by:	re (blanket amd64/*)
2003-05-12 18:23:04 +00:00
Peter Wemm
e9b193dc33 AMD64 physical space is much larger than i386, de-i386 the bus_space and
bus_dma MD code for AMD64.  (And a trivial ifdef update in dev/kbd because
of this).  More updates are needed here to take advantage of the 64 bit
instructions.

Approved by:	re (blanket amd64/*)
2003-05-12 02:44:37 +00:00
Peter Wemm
bf1e897425 Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.base
value on entry and exit.  This isn't as easy as it sounds because when
we recursively trap or interrupt, we have to avoid duplicating the
swapgs instruction or we end up back with the userland %gs.  I implemented
this by testing TF_CS to see if we're coming from supervisor mode
already, and check for returning to supervisor. To avoid a race with
interrupts in the brief period after beginning executing the handler and
before the swapgs, convert all trap gates to interrupt gates, and reenable
interrupts immediately after the swapgs.  I am not happy with this.
There are other possible ways to do this that should be investigated.
(eg: storing the GS.base MSR value in the trapframe)

Add some sysarch functions to let the userland code get to this.

Approved by:	re (blanket amd64/*)
2003-05-12 02:37:29 +00:00
Peter Wemm
eeee69d45c Make atdevbase long for the KERNBASE > 4GB case
Approved by: re (amd64/* blanket)
2003-05-11 22:53:43 +00:00
Peter Wemm
0fe0f2515b Provide a fake varargs implementation for lint's benefit. This way
it can see the intent of the va_* macros, even though it cannot work.

Approved by:	re (blanket amd64/*)
2003-05-10 00:55:15 +00:00
Peter Wemm
e1ef71de2b Remove _ARCH_INDIRECT ifdefs. They existed for lib/msun/* on i386, which
could use different versions of the math code depending on whether there
was real floating point hardware or math emulation.  Since the fpu is
part of the core specification on amd64, there is no need for this here.

Approved by:	re (blanket amd64/*)
2003-05-10 00:53:34 +00:00
Peter Wemm
2e4f687a1d bcopyb() isn't used on amd64 kernel (it only exists for i386/pcvt)
Approved by:	re (blanket amd64/*)
2003-05-10 00:51:29 +00:00
Peter Wemm
395e65aa29 Include the MXCSR initial values, based on the AMD docs. This file
should really be renamed to fpu.h and npx.c to fpu.c since its part of
the core architecture on amd64 systems, not an isa 'numeric processor
extension'.
2003-05-09 18:28:05 +00:00
Alexander Kabaev
0eda4c08a5 Style fixes.
Remove DBL_DIG, DBL_MIN, DBL_MAX and their FLT_ counterparts, they
were marked for deprecation ever since SUSv1 at least.
Only define ULLONG_MIN/MAX and LLONG_MAX if long long type is
supported.
Restore a lost comment in MI _limits.h file and remove it from
sys/limits.h where it does not belong.
2003-05-04 22:13:04 +00:00
Peter Wemm
7f47668191 Slight reorg and added AMD64 support. A couple of the MODINFOMD_* values
that were added to sparc64 and later powerpc, really should have been in
the MI area.  But changing that now with insufficient preperation will
just cause too much pain.

Move MD_FETCH() to the MI sys/linker.h file to avoid another two copies
of it.
2003-05-01 03:31:18 +00:00
Peter Wemm
afa8862328 Commit MD parts of a loosely functional AMD64 port. This is based on
a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to
attempt to get a stable base to start from.  There is a lot missing still.
Worth noting:
- The kernel runs at 1GB in order to cheat with the pmap code.  pmap uses
  a variation of the PAE code in order to avoid having to worry about 4
  levels of page tables yet.
- It boots in 64 bit "long mode" with a tiny trampoline embedded in the
  i386 loader.  This simplifies locore.s greatly.
- There are still quite a few fragments of i386-specific code that have
  not been translated yet, and some that I cheated and wrote dumb C
  versions of (bcopy etc).
- It has both int 0x80 for syscalls (but using registers for argument
  passing, as is native on the amd64 ABI), and the 'syscall' instruction
  for syscalls.  int 0x80 preserves all registers, 'syscall' does not.
- I have tried to minimize looking at the NetBSD code, except in a couple
  of places (eg: to find which register they use to replace the trashed
  %rcx register in the syscall instruction).  As a result, there is not a
  lot of similarity.  I did look at NetBSD a few times while debugging to
  get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
Peter Wemm
1e57e9eba3 Repocopy from x86_64/... to amd64/...
Rename visible x86_64 references to amd64.
Kill MID_MACHINE, its a.out specific, the only platform that supports it
is i386.  All of the other platforms should remove it too.
2003-04-30 22:51:59 +00:00
Alexander Kabaev
104a9b7e3e Deprecate machine/limits.h in favor of new sys/limits.h.
Change all in-tree consumers to include <sys/limits.h>

Discussed on:	standards@
Partially submitted by: Craig Rodrigues <rodrigc@attbi.com>
2003-04-29 13:36:06 +00:00
Jake Burkholder
14ce5bd49b Use inlines for loading and storing page table entries. Use cmpxchg8b for
the PAE case to ensure idempotent 64 bit loads and stores.

Sponsored by:	DARPA, Network Associates Laboratories
2003-04-28 20:35:36 +00:00