4 Commits

Author	SHA1	Message	Date
Thomas Moestl	90ce56c287	Add the following functions/macros to support byte order conversions and ... device drivers for bus system with other endinesses than the CPU (using interfaces compatible to NetBSD): - bwap16() and bswap32(). These have optimized implementations on some architectures; for those that don't, there exist generic implementations. - macros to convert from a certain byte order to host byte order and vice versa, using a naming scheme like le16toh(), htole16(). These are implemented using the bswap functions. - stream bus space access functions, which do not perform a byte order conversion (while the normal access functions would if the bus endianess differs from the CPU endianess). htons(), htonl(), ntohs() and ntohl() are implemented using the new functions above for kernel usage. None of the above interfaces is currently exported to user land. Make use of the new functions in a few places where local implementations of the same functionality existed. Reviewed by: mike, bde Tested on alpha by: mike	2002-02-27 17:16:18 +00:00
John Baldwin	3f4809dd0d	Axe the barrier_{read,write,rw}() helper functions as this method of ... doing memory barriers doesn't really scale well for the ia64. Also, memory barriers are more a property of the CPU than bus space. Requested by: dfr	2000-10-20 06:45:48 +00:00
John Baldwin	25f3f7c530	Add in a simple API for memory barriers to machine/bus.h: ... - barrier_read() enforces a memory read barrier - barrier_write() enforces a memory write barrier - barrier_rw() enforces a memory read/write barrier	2000-10-18 10:30:12 +00:00
Doug Rabson	1ebcad5720	This is the first snapshot of the FreeBSD/ia64 kernel. This kernel will ... not work on any real hardware (or fully work on any simulator). Much more needs to happen before this is actually functional but its nice to see the FreeBSD copyright message appear in the ia64 simulator.	2000-09-29 13:46:07 +00:00