Commit Graph

2117 Commits

Author SHA1 Message Date
Ian Lepore
b4df095c2e Add new helper routines for arm static device mapping. The new code
allocates kva space from the top down for the device mappings and builds
entries in an internal table which is automatically used later by
arm_devmap_bootstrap().  The platform code just calls the new
arm_devmap_add_entry() function as many times as it needs to (up to 32
entries allowed; most platforms use 2 or 3 at most).

There is also a new arm_devmap_lastaddr() function that returns the lowest
kva address allocated; this can be used to implement initarm_lastaddr()
which is used to initialize vm_max_kernel_address.

The new code is based on a similar concept developed for the imx family
SoCs recently.  They will soon be converted to use this new common code.
2013-11-05 04:30:55 +00:00
Ian Lepore
c2d47adbb7 Make PTE_DEVICE a synonym for PTE_NOCACHE on armv4, to make it easier to
share the same code on both architectures.
2013-11-05 04:06:29 +00:00
Ian Lepore
515cbe8673 Call initarm_lastaddr() later in the init sequence, after establishing
static device mappings, rather than as the first of the initializations
that a platform can hook into.  This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.

Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.

Rename platform_devmap_init() to initarm_devmap_init() to match all the
other init routines called from initarm() that are designed to be
implemented by platform code.

Add a comment block that explains when these routines are called and the
type of work expected to be done in each of them.
2013-11-05 02:57:34 +00:00
Ian Lepore
3110e7eed8 Move remaining code and data related to static device mapping into the
new devmap.[ch] files.  Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).
2013-11-04 22:45:26 +00:00
Ian Lepore
13a98c8536 Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring
out common code related to mapping device memory into a new devmap.c file.

Remove the growing duplication of code that used pmap_devmap_find_pa() and
then did some math with the returned results to generate a virtual address,
and likewise in reverse to get a physical address.  Now there are a pair
of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that.  The
bus_space_map() implementations are rewritten in terms of these.
2013-11-04 19:44:37 +00:00
Ian Lepore
2b3f8f22e1 Remove the duplicated implementations of some bus_space functions and use
the essentially identical generic implementations instead.  The generic
implementations differ only in the spelling of a couple variable names
and some formatting differences.
2013-11-04 16:16:40 +00:00
Ian Lepore
5f1c941298 Properly quote the included filename, now that it has a dot in it. Doh. 2013-11-04 03:46:09 +00:00
Ian Lepore
ab428fad78 Rename WANDBOARD-COMMON to WANDBOARD.common and adjust the configs that
include it accordingly.  The build machinery for universe and tinderbox
tries to build every kernel config whose name begins and ends with [A-Z0-9]
and the common include file that has most of the options isn't buildable
by itself, so the new lowercase .common will avoid building it.
2013-11-04 03:39:23 +00:00
Ian Lepore
5e503d28c5 Comments and style(9) only, no functional changes. 2013-11-03 22:55:33 +00:00
Ian Lepore
8310e9ea5d Bugfix: the attach routine needs to use the same table of fdt compat
strings that the probe routine used.
2013-11-02 22:44:35 +00:00
Ian Lepore
d2f51fc343 Add a missing register definition. 2013-11-02 21:07:39 +00:00
Alan Cox
b603e09555 Don't create a distinct free page pool for segregating allocations that are
accessed through the direct map unless the kernel configuration actually
includes a direct map.  Only a few configurations do, and for the rest the
unnecessary free page pool is a small pessimization.

Tested by:	zbb
MFC after:	6 weeks
2013-11-02 17:08:20 +00:00
Ian Lepore
760eb697b4 The ability to do 8-bit implies 4-bit capability too. Rearrange the cases
and add a fallthrough comment to make that happen.
2013-11-01 19:29:59 +00:00
Ian Lepore
4a98e46950 TI sdhci driver improvements, mostly related to fdt data...
Use the published compatible strings (our own invention, "ti,mmchs" is
still accepted as well, for now).

Don't blindly turn on 8-bit bus mode, because even though the conroller
supports it, the board has to be wired appropriately as well.  Use the
published property (bus-width=<n>) and honor all the valid values (1,4,8).

The eMMC device on a Beaglebone Black is wired for 8-bit, update the dts.

The mmchs controller can inherently do both 1.8v and 3.0v on the first
device and 1.8v only on other devices, unless an external transceiver is
used.  Set the voltage automatically for the first device and honor
the published fdt property (ti,dualvolt) for other devices.

Thanks go to Ilya Bakulin for figuring out the voltage compatibility stuff.
2013-11-01 19:22:06 +00:00
Ian Lepore
bc5c7a1ad3 Kernel config for Wandboard. 2013-11-01 02:04:05 +00:00
Ian Lepore
034e9ed611 Add the Soc- / machine-dependent parts of imx6 support. 2013-11-01 00:21:09 +00:00
Ian Lepore
3d9d5b4313 Add definitions for the register and data that describes the SoC type.
This isn't in the chip reference manuals, it was found in u-boot and
various old mailing list threads.
2013-10-31 23:08:30 +00:00
Ian Lepore
f955880f7b Revamp the SoC identity numbering scheme to be more in line with the way
Freescale numbers the chips in the ID registers.
2013-10-31 23:05:05 +00:00
Ian Lepore
7352de58e8 Add sdhci driver glue for imx family SoCs. This should support both uSDHC
(newer SoCs) and eSDHC (older SoCs), but the eSDHC support is untested and
likely to need some tweaking.
2013-10-31 15:27:39 +00:00
Ian Lepore
9808ebfa39 Add stubbed-out imx6 support for clocks and power management. This
contains little more than a few stub functions required to keep the
linker happy, but it's enough to let early imx6 development proceed.
2013-10-31 15:04:23 +00:00
Ian Lepore
c8c16b3df2 Add support for the USB PHY on imx6 SoCs. Pretty minimal at this point,
but enough to get usb host mode working.
2013-10-31 14:52:06 +00:00
Ian Lepore
425a5c7900 Do not EOI an interrupt until the point after the filter handlers / before
threaded handlers.

It's not easy to see from the diffs of this change exactly how it
accomplishes the above.  The arm_mask_irq() and arm_unmask_irq() functions
are, respectively, the pre_thread and post_thread hooks.  Not seen in
these diffs, the arm_post_filter() routine also EOIs.  The post_filter
routine runs after filter handlers if there will be no threaded handlers,
so it just EOIs.  The pre_thread routine masks the interrupt (at the
controller, not the source) and EOIs.  So one way or another, the EOI
happens at the point where filter handlers are done.
2013-10-31 03:23:25 +00:00
Ian Lepore
adcea15135 Don't iterate through the bits of the pending interrupt register if the
whole register is zero.  Most of the registers will be zero most of the time.
2013-10-31 03:12:48 +00:00
Rui Paulo
74678000dc Enable USB. 2013-10-31 02:14:28 +00:00
Ian Lepore
54fe60971c Reset the timer interrupt status register at the top rather than bottom of
the interrupt handler.  If the event callback starts a new short timeout,
the timer can fire before returning from the event callback, and clearing
the interrupt status after that loses the interrupt and hangs until the
counter wraps.  Fixing all of this removes the need for the do-nothing
loop at the top of the handler which really just waited for the counter to
roll over and reach the one-shot count again.

Also add a missing return(0) in the periodic timer start case.
2013-10-31 02:11:35 +00:00
Ian Lepore
eb756ebd94 Expand the list of compatible devices this driver works with. Increase
the target frequency from 1 to 10 MHz because these SoCs are plenty fast
enough to benefit from the extra event timer resolution.
2013-10-31 01:45:55 +00:00
Ian Lepore
bc9a95c8c6 Add a "no-op" USB PHY driver for imx-family SoCs. This is used when the
phy clocks need to be enabled, but no other hardware setup is needed to
make the phy work.
2013-10-30 14:38:24 +00:00
Ian Lepore
baf7f63f9a Add some bare-bones support for enabling usb and usbphy clocks. This
is temporary code to keep imx development moving forward for now.  In
the long run we need a SoC-independant clock management API.
2013-10-30 14:33:15 +00:00
Nathan Whitehorn
87cb964b92 Fix typo. Sorry! 2013-10-29 23:55:17 +00:00
Nathan Whitehorn
cd43f427f6 A last BUS_PROBE_NOWILDCARD. Move setting the postfilter function into the
attach function probe shouldn't actually set anything up but just bid
on the device.
2013-10-29 14:44:36 +00:00
Nathan Whitehorn
e5bcdd7960 A few last BUS_PROBE_NOWILDCARDs are in order. 2013-10-29 14:32:33 +00:00
Nathan Whitehorn
f0919d9edf Hints-only devices should return BUS_PROBE_NOWILDCARD from their probe
methods.
2013-10-29 13:52:05 +00:00
Rui Paulo
4219857759 Digi-CCWMX53: enable ffec and uart. 2013-10-29 03:42:43 +00:00
Zbigniew Bodek
0efe42a2e3 Fix condition that determines PMAP_NEEDS_PTE_SYNC value for ARM
Use values of the correct defines to determine statement's result.
ARM_ARCH_ symbols are always defined, hence only values are relevant.

Reviewed by:	cognet
2013-10-28 23:42:44 +00:00
Zbigniew Bodek
2923b75ea3 Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU
Since CPU_MV_PJ4B describes ARMv7 compliant CPU there is no need for
sending an IPI each time when TLB is flushed in any way.

Tested by:	kevlo
2013-10-28 21:41:44 +00:00
Zbigniew Bodek
e0b4b3a74f Remove not working and deprecated PJ4Bv6 support
Sheeva PJ4Bv6 - based chips were only prototypes for V7 class Armada
SoC family. Current in-tree support for PJ4Bv6 will not work and also
there should be no platforms in active use that would incorporate that
CPU revision.
2013-10-28 21:39:54 +00:00
Zbigniew Bodek
d7b0107591 Change Armada XP kernel load address to the u-boot's end address
Loading kernel to 0xf00000 has no practical reason.
Starting it from the u-boot's highest possible end address
(2MB counting from 0x0) makes more sense.

Tested by:	kevlo
2013-10-28 21:37:45 +00:00
Zbigniew Bodek
67c3c19d0a Fix-up DTB for Armada XP registers' base according to the actual settings
Depending on u-boot's flavor some boards have their SoC registers
base address configured to 0xD0000000 and other to 0xF1000000.
U-boot is passing currently set value via CP15 register.
In order to create proper mapping for SoC registers and allow further
successful initialization it is necessary to replace fdt_immr_pa with
the real value and eventually fix-up device tree blob.

Tested by:	kevlo
2013-10-28 21:34:32 +00:00
Zbigniew Bodek
77f3266653 Remove hard-coded mappings related to Armada XP support
Armada XP initialization flow requires SoC registers to be
mapped very early in order to configure Snoop Filter for SMP.
Additional mapping in locore.S is redundant as proper mapping is
made in pmap_devmap_bootstrap() prior to calling cpu_setup() which
configures the Snoop Filter.
For secondaru CPUs it is better to pass VA of the SoC
registers defined in MV_BASE and PA consistent with the value
in the Device Tree.

Tested by:	kevlo
2013-10-28 21:31:12 +00:00
Ian Lepore
5dc7c6b4c1 Follow r257244; it's now necessary to include if_var.h. 2013-10-28 18:43:00 +00:00
Ian Lepore
99895358c0 Sweep up a bit of arm-land fallout after r257244; include necessary
headers directly that are no longer available via accidental include.
2013-10-28 15:20:17 +00:00
Zbigniew Bodek
be445686da Run mvs SATA driver on Armada XP instead of old mv_sata
The mvs driver seems to be more functional than mv_sata and is not
causing random interrupt storms during boot.
2013-10-28 07:18:24 +00:00
Olivier Houchard
3acd1dbcd3 Make sure the PCB is aligned on 8 bytes, we may use ldrd/strd to access it,
which may have strong alignment requirements.
2013-10-27 22:15:50 +00:00
Konstantin Belousov
80938e75f0 Add bus_dmamap_load_ma() function to load map with the array of
vm_pages.  Provide trivial implementation which forwards the load to
_bus_dmamap_load_phys() page by page.  Right now all architectures use
bus_dmamap_load_ma_triv().

Tested by:	pho (as part of the functional patch)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 month
2013-10-27 21:39:16 +00:00
Ian Lepore
123fe3962d Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.  Thanks to bde@ for pointing out only arm used trapframe_t.
2013-10-27 17:09:23 +00:00
Ian Lepore
2d1bca2d2f Eliminate a compiler warning about extraneous parens. 2013-10-27 03:29:38 +00:00
Ian Lepore
ae7accbc18 Oops, one more instance of ARM_NOCACHE_KVA_SIZE was hiding under the couch.
This should have been cleaned up along with r257201.
2013-10-27 03:24:46 +00:00
Ian Lepore
99af02e3b6 Retire arm_remap_nocache() and the data and constants associated with it.
The only remaining user was the code that allocates bounce pages for armv4
busdma.  It's not clear why bounce pages would need uncached memory, but
if that ever changes, kmem_alloc_attr() would be the way to get it.
2013-10-27 03:13:26 +00:00
Ian Lepore
6489412064 Remove #include <machine/frame.h> from all the arm code that doesn't
really need it.  That would be almost everywhere it was included.  Add
it in a couple files that really do need it and were previously getting
it by accident via another header.
2013-10-27 01:34:10 +00:00
Ian Lepore
69d75558a7 Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Thanks to alc@ for pointing this out.
2013-10-27 00:51:46 +00:00