Commit Graph

144 Commits

Author SHA1 Message Date
Sam Leffler
c3b85cf91f Add support for the StrataFlash on 2348 boards:
o add bus shim for cfi driver
o add static mapping for CS0 (we map all 16M as the cfi driver doesn't
  support demand mapping)

Note this needs some tweaking to work for 2358 boards which is why the
CAMBRIA config is not touched.
2009-02-03 19:16:04 +00:00
Olivier Houchard
8f75a68792 Remove a duplicate #include. 2009-01-16 19:31:27 +00:00
Sam Leffler
cd5c694a56 move IXP4XX EHCI bus shim to the usb directory and rename 2008-12-23 17:40:02 +00:00
Sam Leffler
bb3f721b2b NPE cleanups needed for ancillary drivers (e.g. crypto acceleration):
o check feature bits when probing NPE ethernet support
o move firmware loading logic from if_npe to core npe support
o allow multiple refs to core NPE driver
o while here fix hw.npe.debug tunable path
2008-12-23 04:51:46 +00:00
Sam Leffler
cb52ddf021 kill NPE_PORTS_MAX, it's not used and likely will not be 2008-12-23 04:49:01 +00:00
Sam Leffler
d463fa5387 Fill in feature control support:
o add definitions for more bits, for masking out IXP465-specific bits,
  and %b format string
o add ixp4xx_read_feature_bits to retrieve the mask of valid features
  (aka fuse bits)
o add cpu_is_ixp42x() macro
o print feature bits at boot
2008-12-23 04:48:27 +00:00
Sam Leffler
4a301c1df8 o enable TT and big-endian MMIO
o force a reset before ehci_init to get byte-select setup

LS, FS, and HS devices now work on the Cambria board
2008-12-23 04:44:23 +00:00
Sam Leffler
d212022417 Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
Stanislav Sedov
129c518d68 - Fix spelling error in comments.
PR:		arm/128891
Submitted by:	Pavel Pankov <pankov_p@mail.ru>
Approved by:	kib (mentor)
2008-12-01 10:16:25 +00:00
Sam Leffler
0c7b0d4568 correct sizeof calculation
PR:		arm/128095
Submitted by:	Henning Petersen
MFC after:	1 week
2008-10-14 16:27:52 +00:00
Bruce M Simpson
db494010a3 Allow static hints to override kenv. 2008-10-02 22:31:30 +00:00
Olivier Houchard
34ba28d182 Bandaid: disable interrupts to make sure intr_enabled and the IER register
are in sync. I'm not sure why it is needed, and why it wouldn't be on other
arm platforms, but it prevents a lockup under heavy I/O.
2008-09-11 20:43:38 +00:00
Rafal Jaworowski
e29b1b389b IXP425: split handling of the two QMGR interrupts so they are separately
managed. Adjust ixpqmgr_{attach,detach} to comply with device_* interface.

Reviewed by:	cognet, imp, sam, stass
Tested by:	cognet
2008-09-11 12:17:21 +00:00
John Baldwin
13e3657b7b Add locking to the various iicbus(4) bridge drivers:
- Just grab Giant in the ixp425_iic(4) driver since this driver uses
  a shared address/data register window pair to access the actual
  I2C registers.  None of the other ixp425 drivers lock access to these
  shared address/data registers yet and that would need to be done before
  this could use any meaningful locking.
- Add locking to the interrupt handler and 'iicbus_reset' methods of the
  at91_twi(4) driver.
- Add locking to the pcf(4) driver.  Other pcf(4) fixes include:
  - Don't needlessly zero the softc.
  - Use bus_foo rather than bus_space_foo and remove bus space tag and
    handle from softc.
- The lpbb(4) driver just grabs Giant for now.  This will be refined later
  when ppbus(4) is locked.
- As was done with smbus earlier, move the DRIVER_MODULE() lines to match
  the bus driver (either iicbus or iicbb) to the bridge driver into the
  bridge drivers.

Tested by:	sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
Alan Cox
7b4270021d Eliminate unused global variables. (These global variables became fields of
struct kva_md_info many years ago.)
2008-07-18 06:14:36 +00:00
Kevin Lo
57deb21ad4 Fix a typo: i80321_pci_probe -> i81342_pci_probe 2008-06-12 01:46:06 +00:00
Kevin Lo
45c08eec9a Add the pxa_teardown_intr() bus method function to de-associate the
interrupt handler
2008-06-10 06:06:15 +00:00
Kevin Lo
43d8707e0f Pull all the code to deal with bus space methods into a shared set of
routines.
2008-06-10 03:44:14 +00:00
Kevin Lo
247ac1530d Remove sa1_cache_clean_addr 2008-06-09 05:53:04 +00:00
Kevin Lo
6799ed5dd8 Unify arminit() and clean up 2008-06-09 05:50:42 +00:00
Benno Rice
9722a61504 Support for the XScale PXA255 SoC as found on the Gumstix Basix and Connex
boards.  This is enough to net-boot to multiuser.

Also supported is the SMSC LAN91C111 parts used on the netCF, netDUO and netMMC
add-on boards.

I'll be putting some instructions on how to boot this on the Gumstix boards
online soon.

This is still fairly rough and will be refined over time but I felt it was
better to get this out there where other people can help out.
2008-06-06 05:08:09 +00:00
Kevin Lo
97344c5281 Remove some long-dead code
Reviewed by: cognet
2008-04-08 10:24:42 +00:00
Olivier Houchard
a90c089ccd Remove bus_space_generic.c from the per-plarform files. Having it in the
per-cpu files should be enough.
2008-04-05 21:57:11 +00:00
Olivier Houchard
e5add3326c Add bus_space_generic.c for the i81342 as well. 2008-04-05 21:51:11 +00:00
Rafal Jaworowski
47e972c91a Refactor certain ARM bus space methods: instead of having multiple copies of
the same code introduce sys/arm/arm/bus_space_generic.c for a shared set of
routines.

Reviewed by:	sam
Approved by:	cognet (mentor)
2008-04-03 18:22:08 +00:00
Rafal Jaworowski
b7170e5c34 Fix AVILA build.
Reviewed by:	sam
Approved by:	cognet(mentor)
2008-04-03 18:20:39 +00:00
Warner Losh
aa037d58ea Take the first baby step towards unifying and cleaning up arminit():
- Pull all the code to deal with the trampoline stuff into one
	  centeralized place and use it from everywhere.
	- Some minor style tidiness

Reviewed by: tinguely
2008-04-03 16:44:50 +00:00
Warner Losh
d93b192e7a KERNBASE + 0x00200000 is the same thing as KERNVIRTADDR on this
platform, so use the latter in preference to the former.  This makes
the fake_preload setup be the same between kb920x_machdep.c and
avila_machdep.c....
2008-04-03 06:14:23 +00:00
Sam Leffler
c7ad0d8736 Improve mac+phy configuration so that hints can be used to describe
layouts different than the defaults:
o hint.npe.0.mac="A", "B", etc. specifies the window for MAC register accesses
o hint.npe.0.mii="A", "B", etc. specifies PHY registers
o hint.npe.1.phy=%d specifies the PHY to map to a port

This allows devices like NSLU to be setup w/o code changes and will
also be used for forthcoming support for more Avila boards.

Reviewed by:	imp
MFC after	1 week
2008-03-22 16:53:28 +00:00
Sam Leffler
f9f98a6a18 map device 5; the optional USB controller on Gateworks 2348 boards
shows up here instead of the minipci slot at J4

Reviewed by:	cognet, imp
MFC after:	1 week
2008-03-20 15:54:19 +00:00
Jeff Roberson
6617724c5f Remove kernel support for M:N threading.
While the KSE project was quite successful in bringing threading to
FreeBSD, the M:N approach taken by the kse library was never developed
to its full potential.  Backwards compatibility will be provided via
libmap.conf for dynamically linked binaries and static binaries will
be broken.
2008-03-12 10:12:01 +00:00
Kevin Lo
223a605ac5 Convert to be a 2-clause bsd-only license.
Pointed out by: rwatson
2008-03-03 06:39:36 +00:00
Robert Watson
18d59070d6 On the ixp425, when we fail to initialize the memory rman instance, the
panic message should read "memory", not "IRQ".

MFC after:	3 days
2008-02-26 11:44:41 +00:00
John Baldwin
304a4c6fb1 - Retire npe_defrag(), gem_defrag(), msk_defrag(), nfe_defrag(), and
re_defrag() and use m_collapse() instead.
- Replace a reference to ath_defrag() in a comment in if_wpi.c with
  m_collapse().
2008-01-17 23:37:47 +00:00
Konstantin Belousov
89b57fcf01 Fix for the panic("vm_thread_new: kstack allocation failed") and
silent NULL pointer dereference in the i386 and sparc64 pmap_pinit()
when the kmem_alloc_nofault() failed to allocate address space. Both
functions now return error instead of panicing or dereferencing NULL.

As consequence, vmspace_exec() and vmspace_unshare() returns the errno
int. struct vmspace arg was added to vm_forkproc() to avoid dealing
with failed allocation when most of the fork1() job is already done.

The kernel stack for the thread is now set up in the thread_alloc(),
that itself may return NULL. Also, allocation of the first process
thread is performed in the fork1() to properly deal with stack
allocation failure. proc_linkup() is separated into proc_linkup()
called from fork1(), and proc_linkup0(), that is used to set up the
kernel process (was known as swapper).

In collaboration with:	Peter Holm
Reviewed by:	jhb
2007-11-05 11:36:16 +00:00
Olivier Houchard
64a2135deb Remove a staled comment, NPE-C should work fine.
Reviewed by:	sam
2007-11-04 21:54:52 +00:00
Kevin Lo
976b010645 Spelling fix for interupt -> interrupt 2007-10-12 06:03:46 +00:00
Marius Strobl
55aaf894e8 Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.

Suggested by:	jhb
Reviewed by:	grehan, jhb, marcel
Approved by:	re (kensmith), jhb (PCI maintainer hat)
2007-09-30 11:05:18 +00:00
Olivier Houchard
f530d4f06d Ok I hope I got it right this time.
After discussion with Sam, switch back to use firmware(9) instead of
having the firmware in hex format.
Put the binary firmware uuencoded into sys/contrib/dev/npe, and slap a
LICENSE file, as found on the Intel website.

Approved by:	re (blanket), mux (mentor)
MFC After:	1 week
2007-09-27 22:39:49 +00:00
Olivier Houchard
88af309a0b Now that Intel changed the license for the NPE firmware, import it directly
hexed into our tree, instead of requiring the user to download it.

Approved by:	re (blanket)
MFC after:	1 week
2007-09-27 21:18:34 +00:00
Olivier Houchard
4c865ababe Add various macros for the ADMA unit.
Approved by:	re (blanket)
2007-09-22 22:25:24 +00:00
Olivier Houchard
16dcd342a9 Add a driver for the 7seg found on the CRB board, largely based on the
IQ31244 version.

Approved by:	re (blanket)
2007-09-22 16:25:43 +00:00
Olivier Houchard
33321c8166 There's no need to re-read PCIR_COMMAND once we set it.
Approved by:	re (blanket)
2007-09-04 18:45:27 +00:00
Olivier Houchard
0566a63ff3 Cleanup
Approved by:	re (blanket)
2007-07-27 14:53:42 +00:00
Olivier Houchard
55f9380c2c Do not define NIRQ, it is already defined in include/intr.h
Approved by:	re (blanket)
2007-07-27 14:53:06 +00:00
Olivier Houchard
b93e48d2f9 Share the timer and watchdog drivers with the i81342. It's the same,
except it uses different registers.

Approved by:	re (blanket)
2007-07-27 14:52:04 +00:00
Olivier Houchard
e26a6af3af Add initial IOP342 support.
Thanks to Intel for providing sample hardware.

Approved by:	re (blanket)
2007-07-27 14:50:57 +00:00
John Hay
aeefab2b98 Remove the hardcoded IXP425_UART?_VBASE values in the
uart_ixp425_probe() and uart_cpu_getdev(). Change
uart_cpu_getdev() to use hints to find the console.

Reviewed by:	marcel
2007-05-29 18:10:42 +00:00
John Hay
728c8470f1 We do not need to get the irq out of ivars in ixp425_setup_intr(). By
this time they have already been set. In fact trying to set it here too
breaks irqs for pci devices.
2007-05-28 18:54:08 +00:00
John Hay
e6c51bdace Optimize a bit more, both the Avila and Pronghorn Metro boards work with
GPIO_TYPE_EDG_RISING.

Reviewed by:	sam
2007-05-28 18:45:16 +00:00