Commit Graph

286 Commits

Author SHA1 Message Date
Zbigniew Bodek
47a1ff355e Initially bind all interrupts to the boot CPU when using GICv3
This should be done by routing all interrupts to CPU0,
different assignment will be induced by either interrupts
shuffling or bus_bind_intr().

Reviewed by:   wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5229
2016-02-11 12:01:33 +00:00
Zbigniew Bodek
55bdcadded Call pmc_hook() correctly in the ARM64 interrupt handler
pmc_hook() was called only in case of the stray interrupt but should
rather be called on each interrupt. Move in to the arm_cpu_intr()
handler, out of the critical section too.

Reviewed by:   br
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5161
2016-02-11 11:59:32 +00:00
Zbigniew Bodek
be7aab76ec Introduce bus_bind_intr method for ARM64
It can be used to bind specific interrupt to a particular CPU.
Requires PIC support for interrupts binding.

Reviewed by:   wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5122
2016-02-11 11:58:27 +00:00
Zbigniew Bodek
513411c9f5 Fix bugs in interrupts allocation on ARM64
Separate interrupt descriptors lookup from allocation. It was possible
to perform config on non-existing interrupt simply by allocating spurious
descriptor.
Must lock the interrupt descriptors table lookup to avoid mismatches.
This ought to prevent trouble while setting up new interrupt
and dispatching existing one.
Use spin mutex rather than sleep mutex. This is mainly due to lock in
arm_dispatch_intr.
This should be eventually changed to a lock-less solution without
walking through a linked list on each interrupt.

Reviewed by:   andrew, wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5121
2016-02-11 11:57:13 +00:00
Zbigniew Bodek
8133eda921 Minor clean-ups for ARM64 GICv3 and GIC drivers
GICv3:
- move ICC_SGI1R_EL1 definitions to armreg.h and use proper system
  register's names
GIC:
- remove unused functions

Reviewed by:   andrew
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5119
2016-02-11 11:55:37 +00:00
Wojciech Macek
c7fc655f3f ARM64 disassembler: support for LDR instructions
Implemented disassembly for a whole bunch of
    various ldr instructions.

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D5217
2016-02-11 06:50:11 +00:00
Andrew Turner
d664515e68 Revert an arm64 change that sneaked in with r295464. 2016-02-10 10:28:33 +00:00
Andrew Turner
907fe11655 Update of the Allwinner drivers to:
* Use the Linux compat string
 * Use EARLY_DRIVER_MODULE to attach at the right time
 * Add a generic A10 kernel config file
 * A20 now use generic_timer
 * Add two new dts files for Olimex boards
 * Update our custom DTS file for A10 and A20 to use the same compatible
   property names as the vendor ones.

Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision:	https://reviews.freebsd.org/D4792
2016-02-10 09:19:29 +00:00
Gleb Smirnoff
b28cc462ad Include sys/_task.h into uma_int.h, so that taskqueue.h isn't a
requirement for uma_int.h.

Suggested by:	jhb
2016-02-09 20:22:35 +00:00
Andrew Turner
f75ef22a66 Use designated initialisers for the db disassembler interface to help with
finding the struct when searching for one of its members.
2016-02-09 10:18:22 +00:00
Wojciech Macek
c00a03a11d Ignore invalid page descriptors in ARM64 pmap_mincore
Prevent the function from null-pointer-dereference when unexisting
    mapping is being processed.

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           zbb, cognet
Differential revision: https://reviews.freebsd.org/D5228
2016-02-09 06:26:27 +00:00
Andrew Turner
55beb2a538 Implement kdb_cpu_sync_icache on arm64.
Sponsored by:	ABT Systems Ltd
2016-02-05 15:38:28 +00:00
Andrew Turner
f13ec4b40e Enable checking of the stack alignment. The stack should be aligned to a
16-byte value. With this the hardware will check if a memory access uses
an incorrectly aligned stack pointer as the base address.

Sponsored by:	ABT Systems Ltd
2016-02-04 17:22:15 +00:00
Ruslan Bukin
46c9b07f22 Fix build. 2016-02-04 11:52:53 +00:00
Gleb Smirnoff
6c95c7903c Fix build. 2016-02-04 03:55:41 +00:00
Andrew Turner
729ac0ee8c Handle a misaligned stack pointer exception from userspace. The exception
still needs to be enabled, but this will help with testing.

Sponsored by:	ABT Systems Ltd
2016-02-03 17:00:19 +00:00
Andrew Turner
3df911720b Increase the size of PHYS_AVAIL_SIZE to allow firmware to provide a large
number of physical memory locations we can access. This is the case on
some HiKey boards that may have UEFI reserved memory dispersed through the
physical space.

Sponsored by:	ABT Systems Ltd
2016-02-02 17:59:43 +00:00
Andrew Turner
332b343376 Ensure we don't overflow the phys_avail array. Some firmware may provide
more memory locations than we have space to record.

Sponsored by:	ABT Systems Ltd
2016-02-02 17:57:15 +00:00
Andrew Turner
50d9282660 Increase the space we use after the kernel to 8MiB. On 2GiB HiKey board we
would try to access data past this point stopping the boot.

Sponsored by:	ABT Systems Ltd
2016-02-02 16:35:37 +00:00
Andrew Turner
2c0ed87ef8 Only look for the ranges property when we have children. This fixes booting
on systems with a gicv2, but no PCIe so no gicv2m.

Sponsored by:	ABT Systems Ltd
2016-02-02 16:32:44 +00:00
Andrew Turner
87e19994e1 Implement single stepping on arm64. We need to set the single step bits in
the processor and debug state registers. A flag has been added to the pcb
to tell us when to enable single stepping for a given thread.

Reviewed by:	kib
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D4730
2016-02-02 10:28:56 +00:00
Andrew Turner
5df33bf4df Correctly handle the case where copystr(9) is given a string longer than
the passed in length. In this case we need to return ENAMETOOLONG.
2016-02-02 10:11:56 +00:00
Zbigniew Bodek
4111e0a100 Fix sending IPI to all CPUs on ARM64
There is no explanation why IPI ID is incremented here by "16".
This should have been removed in r285533 but somehow survived.

Reviewed by:   wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5120
2016-01-29 18:43:51 +00:00
Wojciech Macek
8a1867f4aa Framework for ARM64 instruction disassembler
Provide an easy to use framework for ARM64 DDB disassembler.
    This commit does not contain full list of instruction opcodes.

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           zbb, andrew, cognet
Differential revision: https://reviews.freebsd.org/D5114
2016-01-29 13:06:30 +00:00
Zbigniew Bodek
db7cfc199e Fix VNIC enumeration after r294993 and r294990
ofw_bus_get_node() must be tested against negative values since
missing parent bus method will result in calling the default method
which simply returns (-1): sys/dev/ofw/ofw_bus_if.m
This was lost in the review process.

Obtained from: Semihalf
Sponsored by:  Cavium
2016-01-28 16:58:49 +00:00
Zbigniew Bodek
68a594774e Add FDT bus capabilities to ThunderX PCI driver
New ThunderX firmware incorporates modified DTB that presents
different device hierarchy. In the new device tree, MDIO
devices are below two additional buses that oddly hang on
PCI bridge.

Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5069
2016-01-28 15:40:56 +00:00
Zbigniew Bodek
88c5cdf401 Correct alloc_ and release_resource methods in thunder_pcie driver
- Avoid using BUS_ macros as bus_generic_ functions should be used instead.
- Fix mistaken device_t pointers in thunder_pcie_alloc_resource.
  Should use dev->parent method and allocate resource for child device

Reviewed by:   wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5068
2016-01-28 15:38:02 +00:00
Zbigniew Bodek
bc5758b633 Divide ThunderX PCIe driver to general and FDT part
- Separate FDT and general PCIe driver parts
- Drop some irrelevant printfs that cannot be displayed in
  FDT attach
- Move ranges parsing to FDT portion of PCIe code

Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5067
2016-01-28 15:34:13 +00:00
Wojciech Macek
8eb447cc45 Fix mutex releasing in ARM64 cpu_switch
The code should be comparing pointers, not any data
    gathered from a blocked_lock.

Spotted by:            cognet
Approved by:           zbb, cognet (mentor)
Differential revision: https://reviews.freebsd.org/D5100
2016-01-28 12:00:17 +00:00
John Baldwin
aa949be551 Convert ss_sp in stack_t and sigstack to void *.
POSIX requires these members to be of type void * rather than the
char * inherited from 4BSD.  NetBSD and OpenBSD both changed their
fields to void * back in 1998.  No new build failures were reported
via an exp-run.

PR:		206503 (exp-run)
Reviewed by:	kib
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D5092
2016-01-27 17:55:01 +00:00
Justin Hibbits
2dd1bdf183 Convert rman to use rman_res_t instead of u_long
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources.  For
now, this is still compatible with u_long.

This is step one in migrating rman to use uintmax_t for resources instead of
u_long.

Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.

This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.

Reviewed By: jhb
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
2016-01-27 02:23:54 +00:00
Zbigniew Bodek
004ae5cbbd Simplify GICv3 related drivers' naming
Rename gic_v3_ instances to simply use 'gic' and 'its'.
The information about the controller's revision is printed
in the device announcement during boot anyway.
The intention behind this change is to avoid somewhat misleading
GIC instances naming such as:
    gic_v30
    gic_v31
    ...
etc.

Submitted by:  Zbigniew Bodek <zbb@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5016
2016-01-25 15:18:32 +00:00
Zbigniew Bodek
7ea5004ba7 Create proper FDT attachment for GICv2m
Avoid probing GICv2m to any parent bus/driver. Instead, match
GICv2m driver with FDT complatible strings as not every GIC
has a MSI controller in the form of GICv2m extension.

Submitted by:  Zbigniew Bodek <zbb@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5015
2016-01-25 15:10:43 +00:00
Andrew Turner
60f9d31cd3 Stop including fdt_common.h in the arm64 code. We don't use anything from
it, however may have relied on header pollution to pull in the needed
headers through it

Sponsored by:	ABT Systems Ltd
2016-01-22 16:35:01 +00:00
Zbigniew Bodek
16aec470eb Revert r294267 to avoid using experimental VFS_AIO in ARM64's GENERIC
Remove VFS_AIO from the ARM64's GENERIC as it can be used
as a loadable module.
2016-01-20 11:34:22 +00:00
Zbigniew Bodek
107ef92ffe Enable AIO interface on ARM64 platforms
Add VFS_AIO to generic config to allow using of high-performance
asynchronous disk AIO operation.

Reviewed by:   imp
Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D4979
2016-01-18 14:11:34 +00:00
Zbigniew Bodek
6f675c9d20 Update ThunderX PCIe driver to fit new DTS layout
In recent EFI the DTS entries changed for PCIe controller.
This commit fixes internal PCIe, external is yet TBD.

Submitted by:  Dominik Ermel <der@semihalf.com>
Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D4976
2016-01-18 13:31:29 +00:00
Dmitry Chagin
038c720553 Implement vsyscall hack. Prior to 2.13 glibc uses vsyscall
instead of vdso. An upcoming linux_base-c6 needs it.

Differential Revision:  https://reviews.freebsd.org/D1090

Reviewed by:	kib, trasz
MFC after:	1 week
2016-01-09 20:18:53 +00:00
Ian Lepore
a195a8e177 Fix the arm64 build by adding an all-important '&' to get a pointer.
I'm not sure how I missed the error when I test-built here, I guess the
pointy hat must have slipped down over my eyes.
2016-01-02 21:13:14 +00:00
Nathan Whitehorn
9f4a7eae43 Make using the #address-cells property on the interrupt parent in device
tree parsing opt-out rather than opt-in. All FDT-based systems as well as
PowerPC systems with real Open Firmware use the CHRP-derived binding that
includes it, which makes SPARC the odd man out here. Making it opt-out
avoids astonishment on new platform bring up.
2016-01-02 19:28:35 +00:00
Ian Lepore
002ef20ca8 Add an OF_decode_addr() implementation for arm64.
Discussed with:		andrew
2016-01-02 19:14:19 +00:00
Ian Lepore
69dcb7e771 Make the 'env' directive described in config(5) work on all architectures,
providing compiled-in static environment data that is used instead of any
data passed in from a boot loader.

Previously 'env' worked only on i386 and arm xscale systems, because it
required the MD startup code to examine the global envmode variable and
decide whether to use static_env or an environment obtained from the boot
loader, and set the global kern_envp accordingly.  Most startup code wasn't
doing so.  Making things even more complex, some mips startup code uses an
alternate scheme that involves calling init_static_kenv() to pass an empty
buffer and its size, then uses a series of kern_setenv() calls to populate
that buffer.

Now all MD startup code calls init_static_kenv(), and that routine provides
a single point where envmode is checked and the decision is made whether to
use the compiled-in static_kenv or the values provided by the MD code.

The routine also continues to serve its original purpose for mips; if a
non-zero buffer size is passed the routine installs the empty buffer ready
to accept kern_setenv() values.  Now if the size is zero, the provided buffer
full of existing env data is installed.  A NULL pointer can be passed if the
boot loader provides no env data; this allows the static env to be installed
if envmode is set to do so.

Most of the work here is a near-mechanical change to call the init function
instead of directly setting kern_envp.  A notable exception is in xen/pv.c;
that code was originally installing a buffer full of preformatted env data
along with its non-zero size (like mips code does), which would have allowed
kern_setenv() calls to wipe out the preformatted data.  Now it passes a zero
for the size so that the buffer of data it installs is treated as
non-writeable.
2016-01-02 02:53:48 +00:00
Andrew Turner
5f0a5fefc6 Decode and print the ID_AA64* registers on boot. These registers hold
information on what the core supports. In most cases these will be
identical across most CPUs in the SoC, however there may be the case where,
with a big.LITTLE setup they may differ. In this case we print the
decoded data on all CPUs.

Reviewed by:	kib
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D4725
2015-12-30 17:36:34 +00:00
Andrew Turner
91569f1f38 Increase the size and alignment of the setjmp buffer. This will allow for
possible future CPU extentions with larger registers.

jmp_buf's size and alignment are baked into the ABI of third party libraries
and thus are very hard to change later so it is best to waste a small amount
of space now.

Reviewed by:	brooks
Differential Revision:	https://reviews.freebsd.org/D3956
2015-12-23 15:22:44 +00:00
Andrew Turner
122493cf95 Support the variant of the interrupt-map property where the parent bus has
the #address-cells property set. For this we need to read more data before
the parent interrupt description.

this is only enabled on arm64 for now as it's not quite compliant with the
ePAPR spec. We should use a default of 2 where the #address-cells property
is missing, however this will need further testing across architectures.

Obtained from:	ABT Systems Ltd
Sponsored by:	SoftIron Inc
Differential Revision:	https://reviews.freebsd.org/D4518
2015-12-17 17:00:04 +00:00
Andrew Turner
68fe2d8f70 Add support for MSI interrupts to the gicv2m controller. The allocation
is still quite simplistic, it just increments a counter to use the next
interrupt.

Obtained from:	ABT Systems Ltd
Sponsored by:	SoftIron Inc
2015-12-14 16:07:20 +00:00
Andrew Turner
90257a2b6c Skip restoring more registers when returning from an exception taken in
the kernel. These registers are all callee saved, and as such will be
restored before returning to the exception handler.

Userland still needs these registers to be restored as they may be changed
by the kernel and we don't currently track these places.
2015-12-14 10:06:01 +00:00
Andrew Turner
a38fc8ca6a Sort the list of NICs after the mii options. While here add the msk driver
as it has now been tested.

Sponsored by:	SoftIron Inc
2015-12-11 15:25:47 +00:00
Andrew Turner
4b771f1b99 Add support for the GICv2M extension to the GICv2 interrupt controller.
This is (oddly) specified in the ARM Server Base System Architecture. It
extends the GICv2 to support MSI and MSI-X interrupts, however only the
latter are currently supported.

Only the FDT attachment is currently supported, however the attachment
and core driver are split to help adding ACPI support in the future.

Obtained from:	ABT Systems Ltd
Relnotes:	yes
Sponsored by:	SoftIron Inc
2015-12-10 16:40:38 +00:00
Andrew Turner
6d8433cb00 Remove pic_map_msix from ARM64, it is unneeded as all mappings happen
through pic_map_msi (without the x).

Sponsored by:	ABT Systems Ltd
2015-12-10 15:51:02 +00:00
Andrew Turner
c1d5e7a1f1 Reduce the numbers of levels of indirection in arm64 pcib drivers by making
the MSI & MSI-X handler functions be directly callable from the driver
methods.

Sponsored by:	ABT Systems Ltd
2015-12-10 13:19:30 +00:00
Konstantin Belousov
4d22d07a07 Add support for usermode (vdso-like) gettimeofday(2) and
clock_gettime(2) on ARMv7 and ARMv8 systems which have architectural
generic timer hardware. It is similar how the RDTSC timer is used in
userspace on x86.

Fix a permission problem where generic timer access from EL0 (or
userspace on v7) was not properly initialized on APs.

For ARMv7, mark the stack non-executable. The shared page is added for
all arms (including ARMv8 64bit), and the signal trampoline code is
moved to the page.

Reviewed by:	andrew
Discussed with:	emaste, mmel
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D4209
2015-12-07 12:20:26 +00:00
Andrew Turner
9d4de283d5 Rework the exception entry/return functions to make them valid frames to be
unwound through. For this we need the frame pointer (x29) to point to the
location on the stack where we stored the previous frame pointer, and link
register. To simplify this the stack pointer is only adjusted by addition
and subtraction, and not through the use of post increment on loads and
stores.

The updated frame layout is:

+------------+
| lr -- x30  |
+------------+
| fp -- x29  | <-- x29 points at this
+------------+
| Trap frame |
| ...        |
|            | <-- sp points at this
+------------+

The only difference is the first two items, and setting of x29.

Sponsored by:	ABT Systems Ltd
2015-12-01 12:37:04 +00:00
Andrew Turner
119a353e3d Rework the atomic code to reduce the repetition. This merges some of the
atomic functions where they are almost identical, or have acquire/release
semantics.

While here clean these function up. The cbnz instruction doesn't change
the condition flags so drop cc, however they should have memory added to the
clobber list.

Reviewed by:	kib
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D4318
2015-12-01 12:27:36 +00:00
Andrew Turner
1e888d7870 Print useful information when we hit a data abort we can't handle. This
prints the trap frame, along with the exception syndrome and fault address
registers. Even though esr is 64-bits here it is only 32-bits in hardware
so only print the valid 32-bits.

While here also print esr and far when appropriate after printing the trap
frame.

Sponsored by:	ABT Systems Ltd
2015-12-01 09:52:41 +00:00
Konstantin Belousov
4424a685c2 Shorten conditional branch code.
Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
2015-11-30 10:18:15 +00:00
Konstantin Belousov
5cb72aa7ec Remove unneeded instructions.
Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
2015-11-30 10:17:13 +00:00
Konstantin Belousov
724f4b62b0 Remove sv_prepsyscall, sv_sigsize and sv_sigtbl members of the struct
sysent.

sv_prepsyscall is unused.

sv_sigsize and sv_sigtbl translate signal number from the FreeBSD
namespace into the ABI domain.  It is only utilized on i386 for iBCS2
binaries.  The issue with this approach is that signals for iBCS2 were
delivered with the FreeBSD signal frame layout, which does not follow
iBCS2.  The same note is true for any other potential user if
sv_sigtbl.  In other words, if ABI needs signal number translation, it
really needs custom sv_sendsig method instead.

Sponsored by:	The FreeBSD Foundation
2015-11-28 08:49:07 +00:00
Ed Maste
20e0b5fcce Correct arm64 gic_v3 sizeof argument
No functional change as 'struct resource *' and 'struct resource **'
have the same size, but the former is the proper type.

PR:		204768
Submitted by:	David Binderman
2015-11-26 21:05:55 +00:00
Andrew Turner
ac4dad9e2f Add support for moving the DMAP range. This is needed as some AMD SoCs
place physical memory at an address outside the old DMAP range. This is an
issue as we rely on being able to move from PA -> VA using this range.

Obtained from:	Patrick Wildt <patrick@bitrig.org> (earlier version)
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D3885
2015-11-24 11:01:43 +00:00
Svatopluk Kraus
eae22c4430 Revert r291142.
The not quite consistent logic for bounce pages allocation is utilizited
by re(4) interface which can hang now.

Approved by:	kib (mentor)
2015-11-23 11:19:00 +00:00
Svatopluk Kraus
6fa7734d6f Fix BUS_DMA_MIN_ALLOC_COMP flag logic. When bus_dmamap_t map is being
created for bus_dma_tag_t tag, bounce pages should be allocated
only if needed.

Before the fix, they were allocated always if BUS_DMA_COULD_BOUNCE flag
was set but BUS_DMA_MIN_ALLOC_COMP not. As bounce pages are never freed,
it could cause memory exhaustion when a lot of such tags together with
their maps were created.

Note that there could be more maps in one tag by current design.
However BUS_DMA_MIN_ALLOC_COMP flag is tag's flag. It's set after
bounce pages are allocated. Thus, they are allocated only for first
tag's map which needs them.

Approved by:	kib (mentor)
2015-11-21 19:55:01 +00:00
Marius Strobl
ec2fbee752 Avoid a NULL pointer dereference in bounce_bus_dmamap_unload() when
the map has been created via bounce_bus_dmamem_alloc(). In that case
bus_dmamap_unload(9) typically isn't called during normal operation
but still should be during detach, cleanup from failed attach etc.

Submitted by:	yongari
MFC after:	3 days
2015-11-21 02:08:47 +00:00
Marius Strobl
8fd47ac11c Avoid a NULL pointer dereference in bounce_bus_dmamap_sync() when the
map has been created via bounce_bus_dmamem_alloc(). Even for coherent
DMA - which bus_dmamem_alloc(9) typically is used for -, calling of
bus_dmamap_sync(9) isn't optional.

PR:		188899 (non-original problem)
MFC after:	3 days
2015-11-20 02:23:35 +00:00
Ed Maste
f51f84a628 Fix typo in message from arm64 ITS workaround 2015-11-09 01:49:25 +00:00
Ed Maste
22a00274ac Sync arm64 GENERIC whitespace/comments with amd64
Sponsored by:	The FreeBSD Foundation
2015-11-08 21:08:31 +00:00
Ed Maste
13d3ad4d71 arm64: add igb(4) to GENERIC
We have em(4) in GENERIC already and so also supporting the related
igb(4) makes sense.

Sponsored by:	The FreeBSD Foundation
2015-11-07 04:46:34 +00:00
Andrew Turner
1df3f63ac5 Mark the arm64 nexus devices to be attached early. This allows multipass
to work correctly. Without it the pass quickly moves to the final pass
before the nexus device attaches.

Sponsored by:	ABT Systems Ltd
2015-11-06 14:36:21 +00:00
Ian Lepore
53f93ed3ff Fix an alignment check that is wrong in half the busdma implementations.
This will enable the elimination of a workaround in the USB driver that
artifically allocates buffers twice as big as they need to be (which
actually saves memory for very small buffers on the buggy platforms).

When deciding how to allocate a dma buffer, armv4, armv6, mips, and
x86/iommu all correctly check for the tag alignment <= maxsize as enabling
simple uma/malloc based allocation.  Powerpc, sparc64, x86/bounce, and
arm64/bounce were all checking for alignment < maxsize; on those platforms
when alignment was equal to the max size it would fall back to page-based
allocators even for very small buffers.

This change makes all platforms use the <= check.  It should be noted that
on all platforms other than arm[v6] and mips, this check is relying on
undocumented behavior in malloc(9) that if you allocate a block of a given
size it will be aligned to the next larger power-of-2 boundary.  There is
nothing in the malloc(9) man page that makes that explicit promise (but the
busdma code has been relying on this behavior all along so I guess it works).

Arm and mips code uses the allocator in kern/subr_busdma_buffalloc.c, which
does explicitly implement this promise about size and alignment.  Other
platforms probably should switch to the aligned allocator.
2015-11-02 23:37:19 +00:00
Andrew Turner
deeaa1c566 Make the arm64_cpu driver quiet as it adds no new information.
Only report the register used to start each cpu in bootverbose.

Sponsored by:	ABT Systems Ltd
2015-11-02 16:43:26 +00:00
Andrew Turner
4dd6ed5ce6 Mark functions as such. This means we call them directly rather than have
the dynamic linker copy them, but not relocate them at the new location.
This allows us to run sqlite3 without it crashing.

Sponsored by:	ABT Systems Ltd
2015-10-27 22:24:57 +00:00
Zbigniew Bodek
db94e32ba7 Fix bus numbering in ThunderX ITS quirk
Internal busses (thus ECAM access) should be mapped to
all values from 0 to 143.

Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D3753
2015-10-25 23:27:08 +00:00
Zbigniew Bodek
71e2c1d4c0 Add support for unspecified ranges on ThunderX system
When one tries to allocate a resource with unspecified range,
read already configured BAR values (by UEFI or whatever).
This is necessary to make VNIC VFs working and to allow them to be
properly allocated.

Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D3752
2015-10-25 23:22:40 +00:00
Ed Maste
5280a92784 arm64: remove exception instruction length assertion
From the (now removed) comment:

 * It is unclear in some cases if the bit is implementation defined.
 * The Foundation Model and QEMU disagree on if the IL bit should
 * be set when we are in a data fault from the same EL and the ISV
 * bit (bit 24) is also set.

Instead of adding even more special cases just remove the assertion.

Approved by:	andrew
Sponsored by:	The FreeBSD Foundation
2015-10-23 15:24:00 +00:00
Jason A. Harmening
a50730587b Remove unclear comment about address truncation in busdma. Add (hopefully much clearer) comment at declaration of PHYS_TO_VM_PAGE().
Noted by:	avg
2015-10-23 12:03:25 +00:00
Ed Schouten
2ff069a7bc Add support for CloudABI on ARM64.
It turns out that it is pretty easy to make CloudABI work on ARM64. We
essentially only need to copy over the sysvec from AMD64 and ensure that
we use ARM64 specific registers.

As there is an overlap between function argument and return registers,
we do need to extend cloudabi64_schedtail() to only set its values if
we're actually forking. Not when we're creating a new thread.

Reviewed by:	kib
Differential Revision:	https://reviews.freebsd.org/D3917
2015-10-22 11:09:25 +00:00
Jason A. Harmening
d394b026f6 Use pmap_quick* functions in arm64 busdma to make bounce buffer synchronization more flexible and avoid borrowing UVAs for userspace buffers. This is mostly equivalent to r286785 and r286787 for x86.
Differential Revision:	https://reviews.freebsd.org/D3870
2015-10-21 19:44:20 +00:00
Ed Maste
598cd16442 arm64: Enable CTF for DTrace support
Sponsored by:	The FreeBSD Foundation
2015-10-21 19:08:16 +00:00
Andrew Turner
80c4b9e575 Use 4 levels of page tables when enabling the MMU. This will allow us to
boot on an SoC that places physical memory at an address past where three
levels of page tables can access in an identity mapping.

Submitted by:   Wojciech Macek <wma@semihalf.com>,
                Patrick Wildt <patrick@bitrig.org>
Differential Revision:	https://reviews.freebsd.org/D3885 (partial)
Differential Revision:	https://reviews.freebsd.org/D3744
2015-10-19 13:20:23 +00:00
Zbigniew Bodek
32f849ca1e Add ThunderX VNIC to arm64/GENERIC kernel
Add vnic to enabled networking cards and enable SR-IOV by the way.

Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
2015-10-18 22:13:21 +00:00
Andrew Turner
22c6adff09 Correctly align the stack. The early csu assumed we passed the aux vector
in through the stack pointer, however this may have been misaligned
causing some userland applications to crash. A workaround was committed in
r284707 where userland would check if the aux vector was passed using the
old or new ABI and adjust the stack if needed. As 4 months have passed it
is time to move to the new ABI, with the expectation the compat code in csu
and the runtime linker to be removed in the future.

Sponsored by:	ABT Systems Ltd
2015-10-18 13:23:21 +00:00
Andrew Turner
6aa751cff1 Replace build_section_pagetable with build_l1_block_pagetable as it takes
an extra argument to specify the number of 1GiB pages to map. This should
be a nop as we are only mapping a single page, but when we move to use an
extra level of page tables we will be able to map a second block, e.g. if
the kernel was loaded over a 1GiB boundary.
2015-10-17 19:52:17 +00:00
Andrew Turner
81b4133adf Rename build_block_pagetable to build_l2_block_pagetable in preperation
for adding support for 4 levels of page tables.

Obtained from:	Patrick Wildt <patrick@bitrig.org>
2015-10-17 14:07:47 +00:00
Konstantin Belousov
153bf0bce0 Add checks for kernel VA accesses to the copyin(9) and related
functions on arm64.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D3907
2015-10-17 13:20:42 +00:00
Ed Schouten
632b5263c5 Properly set the return value for casueword to 0 upon success.
While trying to get multithreading working for CloudABI on aarch64, I
noticed that compare-and-exchange operations in kernelspace would always
fail. It turns out that we don't properly set the return value to 0 when
the compare and exchange succeeds.

Approved by:	andrew
Differential Revision:	https://reviews.freebsd.org/D3899
2015-10-15 17:50:28 +00:00
Konstantin Belousov
8598392cd1 Build changes that allow the modules on arm64.
- Move the required kernel compiler flags from Makefile.arm64 to kern.mk.
- Build arm64 modules as PIC; non-PIC relocations in .o for shared object
  output cannot be handled.
- Do not try to install aarch64 symlink.
- A hack for arm64 to avoid ld -r stage.  See the comment for the explanation.
  Some functionality is lost, like ctf handling, but hopefully will be
  restored after newer linker is available.

Reviewed by:	andrew, emaste
Tested by:	andrew (on real hardware)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3796
2015-10-08 17:42:08 +00:00
Konstantin Belousov
00a53ebe08 Implement in-kernel relocator for the arm64 module linker.
It is decided to go with the shared object file format for modules on
arm64, due to the Aarch64 instruction set details.  Combination of the
signed 28-bit offset in the branch instructions encoding together with
the supported memory model of compilers makes the relocatable object
support impossible or at least too hard.

Reviewed by:	andrew, emaste
Tested by:	andrew (on real hardware)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3796
2015-10-08 16:58:01 +00:00
Konstantin Belousov
fbc7b10762 Make the copyright notice in the file to match reality. Use the
recommended FreeBSD license text.

Approved by:	andrew
Discussed with:	emaste
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3846
2015-10-08 16:46:11 +00:00
Andrew Turner
8bdcc09641 When trying to execute from a misaligned address raise a SIGBUS with the
invalid address alignment code.

Obtained from:	EuroBSDCon
Sponsored by:	ABT Systems Ltd
2015-10-04 21:16:45 +00:00
Konstantin Belousov
b86860001b When asserting IL bit in exception syndrome register, print the raw
register value.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
2015-10-04 12:52:30 +00:00
Andrew Turner
9439047657 Use pmap_load more consistently. While here try to only load the data once
when we reuse the same data.

Obtained from:	EuroBSDCon Devsummit
Sponsored by:	ABT Systems Ltd
2015-10-01 10:43:40 +00:00
Andrew Turner
7991717238 Add the ENTRY/END entries around the exception handlers.
Obtained from:	EuroBSDCon Devsummit
Sponsored by:	ABT Systems Ltd
2015-10-01 09:44:15 +00:00
Alan Cox
9f86aba61c Exploit r288122 to address a cosmetic issue. Since PV chunk pages don't
belong to a vm object, they can't be paged out.  Since they can't be paged
out, they are never enqueued in a paging queue.  Nonetheless, passing
PQ_INACTIVE to vm_page_unwire() creates the appearance that these pages
are being enqueued in the inactive queue.  As of r288122, we can avoid
this false impression by passing PQ_NONE.

Submitted by:	kmacy (an earlier version)
Differential Revision:	https://reviews.freebsd.org/D1674
2015-09-26 07:18:05 +00:00
Ed Maste
7fc0791608 Remove apostrophe from AP's for consistency (arm64 mp_machdep) 2015-09-25 21:04:31 +00:00
Ed Maste
2ed39a2216 Add pass device to arm64 GENERIC (for smartctl)
Sponsored by:	The FreeBSD Foundation
2015-09-22 21:43:08 +00:00
Konstantin Belousov
37864a5451 Call ast when handling irq from userspace, otherwise we could miss
reschedule.  Right now arm_cpu_intr() does critical_exit() as the last
action, so the impact is not serious.

Remove duplicated interrupt disable in restore_registers macro, when
returning to usermode.  The do_ast macro disabled interrupts for us.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3714
2015-09-22 18:30:06 +00:00
Andrew Turner
9063d39e49 Don't restore interrupts when we are about to disable them in the next
instruction.
2015-09-22 16:46:34 +00:00
Konstantin Belousov
d50c68b2f0 Re-check for new ast after ast was handled. We should not return to
usermode with pending asts.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3667
2015-09-22 16:29:55 +00:00
Ed Maste
a9ee805d45 arm64 ThunderX PCIe workaround: enumerate only one slot for now
Otherwise an em(4) NIC is detected 32 times.

Submitted by:	wma@semihalf.com
Obtained from:	Semihalf
Differential Revision:	https://reviews.freebsd.org/D3706
2015-09-22 12:56:34 +00:00
Konstantin Belousov
0510aedcd5 Do not execute exception handlers with disabled interrupts.
We should not call vm_fault(), or send a signal, with interrupts
disabled.  MI kernel code is not prepared for such environment, not to
mention that this increases system latency, since code appears to be
executing as being under spinlock.

The FAR register for data aborts is read before the interrupts are
enabled, to avoid its corruption due to nested exception or context
switch.

Add asserts, similar to the checks done by other architectures, about
not taking page faults in non-sleepable contexts, rather than die with
late and somewhat confusing witness diagnostic.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3669
2015-09-18 17:09:59 +00:00