Commit Graph

6 Commits

Author SHA1 Message Date
wpaul
ec1e9f5da7 Modify the Adaptec "starfire" driver to reset the PHY on the MII bus
before selecting a mode. The Seeq PHY chips on the Adaptec cards that
use the AIC-6915 controller seem to need it in order to get them to
change modes correctly.

This corrects a problem that I noticed where my ANA-62022 board failed
to correctly program the full duplex bit in the macconfig1 register
when the interface was brought up. Running ifconfig sf0 would mask this
problem in some cases because polling the PHY status would cause the
miibus code to notice that full duplex was now needed and the statchg
callback would be invoked to configure the duplex setting. However it
would still get it wrong other times.

Also changed sf_miibus_statchg() to program the IPG register to match
the duplex setting in accordance with Adaptec manual's recommendations
(0x15 for full duplex, 0x11 for half duplex).
1999-12-05 20:02:45 +00:00
wpaul
31f952c8c4 Minor tweak: the subsystem device ID code for the quad port 62044 card
is documented to be 0x18 in the Adaptec manual, however there appears to
be a newer board rev with code 0x19. I added a #define for this and
updated the probe code so that this board will be properly identified
in the probe messages. (Currently it's just identified generically as
an AIC-6915 chip.)
1999-11-20 18:29:44 +00:00
wpaul
f0f2be7796 #ifdef out the definition for the small packet RX ring. I ended up only
using one RX ring because of the alignment issue, so we may as well save
a few K of memory by not allocating space for it.
1999-09-03 20:58:39 +00:00
wpaul
851ae78ba3 Convert the Adaptec and Winbond drivers to miibus. 1999-08-30 23:08:32 +00:00
peter
e4b04a2b21 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
wpaul
bfb34cd229 This commit adds device driver support for Adaptec Duralink PCI fast
ethernet controllers based on the AIC-6915 "Starfire" controller chip.
There are single port, dual port and quad port cards, plus one 100baseFX
card. All are 64-bit PCI devices, except one single port model.

The Starfire would be a very nice chip were it not for the fact that
receive buffers have to be longword aligned. This requires buffer
copying in order to achieve proper payload alignment on the alpha.
Payload alignment is enforced on both the alpha and x86 platforms.
The Starfire has several different DMA descriptor formats and transfer
mechanisms. This driver uses frame descriptors for transmission which
can address up to 14 packet fragments, and a single fragment descriptor
for receive. It also uses the producer/consumer model and completion
queues for both transmit and receive. The transmit ring has 128
descriptors and the receive ring has 256.

This driver supports both FreeBSD/i386 and FreeBSD/alpha, and uses newbus
so that it can be compiled as a loadable kernel module. Support for BPF
and hardware multicast filtering is included.
1999-07-25 04:32:50 +00:00