mode. We don't know why it failed, so we can't know that a retry will
also fail (the low-level driver might have reset the controller state
machine or something similar that would allow a retry to work).
(sys/dev/iscsi_initiator/ instead of sys/dev/iscsi/initiator/), to make
room for the new one. This is also more logical location (kernel module
being named iscsi_initiator.ko, for example). There is no ongoing work
on this I know of, so it shouldn't make life harder for anyone.
There are no functional changes, apart from "svn mv" and adjusting paths.
The flag was mandatory since r209792, where vm_page_grab(9) was
changed to only support the alloc retry semantic.
Suggested and reviewed by: alc
Sponsored by: The FreeBSD Foundation
manifested itself in out of chain frame conditions.
When the driver ran out of chain frames, the request in question
would get completed early, and go through mpssas_scsiio_complete().
In mpssas_scsiio_complete(), the negation of the CAM status values
(CAM_STATUS_MASK | CAM_SIM_QUEUED) was ORed in instead of being
ANDed in. This resulted in a bogus CAM CCB status value. This
didn't show up in the non-error case, because the status was reset
to something valid (e.g. CAM_REQ_CMP) later on in the function.
But in the error case, such as when the driver ran out of chain
frames, the CAM_REQUEUE_REQ status was ORed in to the bogus status
value. This led to the CAM transport layer repeatedly releasing
the SIM queue, because it though that the CAM_RELEASE_SIMQ flag had
been set. The symptom was messages like this on the console when
INVARIANTS were enabled:
xpt_release_simq: requested 1 > present 0
xpt_release_simq: requested 1 > present 0
xpt_release_simq: requested 1 > present 0
mps_sas.c: In mpssas_scsiio_complete(), use &= to take status
bits out. |= adds them in.
In the error case in mpssas_scsiio_complete(), set
the status to CAM_REQUEUE_REQ, don't OR it in.
MFC after: 3 days
Sponsored by: Spectra Logic
The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols). This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.
This makes it easier to implement new drivers which are "mostly ns8250"
but with some small difference such as needing to enable clocks or poke
a non-standard register at probe or attach time.
device compatible with multiple drivers matches the more specific driver
first and doesn't overwrite it later with the more generic. Move the
generic ns16550 to the end of the list.
The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a
couple quirks, which are now supported by sdhci(4) as of r254507.
This should work for all TI SoCs that use the MMCHS hardware, but it has
only been tested on AM335x right now, so this enables it on those platforms
but leaves the existing ti_mmchs driver in place for other OMAP variants
until they can be tested.
This initial incarnation lacks DMA support (coming soon). Even without it
this improves performance pretty noticibly over the ti_mmchs driver,
primarily because it now does multiblock IO.
The sdhci spec says that if the base or timeout clock frequency in the
capabilities register is zero, the driver must obtain the frequency "from
another source." This change defines that other source to be the low-level
hardware driver, which can pre-set the frequencies in slot.max_clk and
slot.timeout_clk before calling sdhci_init_slot().
This helps with a growing number of SoCs that have sdhci base clock
frequencies that either won't fit into the range allowed by the number of
bits available in the capabilities register, or the frequency is runtime-
configurable.
the response bits the way we do in software. While the hardware is just
doing the sensible thing rather than leaving it to the software, it's in
violation of the spec by doing so. Grrrr.
* Add in MEM_LOAD_UOPS_LLC_HIT_RETIRED for both sandy bridge and sandy
bridge Xeon. Right now it only is enabled for Sandy Bridge.
* D2/0F is actually a combination rather than a separate counter, so
just flip that on for the CPU types that support it.
There's an errata for using this on SB Xeon hardware - I've documented
it in kern/181346.
Tested:
* Sandy Bridge
* Sandy Bridge Xeon
Sponsored by: Netflix, Inc.
ensure that all such commands have a non-zero retry count except for those
that are expected to fail (for example, because they are used to probe for
feature support).
While it is possible to pass a retry count down to the hardware driver in
the command request structure, no hardware driver currently implements any
retry logic. The hardware doesn't know much about the context of a single
request, so it makes more sense to handle retries at a layer that does.
This adds retry loops to the mmc_wait_for_cmd() and mmc_wait_for_app_cmd()
functions. These functions are the gateway from other code within mmc.c
to the hardware. App commands are a sequence of two commands and a retry
has to rerun both of them in order, so it needs its own retry loop.
Retry looping is specifically NOT implemented in mmc_wait_for_request()
because it is the gateway for children on the bus, and they have to
implement their own retry logic depending on what makes sense for them.
has to be recalculated every time the SD clock frequency changes.
Also, tidy up the counter calculation... it makes no sense to calculate
a value one larger than the limit, then whine that it's too large and
truncate it to the limit. If the BROKEN_TIMEOUT quirk is set, don't
calculate the counter at all, just set it to the limit value.
The previous method was to set the D_UNMAPPED_IO flag in the cdevsw
for the driver. The problem with this is that in many cases (e.g.
sa(4)) there may be some instances of the driver that can handle
unmapped I/O and some that can't. The isp(4) driver can handle
unmapped I/O, but the esp(4) driver currently cannot. The cdevsw
is shared among all driver instances.
So instead of setting a flag on the cdevsw, set a flag on the cdev.
This allows drivers to indicate support for unmapped I/O on a
per-instance basis.
sys/conf.h: Remove the D_UNMAPPED_IO cdevsw flag and replace it
with an SI_UNMAPPED cdev flag.
kern_physio.c: Look at the cdev SI_UNMAPPED flag to determine
whether or not a particular driver can handle
unmapped I/O.
geom_dev.c: Set the SI_UNMAPPED flag for all GEOM cdevs.
Since GEOM will create a temporary mapping when
needed, setting SI_UNMAPPED unconditionally will
work.
Remove the D_UNMAPPED_IO flag.
nvme_ns.c: Set the SI_UNMAPPED flag on cdevs created here
if NVME_UNMAPPED_BIO_SUPPORT is enabled.
vfs_aio.c: In aio_qphysio(), check the SI_UNMAPPED flag on a
cdev instead of the D_UNMAPPED_IO flag on the cdevsw.
sys/param.h: Bump __FreeBSD_version to 1000045 for the switch from
setting the D_UNMAPPED_IO flag in the cdevsw to setting
SI_UNMAPPED in the cdev.
Reviewed by: kib, jimharris
MFC after: 1 week
Sponsored by: Spectra Logic
driver.
This tells consumers up the stack the maximum I/O size that the
controller can handle.
The I/O size is bounded by the number of scatter/gather segments
the controller can handle and the page size. For an amd64 system,
it works out to around 5MB.
Reviewed by: mjacob
MFC after: 3 days
Sponsored by: Spectra Logic
real JBOD mode (SYS PD) would fail fairly reliably during I/O.
Steal the mfi_disk.c check for this condition (indirectly) when establishing
d_maxsize.
Reviewed by: ambrisko@
MFC after: 4 weeks
Sponsored by: Yahoo! Inc.
routines and thus assert if one passes in a rate code with the
high bit set.
Since the high bit can indicate either IEEE80211_RATE_BASIC or
IEEE80211_RATE_MCS, it's up to the caller to determine whether
the rate is 11n or not, and either mask out the BASIC bit, or
call a different function.
(Yes, this does mean that net80211 should grow 11n-aware rate2phytype()
and rate2plcp() functions..)
This may need to happen for the other drivers - it's currently only
done (now) for iwn(4) and bwi(4).
PR: kern/181100
rather than just queueing. The former code was an attempt at getting
UDP performance up, but there have been customer reports of problems with it,
so the ixgbe approach seems the best solution for now.
command register. The lazy BAR allocation code in FreeBSD sometimes
disables this bit when it detects a range conflict, and will re-enable
it on demand when a driver allocates the BAR. Thus, the bit is no longer
a reliable indication of capability, and should not be checked. This
results in the elimination of a lot of code from drivers, and also gives
the opportunity to simplify a lot of drivers to use a helper API to set
the busmaster enable bit.
This changes fixes some recent reports of disk controllers and their
associated drives/enclosures disappearing during boot.
Submitted by: jhb
Reviewed by: jfv, marius, achadd, achim
MFC after: 1 day
the changes. Make sure that pci_alloc_msix() does give us the vectors
we need and fall back to MSI when it doesn't, also release any that
were allocated when insufficient.
MFC after: 3 days
Linux targets without breaking the existing IOCTL API.
- Remove some not-needed header file inclusions.
- Wrap a long line.
MFC after: 1 week
Reported by: Damjan Jovanovic <damjan.jov@gmail.com>
* Break out the single, static RX context into a pointer, and ..
* .. extend it to two RX contexts - a default and a PAN context.
Whilst here, add a few extra fields in preparation for further iwn(4)
work.
Tested:
* Intel 4965, STA mode - same level of stability
* Intel 5100, STA mode - no change
Submitted by: Cedric Gross <cg@gross.info>
unneeded checks for NULL, free(9) can handle NULL pointers on its own,
and the regions were allocated with M_WAITOK flag as well.
Reported and tested by: Larry Rosenman <ler@lerctr.org>
MFC after: 1 week
