Commit Graph

63 Commits

Author SHA1 Message Date
Warner Losh
bd34d48210 The SB1 has cohernet memory, so add it.
Also, Maxmem is better as a long.

Submitted by:	Neelkanth Natu
2009-07-05 15:20:16 +00:00
Warner Losh
46d854bbdb The SB1 needs a special value for the cache field of the pte.
Submitted by:	Neelkanth Natu
2009-07-05 15:19:28 +00:00
Warner Losh
72322b2318 compute the areas to save registers in for 64-bit access correctly. 2009-07-05 15:18:06 +00:00
Warner Losh
f8b89abb9d First cut at 64-bit types. not 100% sure these are all correct for
N32 ABI.
2009-07-05 15:17:11 +00:00
Warner Losh
8de20ddba8 Trim unreferenced goo. SDRAM likely should be next, but it is still
referenced.
2009-07-05 15:16:27 +00:00
Warner Losh
61a1eed0b4 First cut at atomics for 64-bit machines and SMP machines.
# Note: Cavium provided a port that has atomics similar to these, but
# that does a syncw; sync; atomic; sync; syncw where we just do the classic
# mips 'atomic' operation (eg ll; frob; sc).  It is unclear to me why
# the extra is needed.  Since my initial target is one core, I'll defer
# investigation until I bring up multiple cores.  syncw is an octeon specific
# instruction.
2009-07-05 15:13:24 +00:00
Warner Losh
24646e120c Bring in cdefs.h from NetBSD to define ABI goo.
Obtained from:	NetBSD
2009-07-05 08:14:00 +00:00
Warner Losh
0d978536b2 Pull in machine/cdefs.h for the ABI definitions. Provide a PTR_LA,
ala sgi, and use it in preference to a bare 'la' so that it gets
translated to a 'dla' for the 64-bit pointer ABIs.
2009-07-05 08:13:19 +00:00
Warner Losh
f547073088 Use uintptr_t rather than unsigned here for 64-bit correctness. 2009-07-05 07:01:34 +00:00
Warner Losh
da96ff5dae Define __ELF_WORD_SIZE appropriately for n64. Note for N32 I believe
this is correct.  While registers are 64-bit, n32 is a 32-bit ABI and
lives in a 32-bit world (with explicit 64-bit registers, however).
Change an 8, which was 4 + 4 or sizeof(int) + SZREG to be a simple '4
+ SZREG' to reflect the actual offset of the structure in question.
2009-07-05 07:00:51 +00:00
Warner Losh
64003afe2e (1) Use uintptr_t in preference to unsigned. The latter isn't right for
64-bit case, while the former is.

(2) include a SB1 specific coherency mapping

Submitted by:	Neelkanth Nath (2)
2009-07-05 06:56:51 +00:00
Warner Losh
4ecfc54d9d db_expr_t should be a intptr_t, not an int. These expressions can be
addresses or numbers, and that's a intptr_t if I ever saw one.
2009-07-05 06:44:37 +00:00
Warner Losh
6855d90580 Define COP0_SYNC for SB1 CPU.
Submitted by:	Neelkanth Natu
2009-07-05 06:43:01 +00:00
Warner Losh
2c1c8bb345 Switch to ABI agnostic ta0-ta3. Provide defs for this in the right
places.  Provide n32/n64 register name defintions.  This should have
no effect for the O32 builds that everybody else uses, but should help
make N64 builds possible (lots of other changes are needed for that).

Obtained from:	NetBSD (for the regdef.h changes)
2009-07-05 06:39:37 +00:00
Oleksandr Tymoshenko
09c817ba36 - MFC 2009-07-03 04:39:18 +00:00
Oleksandr Tymoshenko
00741bfc80 - Add support for handling TLS area address in kernel space.
From the userland point of view get/set operations are
    performed using sysarch(2) call.
2009-06-27 23:27:41 +00:00
Oleksandr Tymoshenko
5576af82b5 - Add guards to ensure that these files are included only once 2009-06-26 19:54:06 +00:00
Alan Cox
5797795f5a Correct the #endif comment.
Noticed by:	jmallett
Approved by:	re (kib)
2009-06-26 16:22:24 +00:00
Alan Cox
e999111ae7 This change is the next step in implementing the cache control functionality
required by video card drivers.  Specifically, this change introduces
vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all
architectures.  In addition, this changes adds a vm_cache_mode_t parameter
to kmem_alloc_contig() and vm_phys_alloc_contig().  These will be the
interfaces for allocating mapped kernel memory and physical memory,
respectively, with non-default cache modes.

In collaboration with:	jhb
2009-06-26 04:47:43 +00:00
Oleksandr Tymoshenko
6846a68073 - Mark temp variable as "earlyclobber" in assembler inline in
atomic_fetchadd_32.  Without it gcc would use it as input
    register for v and sometimes generate following code for
    function call like atomic_fetchadd_32(&(fp)->f_count, -1):

801238b4:       2402ffff        li      v0,-1
801238b8:       c2230018        ll      v1,24(s1)
801238bc:       00431021        addu    v0,v0,v1
801238c0:       e2220018        sc      v0,24(s1)
801238c4:       1040fffc        beqz    v0,801238b8 <dupfdopen+0x2e8>
801238c8:       00000000        nop

   Which is definitly wrong because if sc fails v0 is set to 0
   and previous value of -1 is overriden hence whole operation
   turns to bogus
2009-06-19 04:43:49 +00:00
Warner Losh
2e24c40fec bye bye. This is no longer referenced, but much code from it will
resurface for a bus-space implementation.
2009-06-14 06:14:25 +00:00
Warner Losh
55f888f68d Cavium-specific goo is no longer necessary here. Of course, I now
have to write a bus space for cavium, but that shouldn't be too hard.
2009-06-14 06:10:36 +00:00
Warner Losh
558955d6a8 Move this to a more approrpiate plae. 2009-06-14 06:01:46 +00:00
Warner Losh
f7edf22465 Bring this in from the cavium port. 2009-06-14 05:29:13 +00:00
Oleksandr Tymoshenko
5948288d97 - Use restoreintr instead of enableint while accessing pcpu in DO_AST 2009-06-05 08:37:11 +00:00
Oleksandr Tymoshenko
16a7c7be6d - Replace CPU_NOFPU and SOFTFLOAT options with CPU_FPU. By default
we assume that there is no FPU, because majority of SoC does
   not have it.
2009-05-26 22:40:12 +00:00
Oleksandr Tymoshenko
7dafc31d3e - Add type cast for atomic_cmpset_acq_ptr arguments 2009-05-26 16:35:05 +00:00
Oleksandr Tymoshenko
be6bd37bab - Remove now unused NetBSDism intr.h 2009-05-26 06:01:17 +00:00
Oleksandr Tymoshenko
9270c7be8b - Add MIPS_IS_KSEG0_ADDR, MIPS_IS_KSEG1_ADDR and MIPS_IS_VALID_PTR
macroses thet check if address belongs to KSEG0, KSEG1 or both
    of them respectively.
2009-05-16 02:39:13 +00:00
Oleksandr Tymoshenko
e7153b2583 Merge from HEAD 2009-05-06 22:40:01 +00:00
Alan Cox
7b89d46e0f A variety of changes:
Reimplement "kernel_pmap" in the standard way.

Eliminate unused variables.  (These are mostly variables that were
discarded by the machine-independent layer after FreeBSD 4.x.)

Properly handle a vm_page_alloc() failure in pmap_init().

Eliminate dead or legacy (FreeBSD 4.x) code.

Eliminate unnecessary page queues locking.

Eliminate some excess white space.

Correct the synchronization of pmap_page_exists_quick().

Tested by: gonzo
2009-05-02 06:12:38 +00:00
Oleksandr Tymoshenko
c231293745 - Cast argument to proper type in order to avoid warnings like
"shift value is too large for given type"
2009-04-27 19:18:55 +00:00
Oleksandr Tymoshenko
00c35cc20b - Use naming convention the same as MIPS spec does: eliminate _sel1 sufix
and just use selector number. e.g. mips_rd_config_sel1 -> mips_rd_config1
- Add WatchHi/WatchLo accessors for selctors 1..3 (for debug purposes)
2009-04-27 18:29:59 +00:00
Oleksandr Tymoshenko
7323fa4005 - Define accessor functions for CP0 Config(16) register selects 1, 2, 3.
Content of these registers is defined in MIPS spec and can be used
    for obtaining info about CPU capabilities.
2009-04-24 04:17:21 +00:00
Robert Watson
9725389e1e Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing
a fair number of static data structures, making this an unlikely
option to try to change without also changing source code. [1]

Change default cache line size on ia64, sparc64, and sun4v to 128
bytes, as this was what rtld-elf was already using on those
platforms. [2]

Suggested by:	bde [1], jhb [2]
MFC after:	2 weeks
2009-04-20 12:59:23 +00:00
Oleksandr Tymoshenko
50b3024887 - Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
2009-04-19 22:02:14 +00:00
Robert Watson
22037b2d2c Add description and cautionary note regarding CACHE_LINE_SIZE.
MFC after:	2 weeks
Suggested by:	alc
2009-04-19 21:26:36 +00:00
Robert Watson
a93fa8f2bb For each architecture, define CACHE_LINE_SHIFT and a derived
CACHE_LINE_SIZE constant.  These constants are intended to
over-estimate the cache line size, and be used at compile-time
when a run-time tuning alternative isn't appropriate or
available.

Defaults for all architectures are 64 bytes, except powerpc
where it is 128 bytes (used on G5 systems).

MFC after:	2 weeks
Discussed on:   arch@
2009-04-19 20:19:13 +00:00
Oleksandr Tymoshenko
0c6b091e31 Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2009-04-15 02:28:26 +00:00
Oleksandr Tymoshenko
fd7391fc0c - Revert changes accidentally killed by merge operation 2009-04-14 22:53:22 +00:00
Bjoern A. Zeeb
f19dafc798 Mark the declaration of bus_space_map 'static' as the implementation is.
Follow one of the two most common indent schemes in this file.
This unbreaks a few mips kernel builds.
2009-03-28 23:24:34 +00:00
Konstantin Belousov
a4f2b2b0c6 Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointer
to the full path of the image that is being executed.
Increase AT_COUNT.

Remove no longer true comment about types used in Linux ELF binaries,
listed types contain FreeBSD-specific entries.

Reviewed by:	kan
2009-03-17 12:50:16 +00:00
Warner Losh
7008762a18 It appears that none of the contents of this file are necessary, so
replace the amd64-ish version with a blank version.
2009-02-15 20:05:13 +00:00
Warner Losh
77bab78951 Remove stray __P() 2009-02-15 01:12:16 +00:00
Alan Cox
11bd9105b6 Eliminate an unused definition. 2009-02-10 06:08:28 +00:00
Warner Losh
40a70e188b Eliminate the PMAP_INLINE macro. It isn't really used here. If we
need to bring it back, we can.
2009-01-16 08:38:03 +00:00
Oleksandr Tymoshenko
16a296f7c9 MFp4:
- Add debug output
- Fix pmap_zero_page and related places: use uncached segments and invalidate
    cache after zeroing memory.
- Do not test for modified bit if it's not neccessary
    (merged from mips-juniper p4 branch)
- Some #includes reorganization
2009-01-15 18:31:36 +00:00
Warner Losh
db3cd725a5 AT_DEBUG and AT_BRK were OBE like 10 years ago, so retire them.
Reviewed by:	peter
2008-12-17 06:56:58 +00:00
Warner Losh
3bd6a14307 Start to clean up the MIPS elf machine dependent file.
o Add support for compiling elf64 for this file (the rest of the changes are
  coming later)
o Fill in some misssing relocation types.  We need to support these in
  elf_machdep.c's relocation routines eventually, but that's future work
  too.
2008-12-16 20:07:47 +00:00
Warner Losh
1f2c9f3b84 Unbreak mips build by taking first WAG at mb(), wmb() and rmb(). The
latter two are likely pessimal...
2008-11-29 05:16:14 +00:00