Randall Stewart
8fae280afb
With this commit our friend RMI will now compile. I have
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not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
2009-10-30 08:53:11 +00:00
Randall Stewart
3f907e3338
Does 4 things:
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1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant intr_machdep.c
(which we will need for RMI) in the machine specific directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
2009-10-15 21:03:32 +00:00
Warner Losh
2004aa74c3
Implement platform_reset. Also, make the code a tiny bit easier to
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read with ninja-C magic coupled with an illuminating comment.
2009-08-17 12:23:58 +00:00
Warner Losh
8a81b70752
First cut at a platform_start. It is likely wrong, but it is better
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than nothing :)
2009-08-15 21:42:04 +00:00
Warner Losh
1cc75127dc
The UART device infrasturcture wants these defined. Define them just
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like we do in Malta. We may want to look at consolidating things
because *ALL* mips will *ALWAYS* be memory mapped. The only wrinkle
is that the tag may need to be a custom one (see endian issues with
the Atheros port for one example).
2009-08-15 19:48:14 +00:00
Warner Losh
232f85fdf4
Include Octeon specific registers since we mess with them here...
2009-08-15 02:03:41 +00:00
Warner Losh
19aa4fea4c
Fix style error replicated multiple times. Move to
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mips_bus_space_generic for octeon obio impl.
2009-08-15 01:03:13 +00:00
Warner Losh
4d33e6554c
64-bit fixes: fix printf formats and prefer MIPS_PHYS_TO_KSEG0.
2009-07-06 18:18:27 +00:00
Warner Losh
a371f04d66
GC some now-unused items. Fix for 64-bit build. Note: this breaks
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the 32-bit build (which we're not computing correctly anyway).
2009-07-06 18:17:48 +00:00
Warner Losh
4df29a25aa
64-bit fixes:
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(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
2009-07-06 18:15:57 +00:00
Warner Losh
9d7dcb83db
Minor fixes to printf formats.
2009-07-06 18:12:49 +00:00
Warner Losh
72bd8c62f6
Minor formatting changes. Also, elimiante a couple of unused variables.
2009-06-14 07:01:22 +00:00
Warner Losh
c839424d34
Various nits to make this compile.
2009-06-14 06:53:55 +00:00
Warner Losh
24277e95bb
Make compile.
2009-06-14 06:49:13 +00:00
Warner Losh
67b401589c
Hack for the 'battleship' boards that have 8 ports rather than 4.
2009-06-14 06:36:50 +00:00
Warner Losh
bafe55344b
Compile out unreferenced code.
2009-06-14 06:35:21 +00:00
Warner Losh
db9c08f280
Stylish nits
2009-06-14 06:35:02 +00:00
Warner Losh
00e1958bd4
Add bogus OCTEON_CORE_ID here. Really should integrate the pcpu.h stuff
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that is in Cavium's base port.
2009-06-14 06:27:11 +00:00
Warner Losh
2acee4de5c
First pass to make compile. It doesn't completely yet, but it's a
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start.
2009-06-14 06:11:51 +00:00
Warner Losh
8c29759b4a
Bring back the TARGET_OCTEON kludge for a bit. We need to kill it,
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but it is useful for the moment.
2009-06-14 06:11:13 +00:00
Warner Losh
29854186d2
Move octeon specific uart goo here, per SOP for other MIPS ports.
2009-06-14 06:09:33 +00:00
Warner Losh
558955d6a8
Move this to a more approrpiate plae.
2009-06-14 06:01:46 +00:00
Warner Losh
0d633f654d
o Move the driveid.h file
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o lots of tweaks to header paths.
o comment out SMP for the moment
# we now make it through the .c make depend, the .s needs more work.
2009-06-14 04:26:56 +00:00
Warner Losh
654d4c2496
Move octeon rgmii driver to is more correct new home.
2009-06-14 04:10:27 +00:00
Warner Losh
b02713c7a4
Move dev/flash/ cf driver into octeon dir where it belongs.
2009-06-14 03:55:27 +00:00
Warner Losh
b9bf0e01e9
Actually rename the files this time. Also, start to fix OCTEON1 so it
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can configure.
2009-06-14 03:44:43 +00:00
Warner Losh
b502e57d9e
Move the octeon port to its more correct location. Any port for the
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OCTEON2 family of processors should live in mips/octeon2. Not enough
is know abotu the former to know if the same port can be used for both
yet.
2009-06-14 03:01:39 +00:00
