Commit Graph

1509 Commits

Author SHA1 Message Date
Nathan Whitehorn
928f33197d It does not actually make sense to provide an IPI facility on non-root
PICs, so replace cpuid logic with an assert.
2010-07-06 15:38:38 +00:00
Nathan Whitehorn
4dc2f910ee Fix interrupt distribution to multiple CPUs on systems with cascaded PICs.
Because slave PICs send all interrupts to their CPU 0 output line (which
is routed to a pin on the master PIC), changes to per-CPU register banks
like EOI on the slave PIC must be accessed for CPU 0, instead of the
CPU actually processing the interrupt.

Submitted by:	Andreas Tobler
2010-07-06 15:31:58 +00:00
Nathan Whitehorn
0870f0be13 Move the EOI logic when starting ithreads into intr_machdep instead of
relying on it as a side effect of PIC_MASK() in the PIC drivers, and add
an inmplementation of assign_cpu() for the kernel interrupt layer.
2010-07-06 15:27:05 +00:00
Nathan Whitehorn
c7c4bc64f2 Add a missing conditional. We should not bind the PIC interrupt unless
the interrupt's PIC (a) exists and (b) is the root PIC.

Reported by:	Andreas Tobler
2010-07-03 20:11:04 +00:00
Marcel Moolenaar
8a35d194f2 Remove the unneeded header <machine/intr.h>. 2010-07-02 02:17:39 +00:00
Marcel Moolenaar
dc54fa1d55 MFia64:
When compiling with profiling, we define PROF for userspace and GPROF
for the kernel.
2010-07-01 03:48:45 +00:00
John Baldwin
fc0de8f0b6 Move prototypes for kern_sigtimedwait() and kern_sigprocmask() to
<sys/syscallsubr.h> where all other kern_<syscall> prototypes live.
2010-06-30 18:03:42 +00:00
Marcel Moolenaar
cfbcffa248 Fix profiling (part 1):
o   Functions are 4-byte aligned for Book-E.
o   We get compiled with -DPROF and not -DGPROF if profiling
    is enabled.
2010-06-29 19:07:44 +00:00
Marcel Moolenaar
bcec9ed0f1 Assign PCI intline values for ISA interrupts using the new INTR_VEC()
macro.
2010-06-24 05:49:58 +00:00
Marcel Moolenaar
ed571bca9f Remove debugging printf() -- that is, I assume it was for debugging :-) 2010-06-24 05:47:00 +00:00
Marcel Moolenaar
ec120b9476 Pass the device_t of the AT PIC driver to atpic_intr() so that
we don't have to use a global variable. Pass a NULL frame pointer
to the dispatch function just like openpic(4).
2010-06-24 05:05:18 +00:00
Marcel Moolenaar
79312a0b25 With openpic(4) using active-low as the default polarity, reconfigure
the internal interrupt sources as active-high. The internal interrupt
sources are disabled when programmed as active-low.

Note that the internal interrupts have no sense bit like the external
interrupts. We program them as edge-triggered to make sure we write a
0 value to a reserved register. It does not in any way say anything
about the sense of internal interrupt.
2010-06-23 23:16:27 +00:00
Nathan Whitehorn
08393b3efa Configure interrupts on SMP systems to be distributed among all online
CPUs by default, and provide a functional version of BUS_BIND_INTR().
While here, fix some potential concurrency problems in the interrupt
handling code.
2010-06-23 22:33:03 +00:00
Marcel Moolenaar
bd077006c0 In the attach method, refactor to take into account that
BUS_GET_RESOURCE_LIST() can return a NULL pointer -- and
will for MPC85xx kernels.
2010-06-23 22:25:52 +00:00
Nathan Whitehorn
976cc6975b Temporarily disable instruction relocation while setting up the kernel's
IBAT entry in early boot in order to prevent possible faults from races
between the instruction cache and the MMU.

PR:		powerpc/148003
MFC after:	3 days
2010-06-20 16:56:48 +00:00
Nathan Whitehorn
755a660df7 Missed commit in r209310: the IRQ number in INTR_VEC() should have
parantheses around it to allow arithmetic expressions to be passed.

Submitted by:	Andreas Tobler
2010-06-18 21:24:17 +00:00
Nathan Whitehorn
8aa8e94d34 Add MSI support for PCI devices attached to the CPC925 and CPC945 bridges
found in Apple and IBM G5 systems.
2010-06-18 17:39:56 +00:00
Nathan Whitehorn
c8812077bf Add support for the Keywest I2C controller in Apple uninorth northbridges.
Although the Keywest registers have only 1 byte of content, they are
secretly 4-byte registers, which became apparent from them moving on the
big-endian Uninorth version of the controller.
2010-06-18 14:28:57 +00:00
Nathan Whitehorn
a7a32004a4 Change the default interrupt polarity on PowerPC systems from high to low.
On Apple systems at least, all the level interrupts are wired active low.
Before this change, our PIC programming only worked because Apple hardware
ignores the interrupt polarity bit on all interrupts except IRQ 0.
2010-06-18 14:16:24 +00:00
Nathan Whitehorn
eaef5f0af8 Provide for multiple, cascaded PICs on PowerPC systems, and extend the
OFW interrupt map interface to also return the device's interrupt parent.

MFC after:	8.1-RELEASE
2010-06-18 14:06:27 +00:00
Nathan Whitehorn
96c170aa1a Modify the console mouse pointer drawing routine to use single-byte writes
instead of 4-byte ones. Because the mouse pointer can start part way
through a character cell, 4-byte memory operations are not necessarily
aligned, triggering a fatal alignment exception when the console pointer
was moved on PowerPC G5 systems.

MFC after:	3 days
2010-06-15 22:01:38 +00:00
Nathan Whitehorn
ed6e65a2fe Make SMP work on MPC7400-based Apple desktops like the PowerMac3,3. 2010-06-12 21:14:22 +00:00
Alan Cox
9124d0d6a3 Relax one of the new assertions in pmap_enter() a little. Specifically,
allow pmap_enter() to be performed on an unmanaged page that doesn't have
VPO_BUSY set.  Having VPO_BUSY set really only matters for managed pages.
(See, for example, pmap_remove_write().)
2010-06-11 15:49:39 +00:00
Alan Cox
ce18658792 Reduce the scope of the page queues lock and the number of
PG_REFERENCED changes in vm_pageout_object_deactivate_pages().
Simplify this function's inner loop using TAILQ_FOREACH(), and shorten
some of its overly long lines.  Update a stale comment.

Assert that PG_REFERENCED may be cleared only if the object containing
the page is locked.  Add a comment documenting this.

Assert that a caller to vm_page_requeue() holds the page queues lock,
and assert that the page is on a page queue.

Push down the page queues lock into pmap_ts_referenced() and
pmap_page_exists_quick().  (As of now, there are no longer any pmap
functions that expect to be called with the page queues lock held.)

Neither pmap_ts_referenced() nor pmap_page_exists_quick() should ever
be passed an unmanaged page.  Assert this rather than returning "0"
and "FALSE" respectively.

ARM:

Simplify pmap_page_exists_quick() by switching to TAILQ_FOREACH().

Push down the page queues lock inside of pmap_clearbit(), simplifying
pmap_clear_modify(), pmap_clear_reference(), and pmap_remove_write().
Additionally, this allows for avoiding the acquisition of the page
queues lock in some cases.

PowerPC/AIM:

moea*_page_exits_quick() and moea*_page_wired_mappings() will never be
called before pmap initialization is complete.  Therefore, the check
for moea_initialized can be eliminated.

Push down the page queues lock inside of moea*_clear_bit(),
simplifying moea*_clear_modify() and moea*_clear_reference().

The last parameter to moea*_clear_bit() is never used.  Eliminate it.

PowerPC/BookE:

Simplify mmu_booke_page_exists_quick()'s control flow.

Reviewed by:	kib@
2010-06-10 16:56:35 +00:00
Nathan Whitehorn
4fe8025d65 Add Open Firmware PNP info strings to GPIOs and Uninorth cells.
Submitted by:	Andreas Tobler
2010-06-06 14:29:06 +00:00
Nathan Whitehorn
c668b5b488 Correct a harmless typo introduced when copying code from mmu_oea64.
Submitted by:	alc
MFC after:	8.1-RELEASE
2010-06-05 18:24:41 +00:00
Alan Cox
85a71b2578 Don't set PG_WRITEABLE in pmap_enter() unless the page is managed.
Correct a typo in a nearby comment on sparc64.
2010-06-05 18:20:09 +00:00
Nathan Whitehorn
9efb0787bb Add a driver for the CPU temperature sensors attached over I2C on the
PowerMac 11,2.
2010-06-05 17:51:37 +00:00
Nathan Whitehorn
45f7ed017f Add support for the I2C busses hanging off Apple system management chips. 2010-06-05 17:50:20 +00:00
Nathan Whitehorn
c933841d14 Utilize the Keywest I2C combined mode for messages with repeated starts. 2010-06-05 17:49:40 +00:00
Nathan Whitehorn
36d0d27786 Make sure that interrupt sense settings set after interrupts are enabled
are respected. This fixes loading the Apple onboard audio driver
(snd_ai2s) as a module after boot, which would previously cause a panic.

PR:		powerpc/146888
MFC after:	5 days
2010-06-05 16:21:55 +00:00
Alan Cox
2368a37125 Don't set PG_WRITEABLE in pmap_enter() unless the page is managed. 2010-06-05 06:56:06 +00:00
Alan Cox
b5bde83122 In the case that mmu_booke_enter_locked() is changing the attributes of a
mapping but not changing the physical page being mapped, the wrong flags
were being inspected in order to determine whether or not to flush the
instruction cache.  The effect of looking at the wrong flags was that the
instruction cache was never being flushed.

Reviewed by:	marcel
2010-06-01 19:56:02 +00:00
Rafal Jaworowski
8297758a22 Prepare and extend OFW layer for FDT support.
o Let OFW_INIT() and OF_init() return status value.

o Provide helper routines for 'compatible' property handling.

o Only compile OF and OFW code, which is relevant in FDT scenario.

o Other minor cosmetics

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation
2010-05-28 10:43:56 +00:00
Alan Cox
c46b90e90a Push down page queues lock acquisition in pmap_enter_object() and
pmap_is_referenced().  Eliminate the corresponding page queues lock
acquisitions from vm_map_pmap_enter() and mincore(), respectively.  In
mincore(), this allows some additional cases to complete without ever
acquiring the page queues lock.

Assert that the page is managed in pmap_is_referenced().

On powerpc/aim, push down the page queues lock acquisition from
moea*_is_modified() and moea*_is_referenced() into moea*_query_bit().
Again, this will allow some additional cases to complete without ever
acquiring the page queues lock.

Reorder a few statements in vm_page_dontneed() so that a race can't lead
to an old reference persisting.  This scenario is described in detail by a
comment.

Correct a spelling error in vm_page_dontneed().

Assert that the object is locked in vm_page_clear_dirty(), and restrict the
page queues lock assertion to just those cases in which the page is
currently writeable.

Add object locking to vnode_pager_generic_putpages().  This was the one
and only place where vm_page_clear_dirty() was being called without the
object being locked.

Eliminate an unnecessary vm_page_lock() around vnode_pager_setsize()'s call
to vm_page_clear_dirty().

Change vnode_pager_generic_putpages() to the modern-style of function
definition.  Also, change the name of one of the parameters to follow
virtual memory system naming conventions.

Reviewed by:	kib
2010-05-26 18:00:44 +00:00
Rafal Jaworowski
04cb90189b Initial loader(8) support for Flattened Device Tree.
o This is disabled by default for now, and can be enabled using WITH_FDT at
  build time.

o Tested with ARM and PowerPC.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation
2010-05-25 15:21:39 +00:00
Alan Cox
567e51e18c Roughly half of a typical pmap_mincore() implementation is machine-
independent code.  Move this code into mincore(), and eliminate the
page queues lock from pmap_mincore().

Push down the page queues lock into pmap_clear_modify(),
pmap_clear_reference(), and pmap_is_modified().  Assert that these
functions are never passed an unmanaged page.

Eliminate an inaccurate comment from powerpc/powerpc/mmu_if.m:
Contrary to what the comment says, pmap_mincore() is not simply an
optimization.  Without a complete pmap_mincore() implementation,
mincore() cannot return either MINCORE_MODIFIED or MINCORE_REFERENCED
because only the pmap can provide this information.

Eliminate the page queues lock from vfs_setdirty_locked_object(),
vm_pageout_clean(), vm_object_page_collect_flush(), and
vm_object_page_clean().  Generally speaking, these are all accesses
to the page's dirty field, which are synchronized by the containing
vm object's lock.

Reduce the scope of the page queues lock in vm_object_madvise() and
vm_page_dontneed().

Reviewed by:	kib (an earlier version)
2010-05-24 14:26:57 +00:00
Konstantin Belousov
afe1a68827 Reorganize syscall entry and leave handling.
Extend struct sysvec with three new elements:
sv_fetch_syscall_args - the method to fetch syscall arguments from
  usermode into struct syscall_args. The structure is machine-depended
  (this might be reconsidered after all architectures are converted).
sv_set_syscall_retval - the method to set a return value for usermode
  from the syscall. It is a generalization of
  cpu_set_syscall_retval(9) to allow ABIs to override the way to set a
  return value.
sv_syscallnames - the table of syscall names.

Use sv_set_syscall_retval in kern_sigsuspend() instead of hardcoding
the call to cpu_set_syscall_retval().

The new functions syscallenter(9) and syscallret(9) are provided that
use sv_*syscall* pointers and contain the common repeated code from
the syscall() implementations for the architecture-specific syscall
trap handlers.

Syscallenter() fetches arguments, calls syscall implementation from
ABI sysent table, and set up return frame. The end of syscall
bookkeeping is done by syscallret().

Take advantage of single place for MI syscall handling code and
implement ptrace_lwpinfo pl_flags PL_FLAG_SCE, PL_FLAG_SCX and
PL_FLAG_EXEC. The SCE and SCX flags notify the debugger that the
thread is stopped at syscall entry or return point respectively.  The
EXEC flag augments SCX and notifies debugger that the process address
space was changed by one of exec(2)-family syscalls.

The i386, amd64, sparc64, sun4v, powerpc and ia64 syscall()s are
changed to use syscallenter()/syscallret(). MIPS and arm are not
converted and use the mostly unchanged syscall() implementation.

Reviewed by:	jhb, marcel, marius, nwhitehorn, stas
Tested by:	marcel (ia64), marius (sparc64), nwhitehorn (powerpc),
	stas (mips)
MFC after:	1 month
2010-05-23 18:32:02 +00:00
Nathan Whitehorn
50b8f14f71 Now that single-threaded access to firmware is enforced by
IPI_RENDEZVOUS, the ofw mutex is irrelevant.
2010-05-21 20:46:01 +00:00
Nathan Whitehorn
96a985c51d Fix a long-standing bug in the PowerPC OFW call function on SMP machines
where running ofwdump could cause hangs by forcing all secondary CPUs
into a busy wait with interrupts off during the call.

Following section 8.4 of the Open Firmware PowerPC processor binding,
the firmware is free to overwrite the system interrupt handlers during
OF calls, restoring the OS handlers on exit. On single CPU systems, this
process is invisible to the operating system. On multiple CPU systems,
taking any exception on a secondary CPU while an OF call is in progress
ends with that exception vectored into OF, resulting in a slow movement
of the entire system into firmware context and a machine hang.

MFC after:	3 days
2010-05-20 21:07:58 +00:00
Nathan Whitehorn
94ee116706 Correct a typo.
Pointy hat to:	me
2010-05-19 01:37:47 +00:00
Rafal Jaworowski
f40cf6825f Provide missing members for Book-E pmap (and fix build). 2010-05-18 21:23:51 +00:00
Alan Cox
9ab6032f73 On entry to pmap_enter(), assert that the page is busy. While I'm
here, make the style of assertion used by pmap_enter() consistent
across all architectures.

On entry to pmap_remove_write(), assert that the page is neither
unmanaged nor fictitious, since we cannot remove write access to
either kind of page.

With the push down of the page queues lock, pmap_remove_write() cannot
condition its behavior on the state of the PG_WRITEABLE flag if the
page is busy.  Assert that the object containing the page is locked.
This allows us to know that the page will neither become busy nor will
PG_WRITEABLE be set on it while pmap_remove_write() is running.

Correct a long-standing bug in vm_page_cowsetup().  We cannot possibly
do copy-on-write-based zero-copy transmit on unmanaged or fictitious
pages, so don't even try.  Previously, the call to pmap_remove_write()
would have failed silently.
2010-05-16 23:45:10 +00:00
Nathan Whitehorn
4a26780b9a Pull OF_quiesce() out of the MI Open Firmware layer and entirely into
PPC ofw_machdep.c, in recognition of its state as a machine specific hack.

Requested by:	marius
2010-05-16 22:01:43 +00:00
Nathan Whitehorn
97af4af5b0 It is not necessary (and in some cases harmful) to hardcode ata_kauai's
IRQ to 39 on K2 devices, as well as Shasta ones.

Reported by:	Andreas Tobler
2010-05-16 20:31:31 +00:00
Nathan Whitehorn
bf17422a43 Enable smu(4) to report fan speeds on late-model Powermac G5s. 2010-05-16 19:57:38 +00:00
Nathan Whitehorn
4dea0435b5 Relocate interrupt sense setting for K2 SATA from the ATA driver to the
OFW PCI layer and read the sense directly from the device tree instead
of guessing.

MFC after:	1 week
2010-05-16 17:55:09 +00:00
Nathan Whitehorn
79bf3fcd18 On PowerMac11,2 and (presumably) PowerMac12,1, we need to quiesce the
firmware in order to take over control of the SMU. Without doing this,
the firmware background process doing fan control will run amok as we
take over the system and crash the management chip.

This is limited to these two machines because our kernel is heavily
dependent on firmware accesses, and so quiescing firmware can cause
nasty problems.
2010-05-16 15:56:59 +00:00
Nathan Whitehorn
c59bb3ff62 On SMP G5 systems, sometimes the power-mode-data property is only found
on CPU 0, so look there if it is not otherwise available.
2010-05-16 15:21:13 +00:00
Nathan Whitehorn
ca2c19312e Add support for the U4 PCI-Express bridge chipset used in late-generation
Powermac G5 systems. MSI and several other things are not presently
supported.

The U3/U4 internal device support portions of this change were contributed
by Andreas Tobler.

MFC after:	1 week
2010-05-16 15:18:25 +00:00