Commit Graph

3 Commits

Author SHA1 Message Date
Robert Watson
6a347d023b Merge Perforce changeset 219952 to head:
Make different bus attachments for Altera and Terasice
  device drivers share the same devclass_t.

Sponsored by:	DARPA, AFRL
2013-01-13 16:57:11 +00:00
Robert Watson
b364a5252e Merge Perforce changeset 219940 to head:
Rework altera_avgen(4) to cleanly(ish) separate nexus bus
  attachment from the driver itself.  This should allow us to
  plug in an fdt attachment more easily.

Sponsored by:	DARPA, AFRL
2013-01-13 16:43:59 +00:00
Robert Watson
cf8248866d Add altera_avgen(4), a generic device driver to be used by hard and soft
CPU cores on Altera FPGAs.  The device driver allows memory-mapped devices
on Altera's Avalon SoC bus to be exported to userspace via device nodes.
device.hints directories dictate device name, permissible access methods,
physical address and length, and I/O alignment.  Devices can be accessed
using read(2)/write(2), but also memory mapped in userspace using mmap(2).

Devices attach directly to the Nexus, as is common for embedded device
drivers; in the future something more mature might be desirable.  There is
currently no facility to support directing device-originated interrupts to
userspace.

In the future, this device driver may be renamed to socgen(4), as it can
in principle also be used with other system-on-chip (SoC) busses, such as
Axi on ASICs and FPGAs.  However, we have only tested it on Avalon busses
with memory-mapped ROMs, frame buffers, etc.

Sponsored by:	DARPA, AFRL
2012-08-25 11:07:43 +00:00