Don't mess with the IRQMS bit in the host control register unless
we are an aic7770 chip.
Use calling context to determine if the card is already paused when
we update the target message request bit field in controller scratch
ram. Looking at the paused bit in the HCNTRL register opened up a
race condition.
Insert delays in the target message request update routine as a temporary
work around for what looks like a chip bug. I'm still investigating this
one.
Fix the Abort/Abort Tag/BDR handler to pull its message from the message
buffer in our softc instead of attempting to get it from a register on
the controller. The message is never recorded by the controller in the
new message scheme.
Don't rely on having an SCB when a BDR occurs. We can issue these during
invalid reconnects to.
Fix a few cases where we were restarting the sequencer but then still
falling out of a switch statement to unpause the sequencer again.
This could cause us to mess up sequencer state if it generated another
pausing interrupt between the time of the restart and unpause.
Kill the 'transceiver settle' loop during card initialization. I
failed to realize that a controller that is not connected to any
cables will never settle or enable the SCSI transceivers at all.
The correct solution is to monitor the IOERR interrupt which indicates
that the transceiver state has changed (UW<->LVD).
Modify the aic7xxx assembler to properly echo input when stdin is not
a tty.
connection.
Clean up support for devices featuring the multiple target SCSI ID feature.
On aic7890/91/96/97 chips, we can now assume the target role on multiple
target ids simultaneously. Although these chips also have sufficient
instruction space to hold to support the initiator and target role at the
same time, the initiator role is currently disabled as it will conflict
(chip design restriction) with the multi-tid feature. I'll probably add
a nob to enable the initiator (there-by disabling multi-tid) some time
in the future.
Return queue full or busy, depending on the tagged nature of the incoming
request, if our command input queue fills up in host memeory.
Deal with accept target I/O resource shortages.
If we get an underrun on a transaction that wasn't supposed to transmit
any data, don't attempt to print out the S/G list. The code would
run until hitting a non-present page. (oops)
black hole device. The controller will now only accept selections if
the black hole device is present and some other target/lun is enabled
for target mode.
Handle the IGNORE WIDE RESIDUE message. This support has not been tested.
Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS,
and CLEAR QUEUE messages as a target.
Fix a few problems with tagged command handling in target mode.
Wait until the sync offset counter falls to 0 before changing phase
after a data-in transfer completes as the DMA logic seems to indicate
transfer complete as soon as our last REQ is issued.
Simplify some of the target mode message handling code in the sequencer.
Use the host message loop for any unknown message types instead of performing
a reject message in the sequencer. Pass reject messages to the host
message loop too which frees up a sequencer interrupt type slot.
Default to issuing a bus reset if initiator mode is enabled. It seems
that the reset scsi bus bit is not defined in the same location for
all aic78xx BIOSes, so attempting to honor this setting will have to
wait until I get more information on how to detect it.
Nuke some unused variables.
in target mode, but we are not completing the command.
Use a template of allowed bus arbitration phases to selectively and
dynamically enable/disable initiator or target (re)selection.
Properly handle timeouts for target role transactions - just go to the
bus free state and report the error to the peripheral driver.
Checkpoint support for the XPT_ABORT_CCB function code. This currently
handles the accept tio and immediate notify ccb types, but does not
handle the continue target I/O or SCSI I/O ccb types. This is enough
to handle dynamic target enable/disable events.
Clean up the SCSI reset code so that we perform at most 1 SCSI bus
reset at initialization, the reset requested by the XPT layer.
is more robust and common code can be used for both the target and iniator
roles. The mechanism for tracking negotiation state has also been simplified.
Add support for sync/wide negotiation in target mode and fix many of
the target mode bugs running at higher speeds uncovered. Make a first
stab at getting all of the bus skew delays correct. Sync+Wide dataout
transfers still cause problems, but this may be an initiator problem.
Ensure that we exit BITBUCKET mode if the controller is restarted.
Add support for target mode only firmware downloads. This has been
tested on the aic7880, but should mean that we can perform target mode
on any aic7xxx controller. Mixed mode (initiator and target roles in
the same firmware load) is currently only supported on the aic7890, but
with optimization, may fit on chips with less instruction space.
for possible buffer overflow problems. Replaced most sprintf()'s
with snprintf(); for others cases, added terminating NUL bytes where
appropriate, replaced constants like "16" with sizeof(), etc.
These changes include several bug fixes, but most changes are for
maintainability's sake. Any instance where it wasn't "immediately
obvious" that a buffer overflow could not occur was made safer.
Reviewed by: Bruce Evans <bde@zeta.org.au>
Reviewed by: Matthew Dillon <dillon@apollo.backplane.com>
Reviewed by: Mike Spengler <mks@networkcs.com>
use a 256 entry ring buffer of descriptersfor this purpose. This allows
the use of a simple 8bit counter in the sequencer code for tracking start
location.
Entries in the ring buffer now contain a "cmd_valid" byte at their tail.
As an entry is serviced, this byte is cleared by the kernel and set by
the sequencer during its dma of a new entry. Since this byte is the last
portion of the command touched during a dma, the kernel can use this
byte to ensure the command it processes is completely valid.
The new command format requires a fixed sized DMA from the controller
to deliver which allowed for additional simplification of the sequencer
code. The hack that required 1 SCB slot to be stolen for incoming
command delivery notification is also gone.
Correct a problem where an external bus reset on the 'background' channel of
a Twin Channel EISA controller could put the driver into an infinite loop.
Noticed by: Twin Channel bug, Joerg Wunsch <joerg@FreeBSD.org>
Submitted by: -Wunused, Poul-Henning Kamp <phk@freebsd.org>
a timeout, we must remove the pending SCB from the disconnected list
or risk list corruption when our BDR request using the same SCB is placed
on the waiting list.
Eradicate some silly uses of u_int8_t that just serve to slow the code down.
- Convert to CAM
- Use a new DMA based queuing and paging scheme
- Add preliminary target mode support
- Add support for the aic789X chips
- Take advantage of external SRAM on more controllers.
- Numerous bug fixes and performance improvements.
