Commit Graph

81 Commits

Author SHA1 Message Date
Marius Strobl
2ce472e736 Move the implementation of bus_space_barrier(9) to the inline function in
the header. Actually, there's only one version for all types of busses, so
it doesn't make sense to walk up the hierarchy.
2013-10-24 17:06:41 +00:00
Marius Strobl
e8aabc79db - Revert the part of r247601 which turned the overtemperature and power fail
interrupt shutdown handlers into filters. Shutdown_nice(9) acquires a sleep
  lock, which filters shouldn't do. It also seems that kern_reboot(9) still
  may require Giant to be hold.
- Correct an incorrect argument to shutdown_nice(9).

Submitted by:	bde
2013-03-02 13:08:13 +00:00
Marius Strobl
11be09b056 - Apparently, it's no longer a problem to call shutdown_nice(9) from within
an interrupt filter (some other drivers in the tree do the same). So
  change the overtemperature and power fail interrupts from handlers in order
  to code and get rid of a !INTR_MPSAFE handlers.
- Mark unused parameters as such.
- Use NULL instead of 0 for pointers.

MFC after:	1 week
2013-03-02 00:41:51 +00:00
Marius Strobl
848e30ff51 s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention
of kobj(9) from device drivers.
2011-11-22 21:55:40 +00:00
Pawel Jakub Dawidek
1859c4740e Fix make universe. 2011-11-16 18:42:43 +00:00
Marius Strobl
fb1b34b313 Actually, limit to 32-bit DMA for the transfer buffers as the address is
written into a 32-bit register.
2011-10-30 21:42:35 +00:00
Marius Strobl
f1ffe65cc5 Correct the DMA constraints, the LSI64854 isn't limited to 32-bit DMA. 2011-10-30 21:19:13 +00:00
Marius Strobl
5e141ae05f - Use device_t rather than the NetBSDish struct device.
- Move esp_devclass to ncr53c9x.c in order to allow different bus front-ends
  to use it.
- Use KOBJMETHOD_END.
- Remove the gl_clear_latched_intr hook as it's not needed for any of the
  chips nor the front-ends supported in FreeBSD and likely never will be.
- Correct the DMA constraints used in the SBus front-end, the LSI64854 isn't
  limited to 32-bit DMA.
- The ESP200 also only supports up to 64k transfers.
- Don't let the DMA and SBus front-end supply a maximum transfer size larger
  than MAXPHYS as that's the maximum the upper layers use and we otherwise
  just waste resources unnecessarily.
- Initialize the ECB callout and don't zero the handle when returning ECBs
  to the free list so that ncr53c9x_callout() actually is called with the
  driver lock held.
- On detach the driver lock should be held across cam_sim_free() according
  to isp(4) and a panic received.
- Check the return value of NCRDMA_SETUP(), i.e. bus_dmamap_load(9), and try
  to handle failures gracefully.
- In ncr53c9x_action() replace N calls to xpt_done() in a switch with just
  one at the end.
- On XPT_PATH_INQ report "NCR" rather than "Sun" as the vendor as the former
  is somewhat more correct as well as the maximum supported transfer size via
  maxio in order to take advantage of controllers that that can handle more
  than DFLTPHYS.
- Print the number of MESSAGE (EXTENDED) rejected.
- Fix the path encoded in the multiple inclusion protection of ncr53c9xvar.h.
- Correct the DMA constraints used in the LSI64854 core to not exceed the
  maximum supported transfer size and include the boundary so we don't need
  to check on every setup of a DMA transfer.
- Let the bus DMA map callbacks do nothing in case of an error.
- Correctly handle > 64k transfers for FAS366 in the LSI64854. A new feature
  flag NCR_F_LARGEXFER was introduced so we just need to check for this one
  and not for individual controllers supporting large transfers in several
  places.
- Let the LSI64854 core load transfer buffers using BUS_DMA_NOWAIT as the
  NCR53C9x core can't handle EINPROGRESS. Due to lack of bounce buffers
  support, sparc64 doesn't actually use EINPROGRESS and likely never will,
  as an example for writing additional front-ends for the NCR53C9x core it
  makes sense to set BUS_DMA_NOWAIT anyway though.
- Some minor cleanup.
2011-10-30 21:17:42 +00:00
Marius Strobl
2b6ae84b63 Merge from NetBSD:
- Remove clause 3 and 4 from TNF licenses.
- Fix memset usage.
- Various cleanup.
- Kill caddr_t.
2011-10-15 09:29:43 +00:00
Marius Strobl
bda8e754a1 Make sparc64 compatible with NEW_PCIB and enable it:
- Implement bus_adjust_resource() methods as far as necessary and in non-PCI
  bridge drivers as far as feasible without rototilling them.
- As NEW_PCIB does a layering violation by activating resources at layers
  above pci(4) without previously bubbling up their allocation there, move
  the assignment of bus tags and handles from the bus_alloc_resource() to
  the bus_activate_resource() methods like at least the other NEW_PCIB
  enabled architectures do. This is somewhat unfortunate as previously
  sparc64 (ab)used resource activation to indicate whether SYS_RES_MEMORY
  resources should be mapped into KVA, which is only necessary if their
  going to be accessed via the pointer returned from rman_get_virtual() but
  not for bus_space(9) as the later always uses physical access on sparc64.
  Besides wasting KVA if we always map in SYS_RES_MEMORY resources, a driver
  also may deliberately not map them in if the firmware already has done so,
  possibly in a special way. So in order to still allow a driver to decide
  whether a SYS_RES_MEMORY resource should be mapped into KVA we let it
  indicate that by calling bus_space_map(9) with BUS_SPACE_MAP_LINEAR as
  actually documented in the bus_space(9) page. This is implemented by
  allocating a separate bus tag per SYS_RES_MEMORY resource and passing the
  resource via the previously unused bus tag cookie so we later on can call
  rman_set_virtual() in sparc64_bus_mem_map(). As a side effect this now
  also allows to actually indicate that a SYS_RES_MEMORY resource should be
  mapped in as cacheable and/or read-only via BUS_SPACE_MAP_CACHEABLE and
  BUS_SPACE_MAP_READONLY respectively.
- Do some minor cleanup like taking advantage of rman_init_from_resource(),
  factor out the common part of bus tag allocation into a newly added
  sparc64_alloc_bus_tag(), hook up some missing newbus methods and replace
  some homegrown versions with the generic counterparts etc.
- While at it, let apb_attach() (which can't use the generic NEW_PCIB code
  as APB bridges just don't have the base and limit registers implemented)
  regarding the config space registers cached in pcib_softc and the SYSCTL
  reporting nodes set up.
2011-10-02 23:22:38 +00:00
Marius Strobl
c4a2a39004 Since r221218 rman_manage_region(9) actually honors rm_start and rm_end
which may cause problems when these contain garbage so zero the range
descriptors embedding the rmans when allocating them.

Approved by:	re (kib)
MFC after:	3 days
2011-08-28 11:49:53 +00:00
Marius Strobl
39272630aa Correct spelling in comments.
Submitted by:	brucec
2011-04-22 09:31:40 +00:00
Marius Strobl
273fb3dc7c Sync licenses and the corresponding RCS IDs with NetBSD, mainly switching
the licenses of Matthew R. Green and the TNF to 2-clause.

Obtained from:	NetBSD
2011-03-12 14:33:32 +00:00
Marius Strobl
f4ff513c4b Reserve INTR_MD[1-4] similarly to what BUS_DMA_BUS[1-4] are intended for
and switch sparc64 to use the first one for bus error filter handlers of
bridge drivers instead of (ab)using INTR_FAST for that so we eventually
can get rid of the latter.

Reviewed by:	jhb
MFC after:	1 month
2011-01-04 16:11:32 +00:00
Marius Strobl
4a717bcedc - Take advantage of the INTCLR_* macros.
- Right-justify the backslashes as per style(9).
2010-03-31 22:19:00 +00:00
Joel Dahl
1edcf74de7 The NetBSD Foundation has granted permission to remove clause 3 and 4 from
the software.

Obtained from:	NetBSD
2010-03-03 17:55:51 +00:00
Marius Strobl
1bba41a506 Enroll these drivers in multipass probing. The motivation behind this
is that the JBus to EBus bridges share the interrupt controller of a
sibling JBus to PCIe bridge (at least as far as the OFW device tree
is concerned, in reality they are part of the same chip) so we have to
probe and attach the latter first. That happens to be also the case
due to the fact that the JBus to PCIe bridges appear first in the OFW
device tree but it doesn't hurt to ensure the right order.
2009-12-22 21:02:46 +00:00
Marius Strobl
6a963456fd Add missing module dependency information. 2009-12-21 21:41:33 +00:00
Marius Strobl
f449699d53 Hook up the generic OFW pnpinfo string method. 2009-03-19 21:14:45 +00:00
Marius Strobl
f27d082cdf - As suggested by OpenSolaris use up-burst-sizes for determining the
supported burst sizes.
- Add support for 64-bit burst sizes (required for SBus GEM).
- Failing to register as interrupt controller during attach shouldn't
  be fatal so just inform about this instead of panicing.
- Take advantage of KOBJMETHOD_END.
- Remove some redundant variables.
- Add missing const.
2009-03-19 21:02:36 +00:00
Marius Strobl
b66196f2e9 - Sort device methods.
- Take advantage of KOBJMETHOD_END.
2009-03-19 20:31:55 +00:00
Nathan Whitehorn
94b4a038a1 Adapt parts of the sparc64 Open Firmware bus enumeration code (in particular,
the code for parsing interrupt maps) to PowerPC and reflect their new MI
status by moving them to the shared dev/ofw directory.

This commit also modifies the OFW PCI enumeration procedure on PowerPC to
allow the bus to find non-firmware-enumerated devices that Apple likes to add,
and adds some useful Open Firmware properties (compat and name) to the pnpinfo
string of children on OFW SBus, EBus, PCI, and MacIO links. Because of the
change to PCI enumeration on PowerPC, X has started working again on PPC
machines with Grackle hostbridges.

Reviewed by:	marius
Obtained from:	sparc64
2008-12-15 15:31:10 +00:00
Marius Strobl
85de9f54f8 o Move the MODULE_DEPEND() for cam(4) from the esp_sbus.c front-end to
the ncr53c9x.c core where it actually belongs so future front-ends
  don't need to add it.
o Use the correct OFW property when looking for the initiator ID of the
  SBus device.
o Don't specify an alignment when creating the parent DMA tag for
  SUNW,fas; their DMA engine doesn't require an alignment constraint
  and it's no inherited by the child DMA tags anyway (which probably
  is a bug though).
o Drop the superfluous sc_maxsync and use sc_minsync instead. The
  former apparently was added due to a confusion with the maximum
  frequency used in cam(4), which basically corresponds to the
  inverse of minimum sync period.
o Merge ncr53c9x.c from NetBSD:
  1.116: NCRDMA_SETUP() should be called before NCR_SET_COUNT() and
         NCRCMD_DMA command in ncr53c9x_select().
  1.125: free allocated resources on detach.
o Static'ize ncr53c9x_action(), ncr53c9x_init() and ncr53c9x_reset()
  as these are not required outside of ncr53c9x.c.
o In ncr53c9x_attach() don't leak the device mutex in case attaching
  fails.
o Register an asynchronous notification handler so in case cam(4)
  reports a lost device we can cancel outstanding commands and
  restore the default parameters for the target in question.
o For FAS366 correctly support 16-bit target IDs and let it know
  that we use 32-bit transfers.
o Overhaul the negotiation of transfer settings. This includes
  distinguishing between current and goal transfer settings of the
  target so we can renegotiate their goal settings when necessary
  and correcting the order in which tagged, wide and synchronous
  transfers are negotiated.
o If we are requesting sense, force a renegotiation if we are
  currently using anything different from asynchronous at 8 bit
  as the target might have lost our transfer negotiations.
o In case of an XPT_RESET_BUS just directly call ncr53c9x_init()
  instead of issuing a NCRCMD_RSTSCSI, which in turn will issue an
  interrupt that is treated as an unexpected SCSI bus reset by
  ncr53c9x_intr() and thus calls ncr53c9x_init(). Remove the now
  no longer used ncr53c9x_scsi_reset().
o Correct an off-by-one error when setting cpi->max_lun.
o In replace printf(9) with device_printf(9) calls where appropriate
  and in ncr53c9x_action() remove some unnecessarily verbose messages.
o In ncr53c9x_sched() use TAILQ_FOREACH() instead of reimplementing
  it and consolidate two tagging-related target info checks into one.
o In ncr53c9x_done() set the CAM status to CAM_SCSI_STATUS_ERROR when
  appropriate, respect CAM_DIS_AUTOSENSE and teach it to return SCSI
  status information.
o In ncr53c9x_dequeue() ensure the tags are cleared.
o Use ulmin() instead of min() where appropriate.
o In ncr53c9x_msgout() consistently use the reset label.
o When we're interrupted during a data phase and the DMA engine is
  still active, don't panic but reset the core and the DMA engine as
  this should be sufficient. Also, the typical problem for triggering
  this was the lack of renegotiation when requesting sense.
o Correctly handle DEVICE RESETs.
o Adapt the locking of esp(4) to MPSAFE cam(4). This includes moving
  the calls of lsi64854_attach() to the bus front-ends so it can pass
  the esp(4) mutex to bus_dma_tag_create(9).
o Change the LSI64854 driver to not create a DMA tag and map for the
  Ethernet channel as le(4) will handle these on its own as well as
  sync and unload the DMA maps for the SCSI and parallel port channel
  after a DMA transfer.
o Cam(4)'ify some NetBSD-centric comments.
o Use bus_{read,write}_*(9) instead of bus_space_{read,write}_*(9)
  and take advantage of rman_get_rid(9) in order to save some softc
  members.

Reviewed by:	scottl
MFC after:	1 month
2008-09-08 20:20:44 +00:00
Marius Strobl
99448af81e Provide and consume module dependency information.
MFC after:	3 days
2008-08-23 15:20:33 +00:00
Marius Strobl
083b2bd41a - Use the name returned by device_get_nameunit(9) for the name of the
counter-timer timecounter so the associated SYSCTL nodes don't clash on
  machines having multiple U2P and U2S bridges as well as establishing a
  clear mapping between these bridges and their timecounter device.
- Don't bother setting up a "nice" name for the IOMMU, just use the name
  returned by device_get_nameunit(9), too.
- Fix some minor style(9) bugs.
- Use __FBSDID in counter.c

MFC after:	1 week
2008-05-07 21:22:15 +00:00
Marius Strobl
526bd70425 o Rename ic_eoi to ic_clear to emphasize the functions it points
don't send and EOI which works like on amd64/i386 and blocks all
  interrupts on the relevant interrupt controller.
o Replace the post_filter and post_inthread hooks registered when
  creating the interrupt events with just ic_clear as on sparc64 we
  don't need to do any disable->EOI->enable dance to unblock all but
  the relevant interrupt while running the filter or handler; just
  not clearing the interrupt already has the same effect.
o Merge from amd64/i386:
  - Split the intr_table_lock into an sx lock used for most things,
    and a spin lock to protect intrcnt_index.
  - Add support for binding interrupts to CPUs, including for the
    bus_bind_intr(9) interface, a assign_cpu hook and initially
    shuffling interrupts arround in a round-robin fashion.

Reviewed by:	jhb
MFC after:	1 month
2008-04-23 20:04:38 +00:00
Marius Strobl
7439368f60 o Revamp the sparc64 interrupt code in order to be able to interface
with the INTR_FILTER-enabled MI code. Basically this consists of
  registering an interrupt controller (of which there can be multiple
  and optionally different ones either per host-to-foo bridge or shared
  amongst host-to-foo bridges in any one machine) along with an interrupt
  vector as specific argument for all the interrupt vectors used by a
  given host-to-foo bridge (roughly similar to registering interrupt
  sources on amd64 and i386), providing functions to enable, clear and
  disable the interrupts of the children beneath the bridge.
  This also includes:
  - No longer entering a critical section in tl0_intr() and tl1_intr()
    for executing interrupt handlers but rather let the handlers enter
    it themselves so in the case of intr_event_handle() we don't enter
    a nested critical section.
  - Adding infrastructure for binding delivery of interrupt vectors to
    specific CPUs which later on can be interfaced with the code from
    amd64/i386 for binding interrupts to specific CPUs.
  - Getting rid of the wrapper hack introduced along the lines of the
    API changes for INTR_FILTER which as a side-effect caused interrupts
    associated with ithread handlers only to get the elevated priority
    of those associated with filters ("fast handlers") (this removes the
    hack also in the non-INTR_FILTER case).
  - Disabling (by not clearing) an interrupt in the interrupt controller
    until all associated handlers have been executed, which is crucial
    for the typical locking strategy of NIC drivers in order to work
    correctly in case of shared interrupts. This was a more or less
    theoretical problem on sparc64 though, as shared interrupts are
    rather uncommon there except for the on-board SCCs and UARTs.
  Note that due to the behavior of at least of some of the interrupt
  controllers used on sparc64 an enable+EOI instead of a disable+EOI
  approach (as implied by the INTR_FILTER MI code and implemented on
  other architectures) is used as the latter can cause lost interrupts
  or in the worst case interrupt starvation.
o Correct a typo in sbus_alloc_resource() which caused (pass-through)
  allocations to only work down to the grandchildren of the bus, which
  wasn't a real problem so far as we don't support any devices which are
  great-grandchildren or greater of a U2S bridge, yet.
o In fhc(4) use bus_{read,write}_4() instead of bus_space_{read,write}_4()
  in order to get rid of sc_bh and sc_bt in the fhc_softc. Also get rid
  of some other unneeded members in fhc_softc.

Reviewed by:	marcel (earlier version)
Approved by:	re (kensmith)
2007-09-06 19:16:30 +00:00
Marius Strobl
6bbb5a106c - Divorce the IOTSBs, which so far where handled via a global list
instead of per IOMMU, so we no longer need to program all of them
  identically in systems having multiple IOMMUs. This continues the
  rototilling of the nexus(4) done about 5 months ago, which amongst
  others changed nexus(4) and the drivers for host-to-foo bridges
  to provide bus_get_dma_tag methods, allowing to handle DMA tags in
  a hierarchical way and to link them with devices.
  This still doesn't move the silicon bug workarounds for Sabre (and
  in the uncommitted schizo(4) for Tomatillo) bridges into special
  bus_dma_tag_create() and bus_dmamap_sync() methods though, as w/o
  fully newbus'ified bus_dma_tag_create() and bus_dma_tag_destroy()
  this still requires too much hackery, i.e. per-child parent DMA
  tags in the parent driver.
- Let the host-to-foo drivers supply the maximum physical address
  of the IOMMU accompanying the bridges. Previously iommu(4) hard-
  coded an upper limit of 16GB, which actually only applies to the
  IOMMUs of the Hummingbird and Sabre bridges. The Psycho variants
  as well as the U2S in fact can can translate to up to 2TB, i.e.
  translate to 41-bit physical addresses. According to the recently
  available Tomatillo documentation these bridges even translate to
  43-bit physical addresses and hints at the Schizo bridges doing
  43 bits as well.
  This fixes the issue the FreeBSD 6.0 todo list item "Max RAM on
  sparc64" was refering to and pretty much obsoletes the lack of
  support for bounce buffers on sparc64.

Thanks to Nathan Whitehorn for pointing me at the Tomatillo manual.

Approved by:	re (kensmith)
2007-08-05 11:56:44 +00:00
Marius Strobl
1dfe405372 - Don't register the over-temperature and power-fail interrupt
handlers as filter/"fast" handlers so shutdown_nice() can
  acquire the process lock.
- Use bus_{read,write}_8() instead of bus_space_{read,write}_8()
  in order to get rid of sc_bushandle and sc_bustag in the softc.
- Remove the banal and outdated comment above sbus_filter_stub().
2007-06-16 23:49:41 +00:00
Paolo Pisati
f9a41a1101 Teach the bridge wrapper how to handle the filter+ithread case.
Reviewed by: marius
2007-06-06 22:19:23 +00:00
Marius Strobl
33368e9fe8 Rototill the sparc64 nexus(4) (actually this brings in the code the
sun4v nexus(4) in turn is based on):
o Change nexus(4) to manage the resources of its children so the
  respective device drivers don't need to figure them out of OFW
  themselves.
o Change nexus(4) to provide the ofw_bus KOBJ interface instead of
  using IVARs for supplying the OFW node and the subset of standard
  properties of its children. Together with the previous change this
  also allows to fully take advantage of newbus in that drivers like
  fhc(4), which attach on multiple parent busses, no longer require
  different bus front-ends as obtaining the OFW node and properties
  as well as resource allocation works the same for all supported
  busses. As such this change also is part 4/4 of allowing creator(4)
  to work in USIII-based machines as it allows this driver to attach
  on both nexus(4) and upa(4). On the other hand removing these IVARs
  breaks API compatibility with the powerpc nexus(4) but which isn't
  that bad as a) sparc64 currently doesn't share any device driver
  hanging off of nexus(4) with powerpc and b) they were no longer
  compatible regarding OFW-related extensions at the pci(4) level
  since quite some time.
o Provide bus_get_dma_tag methods in nexus(4) and its children in
  order to handle DMA tags in a hierarchical way and get rid of the
  sparc64_root_dma_tag kludge. Together with the previous two items
  this changes also allows to completely get rid of the nexus(4)
  IVAR interface. It also includes:
  - pushing the constraints previously specified by the nexus_dmatag
    down into the DMA tags of psycho(4) and sbus(4) as it's their
    IOMMUs which induce these restrictions (and nothing at the
    nexus(4) or anything that would warrant specifying them there),
  - fixing some obviously wrong constraints of the psycho(4) and
    sbus(4) DMA tags, which happened to not actually be used with
    the sparc64_root_dma_tag kludge in place and therefore didn't
    cause problems so far,
  - replacing magic constants for constraints with macros as far
    as it is obvious as to where they come from.
  This doesn't include taking advantage of the newbus way to get
  the parent DMA tags implemented by this change in order to divorce
  the IOTSBs of the PCI and SBus IOMMUs or for implementing the
  workaround for the DMA sync bug in Sabre (and Tomatillo) bridges,
  yet, though.
o Get rid of the notion that nexus(4) (mostly) reflects an UPA bus
  by replacing ofw_upa.h and with ofw_nexus.h (which was repo-copied
  from ofw_upa.h) and renaming its content, which actually applies to
  all of Fireplane/Safari, JBus and UPA (in the host bus case), as
  appropriate.
o Just use M_DEVBUF instead of a separate M_NEXUS malloc type for
  allocating the device info for the children of nexus(4). This is
  done in order to not need to export M_NEXUS when deriving drivers
  for subordinate busses from the nexus(4) class.
o Use the DEFINE_CLASS_0() macro to declare the nexus(4) driver so
  we can derive subclasses from it.
o Const'ify the nexus_excl_name and nexus_excl_type arrays as well
  as add 'associations' and 'rsc', which are pseudo-devices without
  resources and therefore of no real interest for nexus(4), to the
  former.
o Let the nexus(4) device memory rman manage the entire 64-bit address
  space instead of just the UPA_MEMSTART to UPA_MEMEND subregion as
  Fireplane/Safari- and JBus-based machines use multiple ranges,
  which can't be as easily divided as in the case of UPA (limiting
  the address space only served for sanity checking anyway).
o Use M_WAITOK instead of M_NOWAIT when allocating the device info
  for children of nexus(4) in order to give one less opportunity
  for adding devices to nexus(4) to fail.
o While adapting the drivers affected by the above nexus(4) changes,
  change them to take advantage of rman_get_rid() instead of caching
  the RIDs assigned to allocated resources, now that the RIDs of
  resources are correctly set.
o In iommu(4) and nexus(4) replace hard-coded functions names, which
  actually became outdated in several places, in panic strings and
  status massages with __func__. [1]
o Use driver_filter_t in prototypes where appropriate.
o Add my copyright to creator(4), fhc(4), nexus(4), psycho(4) and
  sbus(4) as I changed considerable amounts of these drivers as well
  as added a bunch of new features, workarounds for silicon bugs etc.
o Fix some white space nits.

Due to lack of access to Exx00 hardware, these changes, i.e. central(4)
and fhc(4), couldn't be runtime tested on such a machine. Exx00 are
currently reported to panic before trying to attach nexus(4) anyway
though.

PR:		76052 [1]
Approved by:	re (kensmith)
2007-03-07 21:13:51 +00:00
Paolo Pisati
ef544f6312 o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@
2007-02-23 12:19:07 +00:00
Marius Strobl
e6770fff6b - Use bus_get_dma_tag() to obtain the parent DMA tag so dma(4) will
work when we start requiring this.
- Don't specify an alignment when creating our own parent DMA tag;
  the supported DMA engines require no alignment constraint (f.e. the
  LANCE child does though) and it's no inherited by the child DMA
  tags anyway (which probably is a bug though).
- Fix whitespace nits.
2007-01-20 14:06:01 +00:00
Marius Strobl
c43ab0b9da Check the return value of bus_setup_intr() when setting up the
over-temperature and power-fail interrupts.

Suggested by:	Coverity Prevent (CID 683)
MFC after:	1 week
2007-01-15 22:37:59 +00:00
Marius Strobl
190cb52795 - Merge sys/sparc64/pci/psycho.c rev. 1.8:
Map the device memory belonging to resources of type SYS_RES_MEMORY into
  KVA upon activation so that rman_get_virtual() works as expected.
- In sbus_alloc_resource() checking whether toffs is 0 as an indication
  that no applicable child range was found isn't appropriate as it's
  perfectly valid for the requested SYS_RES_MEMORY resource to start at
  the beginning of a child range. So check for the RMAN still being NULL
  instead.
- As a minor runtime speed optimization break out of the loop where we
  search for the applicable child range in sbus_alloc_resource() as soon
  as it's found.
- Let sbus_setup_intr() return ENOMEM rather than 0 if it can't allocate
  memory for the interrupt clearing info.
- Actually do what the comment in sbus_setup_intr() says and disable the
  respective interrupt while fiddling with it.
- Remove some superfluous INTVEC() around inr, which already only contains
  the interrupt vector, in sbus_setup_intr().
- While here, fix a style(9) bug in sbus_setup_intr() (don't use function
  calls in initializers).

The first two changes are required for a CG6 driver.

MFC after:	2 weeks
2006-06-08 21:02:25 +00:00
Warner Losh
2f443d2d8f Set the rid for any resource obtained from rman_reserve_resource.
Reviewed by: wollman, jmg	(as were the other commits fixing this problem)
2006-04-20 04:20:41 +00:00
Marius Strobl
bdbca4ddae o lsi64854_enet_intr():
- Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt and leave the
    reset of the DMA engine to the caller so we don't kill any state there.
  - Move the static 'dodrain' flag to struct lsi64854_softc as there can
    be more than one LSI64854 used for a LANCE in a system and reset it
    again once draining the E-cache is done so we don't keep draining the
    cache with every interrupt.
  - Remove calling sc->sc_intrchain(), we will call lsi64854_enet_intr()
    via sc->intr() in the interrupt handler of the LANCE driver and not
    use it in chained mode.

o lsi64854_pp_intr():
  - Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt.

o Remove the no longer used sc_intrchain* from struct lsi64854_softc.

o Make lsi64854_reset(), lsi64854_setup*() and lsi64854_*_intr() static
  to lsi64854.c as we do and will only call them via the respective
  function pointers in struct lsi64854_softc.

o While here fix style(9) bugs (variable definition inside a nested scope).
2006-01-31 12:50:02 +00:00
Marius Strobl
bc0dd76f3e Revert the part of rev. 1.3 which enabled the chaining of the DMA engine
interrupt handler for the LANCE devices and remove dma_setup_intr(). We
just can't completely ignore the DMA engine in a LANCE driver anyway and
calling the DMA engine interrupt handler in the LANCE driver directly
allows to cover it by the LANCE driver lock.
2006-01-30 21:43:14 +00:00
Marius Strobl
aa3ee926a9 - Register the generic implementations for the device shutdown, suspend
and resume methods so these events propagate through the device driver
  hierarchy.
- In dma(4) enable the chaining of the DMA engine interrupt handler for
  the LANCE devices via a dma_setup_intr(). This was commented out before
  as I was unsure whether I'd use it but this is probably cleaner than
  fiddling with the DMA engine interrupt in the LANCE driver directly.
- In ebus_setup_dinfo() free 'intrs' instead of 'reg' twice in case
  setting up a child fails due to routing one of its interrupts fails. [1]

Found by:	Coverity Prevent [1]
MFC after:	3 days
2006-01-26 21:14:32 +00:00
Marius Strobl
a1a074b6b3 - Convert these bus drivers to make use of the newly introduced set of
ofw_bus_gen_get_*() for providing the ofw_bus KOBJ interface in order
  to reduce code duplication.
- While here sync the various sparc64 bus drivers a bit (handle failure
  to attach a child gracefully instead of panicing, move the printing
  of child resources common to bus_print_child() and bus_probe_nomatch()
  implementations of a bus into a <bus>_print_res() function, ...) and
  fix some minor bugs and nits (plug memory leaks present when attaching
  a bus or child device fails, remove unused struct members, ...).

Additional testing by:	kris (central(4) and fhc(4))
2005-11-22 16:39:44 +00:00
Marius Strobl
65fb49a994 - Try to not leak resources in the attach functions of the esp(4) SBus
front-end and the LSI64854 and NCR53C9x code in case one of these
  functions fails. Add detach functions to these parts and make esp(4)
  detachable.
- Revert rev. 1.7 of esp_sbus.c, since rev. 1.34 of sbus.c the clockfreq
  IVAR defaults to the per-child values.
- Merge ncr53c9x.c rev. 1.111 from NetBSD (partial):
  On reset, clear state flags and the msgout queue.
  In NetBSD code to notify the upper layer (i.e. CAM in FreeBSD) on reset
  was also added with this revision. This is believed to be not necessary
  in FreeBSD and was not merged.
  This makes ncr53c9x.c to be in sync with NetBSD up to rev. 1.114.
- Conditionalize the LSI64854 support on sbus(4) only instead of sbus(4)
  and esp(4) as it's also required for the 'dma', 'espdma' and 'ledma'
  busses/devices as well as the 'SUNW,bpp' device (printer port) which
  all hang off of sbus(4).
- Add a driver for the 'dma', 'espdma' and 'ledma' (pseudo-)busses/
  devices. These busses and devices actually represent the LSI64854 DMA
  engines for the ESP SCSI and LANCE Ethernet controllers found on the
  SBus of Ultra 1 and SBus add-on cards. With 'espdma' and 'ledma' the
  'esp' and 'le' devices hang off of the respective DMA bus instead of
  directly from the SBus. The 'dma' devices are either also used in this
  manner or on some add-on cards also as a companion device to an 'esp'
  device which also hangs off directly from the SBus. With the latter
  variant it's a bit tricky to glue the DMA engine to the core logic of
  the respective 'esp' device. With rev. 1.35 of sbus.c we are however
  guaranteed that such a 'dma' device is probed before the respective
  'esp' device which simplifies things a lot. [1]
- In the esp(4) SBus front-end read the part-unique ID code of Fast-SCSI
  capable chips the right way. This fixes erroneously detecting some
  chips as FAS366 when in fact they are not. Add explicit checks for the
  FAS100A, FAS216 and FAS236 variants instead treating all of these as
  ESP200. That way we can correctly set the respective Fast-SCSI config
  bits instead of driving them out of specs. This includes adding the
  FAS100A and FAS236 variants to the NCR53C9x core code. We probably
  still subsume some chip variants as ESP200 while in fact they are
  another variant which however shouldn't really matter as this will
  only happen when these chips are driven at 25MHz or less which implies
  not being able to run Fast-SCSI. [3]
- Add a workaround to the NCR53C9x interrupt handler which ignores the
  stray interrupt generated by FAS100A when doing path inquiry during
  boot and which otherwiese would trigger a panic.
- Add support for the 'esp' devices hanging off of a 'dma' or 'espdma'
  busses or which are companions of 'dma' devices to esp(4). In case of
  the variants that hang off of a DMA device this is a bit hackish as
  esp(4) then directly uses the softc of the respective parent to talk
  to the DMA engine. It might make sense to add an interface for this
  in order to implement this in a cleaner way however it's not yet clear
  how the requirements for the LANCE Ethernet controllers are and the
  hack works for now. [2]
  This effectively adds support for the onboard SCSI controller in
  Ultra 1 as well as most of the ESP-based SBus add-on cards to esp(4).
  With this the code for supporting the Performance Technologies SBS430
  SBus SCSI add-on cards is also largely in place the remaining bits
  were however omitted as it's unclear from the NetBSD how to couple
  the DMA engine and the core logic together for these cards.

Obtained from:	OpenBSD [1]
Obtained from:	NetBSD [2]
Clue from:	BSD/OS [3]
Reviewed by:	scottl (earlier version)
Tested with:	FSBE/S add-on card (FAS236), SSHA add-on card (ESP100A),
		Ultra 1 (onboard FAS100A), Ultra 2 (onboard FAS366)
2005-05-19 14:51:10 +00:00
Marius Strobl
410f3d914e - Add an IVAR for retrieving the interrupt group number of the parent Sbus
device and which also applies to the children. This is very usefull for
  drivers for the various subordinate busses so they don't need to fiddle
  with the OFW node of their parent themselves. As SBus busses hang of the
  nexus and we don't use the ofw_bus interface for nexus devices, yet, this
  would also require special knowledge about this in the drivers for the
  SBus children which these shouldn't need to have.
  This includes switching to use an unshifted IGN in the sc_ign member of
  the sbus(4) softc internally.
- For SBus child devices where there are variants that are actually split
  split into two SBus devices (as opposed to the first half of the device
  being a SBus device and the second half hanging off of the first one)
  like 'auxio' and 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
  which is a prerequisite to the driver attaching to the second one with
  a lower order. This saves us from dealing with different probe orders
  in the respective device drivers which generally is more hackish.
- Remove a stale comment about the 'specials' array above the attaching
  of the child devices. This is a remnant of the NetBSD/sparc origin of
  this code. There the 'specials' array is also used to probe certain
  devices which are prerequisites to others first. Why NetBSD soley
  relies on the devices having the expected order in the OFW tree on
  sparc64 isn't clear to me, as far as I can tell OFW doesn't guaranteed
  such things.
2005-05-19 14:47:31 +00:00
Marius Strobl
47b92dea0f Fix compilation when DEBUG is defined. 2005-04-18 02:34:22 +00:00
Marius Strobl
c64c7a0f7a Style and minor changes:
- Merge lsi64854.c rev. 1.25 from NetBSD: nuke trailing whitespace.
- Update NetBSD RCS IDs according to what was actually already merged.
- Remove dv_name from the lsi64854_softc and use device_printf() instead.
- Use __func__ instead of hardcoded function names in error messages.
- Use ulmin() instead of min() for comparing the DMA sizes as the values
  involved actually are represented by 64bit unsigned instead of 32bit
  unsigned. As far as I can't tell this doesn't make a difference in
  practice though.
- Some style(9) fixes (mainly indentation).
- Remove unnecessary braces.
2005-04-17 17:41:32 +00:00
Marius Strobl
b34639da21 Re-commit the following changes which were committed to these files
at their old location in sys/dev/esp after they were repo-copied to
sys/sparc64/sbus at rev. 1.1:

sys/dev/esp/lsi64854.c rev. 1.2
sys/dev/esp/lsi64854var.h rev. 1.2

Add some style(9) touch ups; style(9) states that new code should follow
these conventions and, well, this is a new driver.

Tested on:	i386, sparc64
Reviewed by:	scottl
2005-04-17 12:45:20 +00:00
Marius Strobl
743aeb6467 - Split the bus probe function into a bus probe and a bus attach function
with the attaching of the children done in the bus attach function like
  it's supposed to be.
- In the bus probe nomatch function print the resources of the children
  like it's done in the other sparc64 specific bus drivers.
- For the clock frequency IVAR use the per-child values and fall back to
  the bus default in case a child doesn't have the respective property
  instead of always using the bus default so a child driver doesn't need
  to obtain the per-child value itself (see also the commit message of
  sys/dev/esp/esp_sbus.c rev. 1.7).
- Add support for pass-through allocations. The comment preceding
  sbus_alloc_resource() wasn't quite correct, we need to support pass-
  through allocations for the 'espdma' and 'ledma' (pseudo-)busses which
  hang off of the SBus in Ultra 1 machines. There can also be actual
  bridges like the SBus-to-PCMCIA bridge on the SBus and the XBox (SBus
  extension box) probably also involves one.
2005-04-17 11:32:34 +00:00
Marius Strobl
b38701668b Some clean-up announced in rev. 1.31:
- Use auto-generated typedefs for the prototypes of the device interface
  functions.
- Style(9) fixes (mainly don't use function calls in initializers).
- Use __func__ instead of hardcoded function names in error messages.
- Try to make error messages sound uniform.
- Try to keep the code within 80 columns.
- Correct some typos.
- Correct some function declarations to match their prototypes.
- Remove unused headers, macros and variables.
- Remove a bzero() superfluous due to allocating with M_ZERO.
- Use FBSDID.
2005-04-17 11:28:41 +00:00
Warner Losh
60727d8b86 /* -> /*- for license, minor formatting changes 2005-01-07 02:29:27 +00:00
Tom Rhodes
acad338196 Fix paths after repocopies done by scottl
Reviewed by:	marius
OK'ed by:	scottl
2004-11-10 14:09:52 +00:00
Marius Strobl
26280d88d7 - Introduce an ofw_bus kobj-interface for retrieving the OFW node and a
subset ("compatible", "device_type", "model" and "name") of the standard
  properties in drivers for devices on Open Firmware supported busses. The
  standard properties "reg", "interrupts" und "address" are not covered by
  this interface because they are only of interest in the respective bridge
  code. There's a remaining standard property "status" which is unclear how
  to support properly but which also isn't used in FreeBSD at present.
  This ofw_bus kobj-interface allows to replace the various (ebus_get_node(),
  ofw_pci_get_node(), etc.) and partially inconsistent (central_get_type()
  vs. sbus_get_device_type(), etc.) existing IVAR ones with a common one.
  This in turn allows to simplify and remove code-duplication in drivers for
  devices that can hang off of more than one OFW supported bus.
- Convert the sparc64 Central, EBus, FHC, PCI and SBus bus drivers and the
  drivers for their children to use the ofw_bus kobj-interface. The IVAR-
  interfaces of the Central, EBus and FHC are entirely replaced by this. The
  PCI bus driver used its own kobj-interface and now also uses the ofw_bus
  one. The IVARs special to the SBus, e.g. for retrieving the burst size,
  remain.
  Beware: this causes an ABI-breakage for modules of drivers which used the
  IVAR-interfaces, i.e. esp(4), hme(4), isp(4) and uart(4), which need to be
  recompiled.
  The style-inconsistencies introduced in some of the bus drivers will be
  fixed by tmm@ in a generic clean-up of the respective drivers later (he
  requested to add the changes in the "new" style).
- Convert the powerpc MacIO bus driver and the drivers for its children to
  use the ofw_bus kobj-interface. This invloves removing the IVARs related
  to the "reg" property which were unused and a leftover from the NetBSD
  origini of the code. There's no ABI-breakage caused by this because none
  of these driver are currently built as modules.
  There are other powerpc bus drivers which can be converted to the ofw_bus
  kobj-interface, e.g. the PCI bus driver, which should be done together
  with converting powerpc to use the OFW PCI code from sparc64.
- Make the SBus and FHC front-end of zs(4) and the sparc64 eeprom(4) take
  advantage of the ofw_bus kobj-interface and simplify them a bit.

Reviewed by:	grehan, tmm
Approved by:	re (scottl)
Discussed with:	tmm
Tested with:	Sun AX1105, AXe, Ultra 2, Ultra 60; PPC cross-build on i386
2004-08-12 17:41:33 +00:00