Commit Graph

92094 Commits

Author SHA1 Message Date
Navdeep Parhar
cc66a2c789 cxgbe(4): Report unusual out of band errors from the firmware.
Obtained from:	Chelsio
MFC after:	5 days
2013-02-26 21:25:17 +00:00
Martin Matuska
e4428d63a8 Be more verbose on ZFS deadman I/O panic
Patch suggested upstream.

Suggested by:	Olivier Cinquin
MFC after:	12 days
2013-02-26 20:41:27 +00:00
Navdeep Parhar
d78bd33fac cxgbe(4): Consider all the API versions of the interfaces exported by
the firmware (instead of just the main firmware version) when evaluating
firmware compatibility.  Document the new "hw.cxgbe.fw_install" knob
being introduced here.

This should fix kern/173584 too.  Setting hw.cxgbe.fw_install=2 will
mostly do what was requested in the PR but it's a bit more intelligent
in that it won't reinstall the same firmware repeatedly if the knob is
left set.

PR:		kern/173584
MFC after:	5 days
2013-02-26 20:35:54 +00:00
Attilio Rao
64a3476f0c Remove white spaces.
Sponsored by:	EMC / Isilon storage division
2013-02-26 20:35:40 +00:00
Olivier Houchard
d99fd70143 Export vfp_init() prototype, for use in the MP code. 2013-02-26 20:01:05 +00:00
Olivier Houchard
486179737a Fix SMP build. 2013-02-26 19:59:52 +00:00
Olivier Houchard
f4e091106b Don't forget to init the VFP stuff for all cores. 2013-02-26 19:58:49 +00:00
Xin LI
d9dcc46365 Revert r247300 for now. I'll post a new changeset for review. 2013-02-26 19:46:59 +00:00
Xin LI
498b4407b9 Correct a typo introduced in r153575, which gives inverted logic when
handling blocking semantics when seeding.

PR:		kern/143298
Submitted by:	James Juran <james juran baesystems com>
Reviewed by:	markm
MFC after:	3 days
2013-02-26 18:33:23 +00:00
John Baldwin
7ad65edee3 Add a quirk to disable this driver for certain older laptops with an ICH2
southbridge and an Intel 82815_MC host bridge where the host bridge's
revision is less than 5.

Tested by:	mi
MFC after:	1 week
2013-02-26 18:30:47 +00:00
Alexander Motin
1af19ee4a2 Add support for good old 8192Hz profiling clock to software PMC.
Reviewed by:	fabient
2013-02-26 18:13:42 +00:00
Attilio Rao
0dde287b20 Wrap the sleeps synchronized by the vm_object lock into the specific
macro VM_OBJECT_SLEEP().
This hides some implementation details like the usage of the msleep()
primitive and the necessity to access to the lock address directly.
For this reason VM_OBJECT_MTX() macro is now retired.

Sponsored by:	EMC / Isilon storage division
Reviewed by:	alc
Tested by:	pho
2013-02-26 17:22:08 +00:00
Alexander Motin
8a4f65bc33 Change the way how software PMC updates counters.
This at least fixes -n option of pmcstat.

Reviewed by:	fabient
2013-02-26 13:59:39 +00:00
Adrian Chadd
38fda92679 Update the EWMA statistics for each intermediary rate as well as the final
rate.

This fixes two things:

* The intermediary rates now also have their EWMA values changed;
* The existing code was using the wrong value for longtries - so the
  EWMA stats were only adjusted for the first rate and not subsequent
  rates in a MRR setup.

TODO:

* Merge the EWMA updates into update_stats() now..
2013-02-26 10:24:49 +00:00
Alan Cox
219d956550 Be more conservative in auto-sizing and capping the kmem submap. In
fact, use the same values here that we use on 32-bit x86 and MIPS.  Some
machines were reported to have problems with the more aggressive values.

Reported and tested by:	andrew
2013-02-26 08:17:34 +00:00
Alan Cox
6147fb3cff Eliminate a redundant #include: machine/pmap.h is already included
through vm/pmap.h.
2013-02-26 07:41:34 +00:00
Alan Cox
2c8472682c Eliminate a duplicate #include.
Sponsored by:	EMC / Isilon Storage Division
2013-02-26 07:00:24 +00:00
Tim Kientzle
245e65e713 RPi users might want to touch the boot partition, which is always FAT
formatted on this board, so compile-in MSDOSFS.

Comment out the compiled-in FDT and explain why.
2013-02-26 04:59:02 +00:00
Ian Lepore
c6f9cfb723 Adjust the arm kernel entry point address properly regardless of whether the
e_entry field holds a physical or a virtual address.  Add a comment block
that explains the assumptions being made by the adjustment code.
2013-02-26 03:24:45 +00:00
Xin LI
285a4c7c59 Expose timespec and timeval macros when __BSD_VISIBLE is defined. This
allows userland application to use the following macros:

	timespecclear, timespecisset, timespeccmp, timespecadd,
	timespecsub;

	timevalclear, timevalisset, timevalcmp.

MFC after:	1 month
2013-02-26 02:13:02 +00:00
Attilio Rao
590f9303e5 Merge from vmobj-rwlock branch:
Remove unused inclusion of vm/vm_pager.h and vm/vnode_pager.h.

Sponsored by:	EMC / Isilon storage division
Tested by:	pho
Reviewed by:	alc
2013-02-26 01:00:11 +00:00
Navdeep Parhar
0abd31e2f7 cxgbe(4): Ask the card's firmware to pad up tiny CPLs by encapsulating
them in a firmware message if it is able to do so.  This works out
better for one of the FIFOs in the chip.

MFC after:	5 days
2013-02-26 00:27:27 +00:00
Navdeep Parhar
d938ff1d15 cxgbe(4): Update firmware to 1.8.4.0.
MFC after:	5 days
2013-02-26 00:10:28 +00:00
Adrian Chadd
6322256b83 Part #2 of the TX chainmask changes:
* Remove ar5416UpdateChainmasks();
* Remove the TX chainmask override code from the ar5416 TX descriptor
  setup routines;
* Write a driver method to calculate the current chainmask based on the
  operating mode and update the driver state;
* Call the HAL chainmask method before calling ath_hal_reset();
* Use the currently configured chainmask in the TX descriptors rather than
  the hardware TX chainmasks.

Tested:

* AR5416, STA/AP mode - legacy and 11n modes
2013-02-25 22:45:02 +00:00
Adrian Chadd
d2a72d673f Begin adding support to explicitly set the current chainmask.
Right now the only way to set the chainmask is to set the hardware
configured chainmask through capabilities.  This is fine for forcing
the chainmask to be something other than what the hardware is capable
of (eg to reduce TX/RX to one connected antenna) but it does change what
the HAL hardware chainmask configuration is.

For operational mode changes, it (may?) make sense to separately control
the TX/RX chainmask.

Right now it's done as part of ar5416_reset.c - ar5416UpdateChainMasks()
calculates which TX/RX chainmasks to enable based on the operating mode.
(1 for legacy and whatever is supported for 11n operation.)  But doing
this in the HAL is suboptimal - the driver needs to know the currently
configured chainmask in order to correctly enable things for each
TX descriptor.  This is currently done by overriding the chainmask
config in the ar5416 TX routines but this has to disappear - the AR9300
HAL support requires the driver to dynamically set the TX chainmask based
on the TX power and TX rate in order to meet mini-PCIe slot power
requirements.

So:

* Introduce a new HAL method to set the operational chainmask variables;
* Introduce null methods for the previous generation chipsets;
* Add new driver state to record the current chainmask separate from
  the hardware configured chainmask.

Part #2 of this will involve disabling ar5416UpdateChainMasks() and moving
it into the driver; as well as properly programming the TX chainmask
based on the currently configured HAL chainmask.

Tested:

* AR5416, STA mode - both legacy (11a/11bg) and 11n rates - verified
  that AR_SELFGEN_MASK (the chainmask used for self-generated frames like
  ACKs and RTSes) is correct, as well as the TX descriptor contents is
  correct.
2013-02-25 22:42:43 +00:00
Pawel Jakub Dawidek
1d59211b2e Style.
Suggested by:	kib
2013-02-25 20:51:29 +00:00
Pawel Jakub Dawidek
893365e42d After r237012, the fdgrowtable() doesn't drop the filedesc lock anymore,
so update a stale comment.

Reviewed by:	kib, keramida
2013-02-25 20:50:08 +00:00
Sean Bruno
ee4827b20d The 5300 series ciss(4) board does not work in performant mode with our
currnet initialization sequence.  Set it to simple mode only so that
systems can be updated from stable/7 to newer installations.

At some point, we should figure out why we cannot initialize performant
mode on this board.

PR:		kern/153361
Reviewed by:	scottl
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-02-25 19:22:56 +00:00
Andrew Gallatin
dedbe8362f Several cleanups and fixes to mxge:
- Remove vestigial null pointer tests after malloc(..., M_WAITOK).

- Remove vestigal qualhack union

- Use strlcpy() instead of the error-prone strncpy() when parsing
  EEPROM and copying strings

- Check the MAC address in the EEPROM strings more strictly.

- Expand the macro MXGE_NEXT_STRING() at its only user. Due to a typo,
  the macro was very confusing.

- Remove unnecessary buffer limit check.  The buffer is double-NUL
  terminated per construction.

PR:		kern/176369
Submitted by:	Christoph Mallon <christoph.mallon gmx.de>
2013-02-25 16:22:40 +00:00
Matt Jacob
9cdcf100c1 Don't try and negotiate sync mode if either period or offset are zero.
PR:		kern/163064
Partially Submitted by:	Peter <pmc@citylink.dinoex.sub.org>
MFC after:	1 month
2013-02-25 14:06:24 +00:00
Martin Matuska
e70664bafc MFV v242732:
Merge the ZFS I/O deadman thread from vendor (illumos).
This feature panics the system on hanging ZFS I/O, helps debugging
and resumes failed service.

The panic behavior can be controlled with the loader-only tunables:
vfs.zfs.deadman_enabled (enable or disable panic on stalled ZFS I/O)
vfs.zfs.deadman_synctime (expiration time for stalled ZFS I/O)

By default, ZFS I/O deadman is enabled by default on amd64 and i386
excluding virtual guest machines.

Illumos ZFS issues:
  3246 ZFS I/O deadman thread

References:
  https://www.illumos.org/issues/3246

MFC after:	2 weeks
2013-02-25 12:33:31 +00:00
Matt Jacob
5bba9b9f69 Turn off fast posting for the ISP2100- I'd forgotten that it actually
might have been enabled for them- now that we use all 32 bits of handle.
Fast Posting doesn't pass the full 32 bits.

Noticed by: Bugs in NetBSD. Only a NetBSD user might actually still use such old hardware.
MFC after:	1 week
2013-02-25 11:22:54 +00:00
Hans Petter Selasky
2e39e9ee71 Fix init/uninit function type. 2013-02-25 10:57:35 +00:00
Oleksandr Tymoshenko
8f80e4e134 Fix off-by-one error in sanity checks 2013-02-25 09:33:48 +00:00
Hans Petter Selasky
8cb536dd39 Add new USB ID.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2013-02-25 08:24:21 +00:00
Oleksandr Tymoshenko
97b405f18f - Fix off-by-one error when returning max pin number
- Fix GPIOGET for output pins. Requesting state for
    output pin is valid operation, get the state from
    TI_GPIO_DATAOUTX register
2013-02-25 08:04:47 +00:00
Marcel Moolenaar
c78a079c40 kernacc() expects all KVAs to be covered in the kernel map. With the
introduction of the PBVM, this stopped being the case. Redefine the
VM parameters so that the PBVM is included in the kernel map. In
particular this introduces VM_INIT_KERNEL_ADDRESS to point to the base
of region 5 now that VM_MIN_KERNEL_ADDRESS points to the base of
region 4 to include the PBVM.
While here define KERNBASE to the actual link address of the kernel as
is intended.

PR:		169926
2013-02-25 02:41:38 +00:00
Tim Kientzle
6d4a620eba Fix the bug I introduced in r247045.
After digging through more carefully, it looks like there's
no real need to have the DTB in the module directory.
So we can simplify a lot:  Just copy DTB into local heap
for "fdt addr" and U-Boot integration, drop all the extra
COPYIN() calls.

I've left one final COPYIN() to update the in-kernel DTB
for consistency with how this code used to work, but I'm
no longer convinced it's appropriate here.

I've also remove the mem_load_raw() utility that I added
to boot/common/module.c with r247045 since it's no longer
necessary.
2013-02-25 01:50:04 +00:00
Oleksandr Tymoshenko
c84251eb7e - Move dma, sdhci and mbox nodes down in dts in order to get them
initialized after FPIO controller since they might rely on GPIO
    functionality

- Update interrupts property of dma node to contain all allocated
    interrupts
2013-02-23 23:22:48 +00:00
Oleksandr Tymoshenko
8966173312 Bump per-device interrupt limit to more reasonable default.
Some hardware like DMA and GPIO controllers might require
more then 8 interrupts per device instance.

Submitted by:	Daisuke Aoyama <aoyama at peach.ne.jp>
Discussed with:	gber@, raj@
2013-02-23 22:58:04 +00:00
Oleksandr Tymoshenko
e5b6b345cf Add macroses to properly map IO peripherals memory window from
ARM physical memory address space to VideoCore address space
2013-02-23 22:46:26 +00:00
Tim Kientzle
3bb97cef07 "fdt addr" gets run from loader.rc before the kernel is loaded.
This was broken by r247045 which tried to copy the FDT into the
module directory immediately.
Instead, store the address and arrange for the FDT to get
copied into the module directory later when the usual
FDT initialization runs.
2013-02-23 20:34:47 +00:00
Tim Kientzle
7beaf3ae9b Print kernel args as late as possible before jumping into kernel. 2013-02-23 20:27:03 +00:00
Marcel Moolenaar
1736d28c44 Enable PREEMPTION by default now that PR 147501 has been fixed. 2013-02-23 19:27:53 +00:00
Alexander Motin
504266d60a Add basic and not very reliable protection against going to sleep with
thread scheduled by interrupt fired after we entered critical section.
None of cpu_sleep() implementations on ARM check sched_runnable() now, so
put the first line of defence here.  This mostly fixes unexpectedly long
sleeps in synthetic tests of calloutng code and probably other situations.
2013-02-23 18:32:42 +00:00
Martin Matuska
781c0f87d3 MFV r246653:
Import vendor change to avoid "unitialized variable" warnings.

Illumos ZFS issues:
  3522 zfs module should not allow uninitialized variables

References:
  https://www.illumos.org/issues/3522
2013-02-23 11:21:05 +00:00
Alexander Motin
512a3aa005 Fix command timeout caused by data underrun during fetching ATAPI sense
data, introduced by r246713.  There are two places where ata_request is
filled in ATA_CAM: ata_cam_begin_transaction() and ata_cam_request_sense().
In the first case DMA should be done for addresses from the CCB. In second
case, DMA should be done to the different address, the address of the sense
buffer inside the CCB structure itself.
2013-02-22 21:43:21 +00:00
Alexander Motin
6efe203d7c Hide SEMB port of the SiI3826 Port Multiplier by default to avoid extra
errors while it tries to talk via I2C to usually missing external SEP.
There is tunable to enable it back when needed.
2013-02-22 19:53:12 +00:00
Andrew Gallatin
cabc512fe4 Bump mxge copyright.
Sponsored by: Myricom

MFC After: 7 days
2013-02-22 19:23:33 +00:00
Andrew Gallatin
a4b233dd06 Improvements for newer mxge nics:
- Some mxge nics may store the serial number in the SN2 field of the
  EEPROM.  These will also have an SN=0 field, so parse the SN2 field,
  and give it precedence.

- Skip MXGEFW_CMD_UNALIGNED_TEST on mxge nics which do not require it.
  This saves roughly 10ms per port at device attach time.

Sponsored by: Myricom

MFC After: 7 days
2013-02-22 19:21:29 +00:00