- Don't bother setting OACTIVE when the descriptors are all full
or there's a vr_encap failure, it doesn't help anything.
- Correctly roll back on the descriptor list after a failure
so as not to corrupt the list.
- Add a missing VR_UNLOCK().
Without these changes, vr_encap failure (which is assured during
a low mbuf situation) would result in the card locking until
the watchdog could fire.
MFC after: 1 week
properly (likely due to mbuf exhaustion.) Previously, the driver
got somewhat wedged.
Also, remove the annoying messages printed every time xl_encap
couldn't allocate a mbuf; they served no useful purpose, and just made
an mbuf exhaustion situation more annoying.
MFC after: 1 week
RX part of this driver too. It's better since the code wasn't
dealing with bus_dmamap_load() returning EINPROGRESS, and this
can't happen with bus_dmamap_load_mbuf().
Submitted by: jake
- Remove locking of the softc in the attach method, instead depending on
bus_setup_intr being at the end of attach (delaying interrupt enable until
after ether_ifattach is called)
- Call *_detach directly in the error case of attach, depending on checking
in detach to only free resources that were allocated. This puts all
resource freeing in one place, avoiding thinkos that lead to memory leaks.
- Add bus_child_present check to calls to *_stop in the detach method to
be sure hw is present before touching its registers.
- Remove bzero softc calls since device_t should do this for us.
- dc: move interrupt allocation back where it was before. It was unnecessary
to move it. This reverts part of 1.88
- rl: move irq allocation before ether_ifattach. Problems might have been
caused by allocating the irq after enabling interrupts on the card.
- rl: call rl_stop before ether_ifdetach
- sf: call sf_stop before ether_ifdetach
- sis: add missed free of sis_tag
- sis: check errors from tag creation
- sis: move dmamem_alloc and dmamap_load to happen at same time as tag creation
- sk: remove duplicate initialization of sk_dev
- ste: add missed bus_generic_detach
- ti: call ti_stop before ether_ifdetach
- ti: add missed error setting in ti_rdata alloc failure
- vr: add missed error setting in I/O, memory mapping cases
- xl: add missed error setting in I/O, memory mapping cases
- xl: remove multi-level goto on attach failure
- xl: move dmamem_alloc and dmamap_load to happen at same time as tag creation
- Calls to free(9) are unconditional because it is valid to call free with a
null pointer.
Reviewed by: imp, mdodd
function.
Also, use m_defrag where appropriate to defrag long mbuf chains
in the same fashion as was done in if_sis.c. Before this change,
if_dc would blow up and take down the interface if fed a really long
mbuf chain.
MFC after: 2 weeks
1. The chain passed in is > 31 fragments long
or
2. The chain will not fit in the remaining descriptors without
defragmentation.
This is slightly less clear than other network drivers because the sis
chips share one descriptor list for all packets, it seems.
Before this change, a > 127 fragment chain would get stuck in the IFQUEUE
permanently, bringing all network traffic to a halt.
MFC after: 2 weeks
code messed up on B & C chipsets because it lost the packet header
and therefore the flag indicating the need for hardware checksums.
MFC after: 2 weeks
where physical addresses larger than virtual addresses, such as i386s
with PAE.
- Use this to represent physical addresses in the MI vm system and in the
i386 pmap code. This also changes the paddr parameter to d_mmap_t.
- Fix printf formats to handle physical addresses >4G in the i386 memory
detection code, and due to kvtop returning vm_paddr_t instead of u_long.
Note that this is a name change only; vm_paddr_t is still the same as
vm_offset_t on all currently supported platforms.
Sponsored by: DARPA, Network Associates Laboratories
Discussed with: re, phk (cdevsw change)
driver should use port or memory based IO, determine it dynamically
at runtime, preferring MMIO where possible. This helps us support newer
arches which dislike port based access better.
Tested on i386 & sparc64, with 3c900, 905, 905b, and 905C cards.
(in varying combinations by both jake and myself)
branches:
Initialize struct cdevsw using C99 sparse initializtion and remove
all initializations to default values.
This patch is automatically generated and has been tested by compiling
LINT with all the fields in struct cdevsw in reverse order on alpha,
sparc64 and i386.
Approved by: re(scottl)
- Get rid of the useless atop() / pmap_phys_address() detour. The
device mmap handlers must now give back the physical address
without atop()'ing it.
- Don't borrow the physical address of the mapping in the returned
int. Now we properly pass a vm_offset_t * and expect it to be
filled by the mmap handler when the mapping was successful. The
mmap handler must now return 0 when successful, any other value
is considered as an error. Previously, returning -1 was the only
way to fail. This change thus accidentally fixes some devices
which were bogusly returning errno constants which would have been
considered as addresses by the device pager.
- Garbage collect the poorly named pmap_phys_address() now that it's
no longer used.
- Convert all the d_mmap_t consumers to the new API.
I'm still not sure wheter we need a __FreeBSD_version bump for this,
since and we didn't guarantee API/ABI stability until 5.1-RELEASE.
Discussed with: alc, phk, jake
Reviewed by: peter
Compile-tested on: LINT (i386), GENERIC (alpha and sparc64)
Runtime-tested on: i386
time and there's no indication that it will improve anytime soon.
By removing support for SimOS it is possible to build LINT on
Alpha, which is considered more important at the moment.
Not objected to on: alpha@
as opposed to one after the other. This is faster in both -CURRENT
and -STABLE. Additionally, there is less code duplication for
error-checking.
One thing to note is that this code seems to return(1) when no buffers
are available; perhaps ENOBUFS should be the correct return value?
Partially submitted & tested by: Hiten Pandya <hiten@unixdaemons.com>
MFC after: 1 week
wish the busdma APIs were more consistent accross architectures.
We should probably move all the other DMA map creations in
xl_attach() where we can really handle them failing, since
xl_init() is void and shouldn't fail.
Pointy hat to: mux
Tested by: Anders Andersson <anders@hack.org>
bus_dmamap_load() it.
- Make it so reusing mbufs when we can't allocate (or map) new ones
actually works. We were previously trying to reuse a mbuf which
was already bus_dmamap_unload()'ed.
Reviewed by: silby
for the agp module, and add agp to the list of modules to compile for alpha.
Add an alpha_mb() to agp_flush_cache for alpha -- it's not correct but may
improve the situation, and it's what linux and NetBSD do.
using the Rhine's internal shift registers which are designed
for the job. This reduces the amount of time we wait around shifting
bits, and seems to work better with some chips.
Also, provide a workaround for some newer cards which report fake PHYs
at multiple addresses. (As more cards are ID'd, I'm sure this part
of the code will have to be expanded to cover more cases.)
Submitted by: Thomas Nystrom <thn@saeab.se>
MFC after: 1 week
under load.
This patch has been tested by Thomas and other for more than a month now,
and all (known) hangs seem to be solved.
Thomas's explanation of the patch:
* Fix the problem with the printing of the RX-error.
* Code from if_fet do better deal with the RX-recovery including a
timeout of the RX-turnoff.
* The call to vr_rxeof before vr_rxeoc have been moved to a point
where the RX-part of the chip is turned off. Otherwise there is a
window where new data could have been written to the buffer chain
before the RX-part is turned off. If this happens the chip will see
a busy rx-buffer. I have no evidence that this have occured but
god knows what the chip will do in this case!
* I have added a timeout of the TX-turnoff. I have checked and in
my 900 MHz system the flags for turnoff (both RX & TX) is seen at
the first check in the loop.
* I could see that I got the VR_ISR_DROPPED interrupt sometimes and
started to thinking about this. I then realized that no recovery is
needed for this case and therefore I only count it as an rxerror
(which was not done before).
* Finally I have changed the FIFO RX threshhold to 128 bytes. When I
did this the VR_ISR_DROPPED interrupt went away. Theory: The chip
will receive a complete frame before it tries to write it out to
memory then the RX threshold is set to store'n'forward. IF the frame
is large AND the next rx frame also is large AND the bus is busy
transfering a TX frame to the TX fifo THEN the second received
frame wont fit in the FIFO and is then dropped. By having the RX
threshold set to 128 the RX fifo is emptied faster.
MFC after: 5 days
on 900B and 635(A).
Re-add the enhanced PHY access register method again for older chipsets,
they do not seem to work with all old chips.
Reviewed by: phk
MFC after: 7 days
- Add conversions to/from little endian for fields that the NIC accesses
by DMA as required.
- Add some bus_dmamap_sync() calls, and correct some existing ones.
- Read the receiver information from the EEPROM in an endian-neutral
manner.
- Load all RX and TX descriptors in a single DMA map up front, and
get the bus addresses of individual descriptors by address arithmetic;
this fixes multiple use of the descriptor tags, which would have
undesired effects.
It seems that xl still does not work on e250 boxen, for reasons which
are not clear yet.
Reviewed by: mux
and ether_ifattach() to end. This fixes a "could sleep" case and
simplifies error exit cases as well. Also be sure to set errno
and clean up resources in !mac error case.
Tested by: Ryan Beasley
Allow to read EEPROM from LAN. It is shared
between a 1394 controller and the NIC and each
time we access it, we need to set SIS_EECMD_REQ.
Idea from: linux driver source
Reviewed by: luoqi
Obtained from: linux driver source (idea)
register, and phy has to be directly accessed via mdio.
Patch converted to CURRENT from STABLE.
Submitted by: luoqi
Reviewed by: luoqi (again)
MFC after: 2 weeks
the PCI bus. When this bit is set, the Max DMA Burst Size
for TX/RX DMA should be no larger than 64 bytes.
Reviewed by: luoqi
Obtained from: (idea from linux driver source)
MFC after: 2 weeks
is read one clock edge too late. This bit is driven low by
slave (as any other input data bits from slave) when the clock
is LOW. The current code did read the bit after the clock was
driven high again.
Reviewed by: luoqi
MFC after: 2 weeks
bus_dmamap_load_mbuf() returned EFBIG.
o Fix mbuf leaks in an error (rare) code path.
o Reuse the TX descriptor if xl_encap() failed instead of
just picking the next one.
o Better error messages.
it possible to use this driver under ia64, sparc64 (though
there may be endianness issues with this one) and other archs.
Tested on: i386, alpha (gallatin)
pci_get_ether accesor, which gets it from the CIS for cardbus cards
(and from other pci-like buses via whatever mechanism is used there).
Submitted by: sam
Approved by: re (blanket)
1. Detect the revision of the Rhine chip we're using.
2. Use the force reset command on revisions which support
it whenever the normal reset command fails.
This should solve a wide range of "my vr0 locks up with reset
failed messages" problems. (Although the root causes should
be eventually tracked down.)
Tested by: grenville armitage <garmitage@swin.edu.au>
Obtained from: Via's if_fet driver
MFC after: 3 days
Approved by: re
o use if_input for input packet processing
o don't strip the Ethernet header for input packets
o use BPF_* macros bpf tapping
o call ether_ioctl to handle default ioctl case
o track vlan changes
Reviewed by: many
Approved by: re
OpenBSD who got the code (or the idea) from the NetBSD tlp driver.
This gets some cardbus dc cards working (either completely or nearly
so). It also appears to get additional pci cards working, without
breaking working ones.
# Maybe some additional work is needed here. Also, the cardbus attachment
# might need to match on the CIS rather than on the vendor/device so we have
# a finer level of detail as to what the card is. Technically, the
# vendor/device fields are undefined for CardBus (even though most cards are
# using common silicon with pci models).
According to the MII specification, the delay produced by our
reads alone are sufficient for correct operation.
This reduces the time mii_tick takes from 10ms to ~1ms here. That's
still a lot, but much better than before.
Submitted by: Harti Brandt <brandt@fokus.gmd.de>
MFC after: 3 weeks
RXSTATE to STOPPED, but to WAIT. This should fix hangs which
could only be solved by replugging the cable.
Submitted by: jhb
Reviewed by: phk
MFC after: 2 weeks
The 550 version is location at address 1 but since it works right we
let the code find whatever PHY it can.
Fix a fragment issue on TX. If the number of frags are more then the
driver has allocated then bring all the frags together into one packet
and send it out. Code derived from the fxp driver.
Tested and found by: Francois Tigeot <francois.tigeot@nic.fr>
Hellmuth Michaelis <hm@kts.org>
MFC after: 1 week
pmap_zero_page() and pmap_zero_page_area() were modified to accept
a struct vm_page * instead of a physical address, vm_page_zero_fill()
and vm_page_zero_fill_area() have served no purpose.
when this is needed. Work around bogus second PHY in the DFE-580 card
via a change in the if_ste.c driver.
Suggested by: jdp
Reviewed by: jdp
MFC after: 3 days
elimiates the driver lockup problem reported by many.
Concepts used were taken from Via's if_fet driver. Verification
and implementation were done by Thomas Nystrom.
Submitted by: Thomas Nystrom <thn@saeab.se>
MFC after: 3 days
This is pretty much fixes any issue I can find:
- Watchdog timeouts were due to starting the TX DMA engine
before we had a packet ready for it. So the first packet
sent never got out only if we sent more then one packet
at a time did the others make it out and not blow up.
Of course reseting the chip then caused us not to transmit
the first packet again ie. catch-22. This required logic changes.
- Combine interrupts on TX packets being queued up.
- Don't keep running around the RX ring since we might get
out of sync so only go around once per receive
- Let the RX engine recover via the poll interface which is
similar to the TX interface. This way the chip wakes
up with no effort when we read enough packets.
- Do better hand-shaking on RX & TX packets so they don't
start of to soon.
- Force a duplex setting when the link comes up after
an ste_init or it will default to half-duplex and be
really slow. This only happens on subsequent ste_init.
The first one worked.
- Don't call stat_update for every overflow. We only monitor
the collisions so the tick interval is good enough for that.
Just read in the collision stats to minimize bus reads.
- Don't read the miibus every tick since it uses delays and
delays are not good for performance.
- Tie link events directly to the miibus code so the port
gets set correctly if someone changes the port settings.
- Reduce the extreme number of {R,T}FD's. They would consume
130K of kernel memory for each NIC.
- Set the TX_THRESH to wait for the DMA engine to complete
before running the TX FIFO. This hurts peak TX performance
but under bi-directional load the DMA engine can't keep up
with the FIFO. Testing shows that we end up in the case
anyways (a la dc(4) issues but worse since the RX engine hogs
everything).
- When stopping the card do a reset since the reset verifies the
card has stopped. Otherwise on heavy RX load the RX DMA engine
is still stuffing packets into memory. If that happens after
we free the DMA area memory bits get scribled in memory and
bad things happen.
This card still has seemingly unfixable issues under heavy RX load in
which the card takes over the PCI bus.
Sponsored by: Vernier Networks
MFC after: 1 week
Remove some unnecessary assignments to mbuf fields in sis_newbuf(),
the "length" fields are of no use while the mbuf is in the receive ring.
MFC after: 3 days
sizes. Previously, the end result was at the mercy of the card's default
setting. This change will reduce the number of buffer underruns for
some users.
PR: kern/37929
Submitted by: Thomas Nystrom <thn@saeab.se>
MFC after: 7 days
has gone away instead of spinning in the interrupt handler. This stops
my machine from hanging when I eject a rl(4)-based cardbus card.
Reviewed by: imp
