Commit Graph

6 Commits

Author SHA1 Message Date
Ruslan Bukin
0c340d7ed9 Negate the logic of XCHAN_CAP_NOBUFS macro and rename it to
XCHAN_CAP_BOUNCE.

The only application that uses bounce buffering for now is the Government
Furnished Equipment (GFE) P2's dma core (AXIDMA) with its own dedicated
cacheless bounce buffer.

Sponsored by:	DARPA, AFRL
2019-07-04 14:04:08 +00:00
Ruslan Bukin
5939d8a1a2 Add driver for the Xilinx AXI Direct Memory Access (AXI DMA) controller
found in the U.S. Government Furnished Equipment (GFE) 64-bit RISC-V cores.

Sponsored by:	DARPA, AFRL
2019-05-08 15:43:17 +00:00
Ruslan Bukin
85ae89f4bb Add driver for Xilinx AXI Ethernet tri-mode (10/100/1000 Mb/s) MAC found
in the U.S. Government Furnished Equipment (GFE) 64-bit RISC-V cores.

Sponsored by:	DARPA, AFRL
2019-05-08 15:36:57 +00:00
Emmanuel Vadot
7073d12c4d ofw_spi: Parse property for the SPI mode and CS polarity.
As cs is stored in a uint32_t, use the last bit to store the
active high flag as it's unlikely that we will have that much CS.

Reviewed by:	loos
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D8614
2016-12-18 14:54:20 +00:00
Ruslan Bukin
d1bdbe1259 Assert CS for single transfers. 2016-04-19 15:36:18 +00:00
Ruslan Bukin
e72dd8d78f Add driver for Xilinx AXI Quad SPI device. The device was found in
lowRISC hardware.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-04-19 14:47:08 +00:00