- EMC clock have standard peripheral clock block. Use it.
- Implement full frequency set method for PLLD2. This PLL
is used as HDMI pixel clock so we must be able to set it
to wide range of frequencies, within 5% tolerance allowed
by HDMI specification. Due to this, full state space search
(over m, n, p fields) is necessary.
MFC after: 3 weeks
The PLL_X, base CPU frequency source, doesn't have a bypass switch and thus
we must use another frequency source for CPU while changing its frequency.
PLL_P is ideal for this, it runs at 480MHz and CPU can be clocked at this
frequency at any CPU voltage.
The following pheripherals are supported: UART, MMC, AHCI, EHCI, PCIe, I2C,
PMIC, GPIO, CPU temperature and clock.
Note: The PCIe driver is pure mash at this moment. It will be reworked
immediately when both D5237 and D2579 enter the current tree.
