d17485b639
7 Commits
| Author | SHA1 | Message | Date | |
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Justin T. Gibbs
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56a7c4a852 |
ahc_eisa.c:
ahc_pci.c: Add detach support. Make use of soft allocated on our behalf by newbus. For PCI devices, disable the mapping type we aren't using for extra protection from rogue code. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Sync perforce IDs. aic7xxx_freebsd.c: Capture the eventhandle returned by EVENTHANDER_REGISTER so we can kill the handler off during detach. Use AHC_* constants instead of hard coded numbers in a few more places. Test PPR option state when deciding to "really" negotiate when the CAM_NEGOTIATE flag is passed in a CCB. Make use of core "ahc_pause_and_flushwork" routine in our timeout handler rather than re-inventing this code. Cleanup all of our resources (really!) in ahc_platform_free(). We should be all set to become a module now. Implement the core ahc_detach() routine shared by all of the FreeBSD front-ends. aic7xxx_freebsd.h: Softc storage for our event handler. Null implementation for the ahc_platform_flushwork() OSM callback. FreeBSD doesn't need this as XPT callbacks are safe from all contexts and are done directly in ahc_done(). aic7xxx_inline.h: Implement new lazy interrupt scheme. To avoid an extra PCI bus read, we first check our completion queues to see if any work has completed. If work is available, we assume that this is the source of the interrupt and skip reading INTSTAT. Any remaining interrupt status will be cleared by a second call to the interrupt handler should the interrupt line still be asserted. This drops the interrupt handler down to a single PCI bus read in the common case of I/O completion. This is the same overhead as in the not so distant past, but the extra sanity of perforning a PCI read after clearing the command complete interrupt and before running the completion queue to avoid missing command complete interrupts added a cycle. aic7xxx.c: During initialization, be sure to initialize all scratch ram locations before they are read to avoid parity errors. In this case, we use a new function, ahc_unbusy_tcl() to initialize the scratch ram busy target table. Replace instances of ahc_index_busy_tcl() used to unbusy a tcl without looking at the old value with ahc_unbusy_tcl(). Modify ahc_sent_msg so that it can find single byte messages. ahc_sent_msg is now used to determine if a transfer negotiation attempt resulted in a bus free. Be more careful in filtering out only the SCSI interrupts of interest in ahc_handle_scsiint. Rearrange interrupt clearing code to ensure that at least one PCI transaction occurrs after hitting CLRSINT1 and writting to CLRINT. CLRSINT1 writes take a bit to take effect, and the re-arrangement provides sufficient delay to ensure the write to CLRINT is effective. The old code might report a spurious interrupt on some "fast" chipsets. export ahc-update_target_msg_request for use by OSM code. If a target does not respond to our ATN request, clear it once we move to a non-message phase. This avoids sending a MSG_NOOP in some later message out phase. Use max lun and max target constants instead of hard-coded values. Use softc storage built into our device_t under FreeBSD. Fix a bug in ahc_free() that caused us to delete resources that were not allocated. Clean up any tstate/lstate info in ahc_free(). Clear the powerdown state in ahc_reset() so that registers can be accessed. Add a preliminary function for pausing the chip and processing any posted work. Add a preliminary suspend and resume functions. aic7xxx.h: Limit the number of supported luns to 64. We don't support information unit transfers, so this is the maximum that makes sense for these chips. Add a new flag AHC_ALL_INTERRUPTS that forces the processing of all interrupt state in a single invokation of ahc_intr(). When the flag is not set, we use the lazy interrupt handling scheme. Add data structures to store controller state while we are suspended. Use constants instead of hard coded values where appropriate. Correct some harmless "unsigned/signed" conflicts. aic7xxx.seq: Only perform the SCSIBUSL fix on ULTRA2 or newer controllers. Older controllers seem to be confused by this. In target mode, ignore PHASEMIS during data phases. This bit seems to be flakey on U160 controllers acting in target mode. aic7xxx_pci.c: Add support for the 29160C CPCI adapter. Add definitions for subvendor ID information available for devices with the "9005" vendor id. We currently use this information to determine if a multi-function device doesn't have the second channel hooked up on a board. Add rudimentary power mode code so we can put the controller into the D0 state. In the future this will be an OSM callback so that in FreeBSD we don't duplicate functionality provided by the PCI code. The powerstate code was added after I'd completed my regression tests on this code. Only capture "left over BIOS state" if the POWRDN setting is not set in HCNTRL. In target mode, don't bother sending incremental CRC data. |
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Justin T. Gibbs
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72df3c5621 |
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets. Many thanks to Tor Egge for his assistance in diagnosing problems with the error recovery code. aic7xxx.c: Report missed bus free events using their own sequencer interrupt code to avoid confusion with other "bad phase" interrupts. Remove a delay used in debugging. This delay could only be hit in certain, very extreme, error recovery scenarios. Handle transceiver state changes correctly. You can now plug an SE device into a hot-plug LVD bus without hanging the controller. When stepping through a critical section, panic if we step more than a reasonable number of times. After a bus reset, disable bus reset interupts until we either our first attempt to (re)select another device, or another device attemps to select us. This removes the need to busy wait in kernel for the scsi reset line to fall yet still ensures we see any reset events that impact the state of either our initiator or target roles. Before this change, we had the potential of servicing a "storm" of reset interrupts if the reset line was held for a significant amount of time. Indicate the current sequencer address whenever we dump the card's state. aic7xxx.reg: Transceiver state change register definitions. Add the missed bussfree sequencer interrupt code. Re-enable the scsi reset interrupt if it has been disabled before every attempt to (re)select a device and when we have been selected as a target. When being (re)selected, check to see if the selection dissappeared just after we enabled our bus free interrupt. If the bus has gone free again, go back to the idle loop and wait for another selection. Note two locations where we should change our behavior if ATN is still raised. If ATN is raised during the presentation of a command complete or disconnect message, we should ignore the message and expect the target to put us in msgout phase. We don't currently do this as it requires some code re-arrangement so that critical sections can be properly placed around our handling of these two events. Otherwise, we cannot guarantee that the check of ATN is atomic relative to our acking of the message in byte (the kernel could assert ATN). Only set the IDENTIFY_SEEN flag after we have settled on the SCB for this transaction. The kernel looks at this flag before assuming that SCB_TAG is valid. This avoids confusion during certain types of error recovery. Add a critical section around findSCB. We cannot allow the kernel to remove an entry from the disconnected list while we are traversing it. Ditto for get_free_or_disc_scb. aic7xxx_freebsd.c: Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is set in SEQ_FLAGS. Fix a typo that caused us to execute some code for the non-SCB paging case when paging SCBs. This only occurred during error recovery. |
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Justin T. Gibbs
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dd1290f033 |
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips. |
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Justin T. Gibbs
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73f1c25915 |
Clean up error recovery code:
aic7xxx.c: In target mode, reset the TQINPOS on every restart of the sequencer. In the past we did this only during a bus reset, but there are other reasons the sequencer might be reset. In ahc_clear_critical_section(), disable pausing chip interrupts while we step the sequencer out of a critical section. This avoids the possibility of getting a pausing interrupt (unexpected bus free, bus reset, etc.) that would prevent the sequencer from stepping. Send the correct async notifications in the case of a BDR or bus reset. In ahc_loadseq(), correct the calculation of our critical sections. In some cases, the sections would be larger than needed. aic7xxx.h: Remove an unused SCB flag. aic7xxx.seq: MK_MESSAGE is cleared by the kernel, there is no need to waste a sequencer instruction clearing it. aic7xxx_freebsd.c: Go through the host message loop instead of issuing a single byte message directly in the ahc_timeout() case where we are currently on the bus to the device. The effect is the same, but this way we get a nice printf saying that an expected BDR was delivered instead of an unexpected bus free. If we are requeuing an SCB for an error recovery action, be sure to set the DISCONNECTED flag in the in-core version of the SCB. This ensures that, in the SCB-paging case, the sequencer will still recognize the reselection as valid even if the version of the SCB with this flag set was never previously paged out to system memory. In the non-paging case, set the MK_MESSAGE flag in SCB_CONTROL directly. aic7xxx_pci.c: Enable the Memeory Write and Invalidate bug workaround for all aic7880 chips with revs < 1. This bug is rarely triggered in FreeBSD as most transfers end on cache-aligned boundaries, but a recheck of my references indicates that these chips are affected. |
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Justin T. Gibbs
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a49630ac82 |
Convert the driver to use a single DMA for fetching new commands instead
of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts. |
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Justin T. Gibbs
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c498406d58 |
Add Perforce RCSIDs for easy revision correlation to my local tree.
ahc_pci.c: Bring back the AHC_ALLOW_MEMIO option at least until the memory mapped I/O problem on the SuperMicro 370DR3 is better understood. aic7xxx.c: If we see a spurious SCSI interrupt, attempt to clear it and continue by unpausing the sequencer. Change the interface to ahc_send_async(). Some async messages need to be broadcast to all the luns of a target or all the targets of a bus. This is easier to achieve by passing explicit channel, target, and lun parameters instead of attempting to construct a device info struct to match. Filter the sync parameters for the PPR message in exactly the same way we do for an old fashioned SDTR message. Correct some typos and correct a panic message. Handle rejected PPR messages. In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build any additional transfer messages instead of doing this inline. aic7xxx.h: Increase the size of both msgout_buf and msgin_buf to better accomodate PPR messages. aic7xxx_freebsd.c: Update for change in ahc_send_async() parameters. aic7xxx_freebsd.h Update for change in ahc_send_async() parameters. Honor AHC_ALLOW_MEMIO. aic7xxx_pci.c: Check the error register before going into full blown PCI interrupt handling. This avoids a few costly PCI configuration space reads when we run our PCI interrupt handler because another device sharing our interrupt line is more active than we are. Also unpause the sequencer after processing a PCI interrupt. |
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Justin T. Gibbs
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717d424718 |
Move aicasm to its own subdirectory.
Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS. |