Commit Graph

4 Commits

Author SHA1 Message Date
Sam Leffler
d212022417 Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
Sam Leffler
dd5ac081b8 add hints to specify how NPE ports are mapped to MAC+PHY; these
could be commented out as they just duplicate the defaults that
are built into the code

Reviewed by:	imp
MFC after:	1 week
2008-03-22 16:55:51 +00:00
John Hay
aeefab2b98 Remove the hardcoded IXP425_UART?_VBASE values in the
uart_ixp425_probe() and uart_cpu_getdev(). Change
uart_cpu_getdev() to use hints to find the console.

Reviewed by:	marcel
2007-05-29 18:10:42 +00:00
Sam Leffler
c1fd78f884 o add hints for avila boards; brings back i2c devices lost when iicbus
started using hints instead of wired down device enumeration
o add usb commented out; will enable when support works

MFC after:	1 month
2007-05-24 16:27:48 +00:00