Commit Graph

21 Commits

Author SHA1 Message Date
Mark Peek
73cb22707a Add additional cpuid feature flags and put into a canonical format.
MFC after:	1 week
2002-06-22 23:00:33 +00:00
Peter Wemm
9d146ac5d1 Activate SSE/SIMD. This is the extra context switching support that
we are required to do if we let user processes use the extra 128 bit
registers etc.

This is the base part of the diff I got from:
  http://www.issei.org/issei/FreeBSD/sse.html
I believe this is by:  Mr. SUZUKI Issei <issei@issei.org>
SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp>
Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see
  http://kobe1995.net/~kaz/FreeBSD/SSE.en.html

I have fixed a couple of style(9) deviations.  I have some followup
commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Peter Wemm
ebb30c0b3a Add the CR4 values for P3 SIMD enabling support. FXSR tells the cpu that
the OS does FXSAVE/FXRESTOR instructions (fast FPU save/restore) during
context switching and also enables SIMD since this enables saving the
extra CPU context that isn't saved with normal FPU regs.  The other
enables the SIMD instructions to use exception 16 (FPU) error reporting.
Note, this doesn't turn on SIMD, just defines the bits.
1999-09-10 15:51:44 +00:00
Peter Wemm
c3aac50f28 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
Mike Smith
1f2d03c05e Add defines for the P6 model-specific registers. 1999-04-07 03:58:15 +00:00
KATO Takenori
4536af6a70 - Implement enabling write allocate on AMD K5/K6/K6-2 cpus.
The code was originaly contributed by Kelly Yancey
  <kbyanc@freedomnet.com> in PR i386/6269 and revised by Akio Morita
  <amorita@meadow.scphys.kyoto-u.ac.jp> and me.  Test was performed by
  Akio Morita and Toshiomi Moriki <moriki@db.is.kyushu-u.ac.jp>.
- Fix stylistic bug in identcpu.c.
- Update copyright in initcpu.c
- Fix typo in LINT.

PR:		6269 and 6270
1998-10-06 13:16:29 +00:00
KATO Takenori
3a94cb7f7d Defined CCR6 and CCR7 (configuration registers of M2 CPU.) 1998-03-04 11:39:16 +00:00
Steve Passe
9a9ad9f746 Enabled the FPU emilaute bit define: CR0_EM
Reviewed by:	Bruce Evans <bde@zeta.org.au>
1997-07-21 17:53:51 +00:00
KATO Takenori
4c024bbdf8 Improved CPU identification and initialization routines. This
supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD)
Nx586 CPU, and initialize special registers of Cyrix CPU and msr of
IBM Blue Lightning CPU.

If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in
write-through mode.  This can be disabled by kernel configuration
options.

Reviewed by:	Bruce Evans <bde@freebsd.org> and
            	Jordan K. Hubbard <jkh@freebsd.org>
1997-03-22 18:54:54 +00:00
Peter Wemm
6875d25465 Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
ready for it yet.
1997-02-22 09:48:43 +00:00
Jordan K. Hubbard
1130b656e5 Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.

Boy, I'm glad we're not using sup anymore.  This update would have been
insane otherwise.
1997-01-14 07:20:47 +00:00
John Dyson
d22671dcce Support the PG_G flag on Pentium-Pro processors. This pretty
much eliminates the unnecessary unmapping of the kernel during
context switches and during invtlb...
1996-11-11 04:20:19 +00:00
Søren Schmidt
70013b5739 Added missing CR0_NW define for Cyrix 486DLC support. It's still not
stable on my hardware, but its better... *sigh*

Obtained from: NetBSD
1996-06-03 19:37:38 +00:00
Mike Pritchard
6c5e9bbdf5 Fix a bunch of spelling errors in the comment fields of
a bunch of system include files.
1996-01-30 23:02:38 +00:00
Rodney W. Grimes
9b2e535452 Remove trailing whitespace. 1995-05-30 08:16:23 +00:00
Bruce Evans
3117fbd98e Enable define of CR0_AM to prepare for implementing alignment checking.
Uniformize idempotency ifdef.
1995-01-14 10:44:55 +00:00
David Greenman
654f13335e Improved some comments. 1994-09-04 23:10:27 +00:00
Paul Traina
c784172318 Detect if we're running on a Cyrix 486DLC and enable automatic cache
negation whenever we access memory between 640k and 1M.

Original code from NetBSD 1.0-BETA.  The exact origins are unclear but
Theo de Raadt, Charles, and Michael V. may have contributed to it.

Submitted by:	pst
1994-09-04 19:59:24 +00:00
Garrett Wollman
6e393973f5 Made all header files idempotent and moved incorrect common data from
headers into a related source file.  Added cons.h as first step towards
moving i386/i386/cons.h to machine/cons.h where it belongs.
1993-11-07 17:43:17 +00:00
Rodney W. Grimes
34a8ed1be1 Removed all patch kit headers, sccsid and rcsid strings, put $Id$ in, some
minor cleanup.  Added $Id$ to files that did not have any version info, etc
1993-10-16 14:40:57 +00:00
Rodney W. Grimes
5b81b6b301 Initial import, 0.1 + pk 0.2.4-B1 1993-06-12 14:58:17 +00:00