pci_if.
This allows bhnd(4) to manage per-device state (such as per-core
pmu/clock refcounting) on behalf of subclass driver instances.
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6959
Maps Sonics/OCP per-core address spaces to bcma(4)-compatible port/region
identifiers.
This permits the use of common address map identifiers in bhnd device
drivers, independent of the underlying interconnect type.
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6850
Changes:
- Fixed incorrect MIPS74k vendor ID in the bhnd core descriptor tables
- Fixed MIPS core driver's matching against MIPS/MIPS33 cores.
- Improved MIPS3302 core description.
- Enabled BUS_PASS_BUS on the bhnd nexus drivers to allow early probing
of the MIPS core.
- Enabled BUS_PASS_CPU on the MIPS core driver to ensure correct attach
order.
- Disabled matching of the MIPS core driver on non-SoC devices.
Reviewed by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6735
Now that bhnd(4) provides feature parity with the previous siba/mips
implementation, we can switch sentry5 over and begin lifting common
support code out for use across bhnd(4) embedded targets.
Changes:
- Fixed enumeration of siba(4) per-core address maps, required for
discovery of memory mapped chipc flash region on siba(4) devices.
- Simplified bhnd kernel configuration (dropped 'bhndbus' option).
- Replaced files.broadcom's direct file references with their
corresponding standard kernel options.
- Lifted out common bcma/siba nexus support, inheriting from the new
generic bhnd_nexus driver.
- Dropped now-unused sentry5 siba code.
- Re-integrated BCM into the universe build now that it actually compiles.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6712
This unifies handling of core, chip, and board-level device
matching, and adds support for matching device drivers
against the bus attach type (e.g. SoC vs WiFi adapter).
Core-level quirks on Broadcom's chipsets generally are specific
to some combination of chip model, core revision, chip
package (e.g. 12x9 SMT package), SROM revision, etc.
Unifying the match APIs for all three attribute types (core, chip,
board/srom) allows defining a single device quirk table that
matches across all of those attributes.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6515
This patchset adds support to bhnd_chipc for sharing SYS_RES_MEMORY
resources with its children, allowing us to hang devices off of
bhnd_chipc that rely on access to a subset of the device register space
that bhnd_chipc itself must also allocate.
We could avoid most of this heavy lifting if RF_SHAREABLE+SYS_RES_MEMORY
wasn't limited to use with allocations at the same size/offset.
As a work-around, I implemented something similar to vga_pci.c, which
implements similar reference counting of of PCI BAR resources for its
children.
With these changes, chipc will use reference counting of SYS_RES_MEMORY
allocation/activation requests, to decide when to allocate/activate/
deactivate/release resources from the parent bhnd(4) bus.
The requesting child device is allocated a new resource from chipc's
rman, pointing to (possibly a subregion of) the refcounted bhnd resources
allocated by chipc.
Other resource types are just passed directly to the parent bhnd bus;
RF_SHAREABLE works just fine with IRQs.
I also lifted the SPROM device code out into a common driver, since this
now allows me to hang simple subclasses off of a common driver off of both
bhndb_pci and bhnd_chipc.
Tested:
* (landonf) Tested against BCM4331 and BCM4312, confirmed that SPROM still
attaches and can be queried.
Submitted by: Landon Fuller <landonf@landonf.org>
Reviewed by: mizkha@gmail.com
Differential Revision: https://reviews.freebsd.org/D6471
This adds a BHND_BUS_GET_ATTACH_TYPE(); the primary use-case is to let
chipc make a coarse-grained determination as to whether UART, SPI, etc
drivers ought to be attached, and on fullmac devices, whether a real
CPU driver ought to be skipped for the ARM core, etc.
Tested:
* BCM4331 (BHND)
* BCM4312 (SIBA)
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6492
Now that we've got access to SPROM and can access board identification,
this implements all known remaining hardware work-arounds for the bhnd(4)
PCI and PCIe-G1 cores operating endpoint mode.
Additionally, this adds an initial set of skeleton PCIe-G2 hostb and pcib
drivers, required by fullmac and newer softmac devices.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6377
Centralizes fetching of board information (vendor, type, revision, etc),
and adds support for matching quirks against board identification info.
* Adds a BHND_BUS_READ_BOARD_INFO(), allowing bhnd bus/bus parent(s) to
handle implementation-specific fetching of board info.
* Integrates board type constants from the latest Broadcom ISC-licensed
bcmdevs.h included in dd-wrt's Broadcom driver source drops.
* Adds support for matching on chip/board quirks to bhnd_device_quirks()/
bhnd_chip_quirks().
* Use the new board/chip quirk matching to match Apple devices that failed
to set BFL2_PCIEWAR_OVR in SROM.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6361
This allows bus children to query for the host bridge device, rather
than having to iterate over all attached devices.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6193
This extracts common code from bhndb_pci, bhnd_pcib, and bhnd_pci_hostb into a
simpler shared bhnd_pci base driver, and should enable SoC-side implementation
of bhnd_pcib root complex support.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D5763
SoCs and various chips (including, famously, their wifi chips.)
This is "just" (all 20,000 lines of it) code to enumerate the various
versions of busses inside these devices, including the PCI bridge and
the direct SIBA bridge found in MIPS chips.
It also includes shared code for some bus operations (suspend, resume, etc);
EEPROM/SROM/etc parsing and other things that are shared between chips.
Eventually this'll replace the code that bwi/bwn uses for the internal
bus, as well as some apparently upcoming mips74k broadcom SoC support
which uses bwn!
Thanks to Landon Fuller <landonf@landonf.org> for all this work!
Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
