dereference the struct sigio pointer without any locking. Change
fgetown() to take a reference to the pointer instead of a copy of the
pointer and call SIGIO_LOCK() before copying the pointer and
dereferencing it.
Reviewed by: rwatson
doesn't give them enough stack to do much before blowing away the pcb.
This adds MI and MD code to allow the allocation of an alternate kstack
who's size can be speficied when calling kthread_create. Passing the
value 0 prevents the alternate kstack from being created. Note that the
ia64 MD code is missing for now, and PowerPC was only partially written
due to the pmap.c being incomplete there.
Though this patch does not modify anything to make use of the alternate
kstack, acpi and usb are good candidates.
Reviewed by: jake, peter, jhb
supported option and it disabled a whole 2 lines of bootverbose messages.
I wanted to see 1 of the messages (about the latency timers). This
is a wrong place to decode pci configurations, but the code is already
here and handles more details than pciconf(8).
A number of functions in this driver still use the unit number in their
printouts because they pass the unit directly as a function argument
instead of passing a softc or struct ifnet pointer. This should be
resolved at a future date.
code path to fix a bug in the non USB_USE_SOFTINTR path that caused
the usb bus to hang and generally misbehave when devices were unplugged.
In the process though it also reduced the throughput of usb devices because
of a less than optimal implementation under FreeBSD.
This commit fixes the non USB_USE_SOFTINTR code in uhci and ohci
so that it works again, and switches back to using this code path.
The uhci code has been tested, but the ohci code hasn't. It's
essentially the same anyway and so I don't envisage any difficulties.
Code for uhci submitted by: Maksim Yevmenkin <myevmenk@exodus.net>
testing any modifications to them, they shouldn't even bother with
disklabels in the first place and they are just plain obsolete old
hardware which should be axed entirely before 5.0-R IMO.
Sponsored by: DARPA & NAI Labs.
The advanced stage of computer assisted hardware design and
verification is aptly illustrated by the fact that this is necessary
because only the first ports in a single-chip, dual-port async
PC-Card product lacks this register.
