Commit Graph

6 Commits

Author SHA1 Message Date
Thomas Moestl
1ab480b27b Add new UltraSPARC-III VIS II instructions. 2002-07-16 17:44:01 +00:00
Jake Burkholder
20409ddf22 Fix IF_SEXT(val, 32). The constants need to have type long to
handle size > 16.
2002-05-13 04:26:38 +00:00
Jake Burkholder
025c284b8d Add a support macro to convert the 5-bit packed register field of
a floating point instruction into a 6-bit register number for
double and quad arguments.
Make use of the new INSFPdq_RN macro where apporpriate; this
is required for correctly handling the "high" fp registers
(>= %f32).
Fix a number of bugs related to the handling of the high registers
which were caused by using __fpu_[gs]etreg() where __fpu_[gs]etreg64()
should be used (the former can only access the low, single-precision,
registers).

Submitted by:	tmm
2002-05-11 21:20:05 +00:00
Thomas Moestl
25aab485b6 Add convenience macros to extract the cc0 and cc1 from format 2 and 3
instructions.
2002-03-11 03:03:35 +00:00
Jake Burkholder
9030565569 Adapt for used by upcoming fp emulation code.
Comment.

Submitted by:	tmm
2001-12-29 08:55:56 +00:00
Thomas Moestl
9b3b51bcab Add code to emulate unimplemented (non-fp) instructions and to fixup
unaligned accesses, and instr.h, which contrains definitions for the
sparc64 instruction set (partly from NetBSD).
Make use of some definitions from instr.h in db_disasm.c.
2001-11-06 20:13:44 +00:00