Commit Graph

19 Commits

Author SHA1 Message Date
Eitan Adler
a8de37b024 This isn't functionally identical. In some cases a hint to disable
unit 0 would in fact disable all units.

This reverts r241856

Approved by: cperciva (implicit)
2012-10-22 13:06:09 +00:00
Eitan Adler
76b7512247 Now that device disabling is generic, remove extraneous code from the
device drivers that used to provide this feature.

Reviewed by:	des
Approved by:	cperciva
MFC after:	1 week
2012-10-22 03:41:14 +00:00
Attilio Rao
c839b5bbf7 #PROCHOT assertion is sticky after reading the MSR (accordingly with
Intel manuals) it must be cleared by writing a 0.
Fix that.

Sponsored by:	Sandvine Incorporated
Reported by:	rstone
Reviewed by:	delphij, emaste, rstone
Approved by:	re (kib)
MFC after:	1 week
2011-09-19 10:58:30 +00:00
Xin LI
d1f97f76a5 Expose more variables from coretemp(4) via sysctl:
- tjmax - Tj(max) value from the CPU
 - delta - current delta reading
 - resolution - sensor resolution in Celsius
 - throttle_log - whether a #PROCHOT was asserted since last reset

Submitted by:	Mark Johnston <markjdb gmail.com> (mostly)
MFC after:	1 month
Approved by:	re (kib)
2011-09-02 17:06:23 +00:00
Attilio Rao
72dc07eb44 Bump the maximum coretemp limit (for CPU temperature) to 110. Several
cores with temp in the range 101-105 have been found in the past.

Sponsored by:	Sandvine Incorporated
Reviewed by:	delphij, emaste
Approved by:	re (kib)
MFC after:	3 days
2011-08-19 13:31:48 +00:00
Xin LI
8901793222 Detect and set Atom's Tj(max) to 90 if it's not the 45nm D400/D500/N400
series.

MFC after:	2 weeks
2011-05-05 19:15:15 +00:00
Xin LI
ba95b1e10e Correct a typo. According to Intel document 318914, the Tj(max) for Core 2
Duo Mobile CPUs should be 105.

Noticed by:	Mark Johnston <markjdb gmail.com>
MFC after:	3 days
2011-05-02 18:41:54 +00:00
Xin LI
28a54cacee Catch known CPUs before using IA32_TEMPERATURE_TARGET.
This way we would have an opportunity to hide the
Tj(target) value doesn't seem right stuff if we know
it's not working there.

Add temperature value for Core2 Duo Extreme Mobile that
I have access to.
2010-08-04 00:25:13 +00:00
Xin LI
a3bc0a4e5c Improve cputemp(4) driver wrt newer Intel processors, especially
Xeon 5500/5600 series:

 - Utilize IA32_TEMPERATURE_TARGET, a.k.a. Tj(target) in place
   of Tj(max) when a sane value is available, as documented
   in Intel whitepaper "CPU Monitoring With DTS/PECI"; (By sane
   value we mean 70C - 100C for now);
 - Print the probe results when booting verbose;
 - Replace cpu_mask with cpu_stepping;
 - Use CPUID_* macros instead of rolling our own.

Approved by:	rpaulo
MFC after:	1 month
2010-07-29 19:08:22 +00:00
Norikatsu Shigemura
3705c38487 Change 'dev.cpu.N.temperature', sysctl I (degC) to IK (Kelvin).
Approved by:	re (rwatson)
Reviewed by:	rpaulo
Suggested by:	ume
MFC After:	3 days
2009-09-06 12:01:29 +00:00
Jung-uk Kim
5113aa0af3 Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
Reviewed by:	jhb, peter (early amd64 version)
2008-11-26 19:25:13 +00:00
Rui Paulo
c4cbf0b605 style(9): remove FreeBSD CVS ID from the initial license comment.
MFC after:	1 day
2008-05-14 10:02:25 +00:00
Rui Paulo
3684e5b004 Change the check for cpu_high to actually match CPUID 0x06.
Submitted by:	Arthur Hartwig <arthur.hartwig at nokia.com>
PR:		122878
MFC after:	3 days
2008-05-11 23:17:57 +00:00
Rui Paulo
18d6902161 Don't attach to non Core CPUs. This is needed because on the PIII,
querying the number of sensors returns > 0.

PR:		120541
Approved by:	njl (mentor)
2008-02-14 14:14:59 +00:00
Rui Paulo
ab0b125777 Disable the check for errata AE18. On MacBooks (1,1 version) there's
no problem with coretemp and C3 state.

Approved by:	njl (mentor)
2008-01-10 16:09:22 +00:00
Alexander Leidinger
9f05d312b3 Backout sensors framework.
Requested by:	phk
Discussed on:	cvs-all
2007-10-15 20:00:24 +00:00
Alexander Leidinger
5c6b7871e9 Convert coretemp(4) to the hardware sensors framework and
make sure to never call sched_bind() for uninitialised CPUs.

Submitted by:	Constantine A. Murenin <cnst@FreeBSD.org>
Sponsored by:	Google Summer of Code 2007 (GSoC2007/cnst-sensors)
Mentored by:	syrinx
Tested by:	many
OKed by:	kensmith
2007-10-14 10:59:44 +00:00
Dag-Erling Smørgrav
5afb221c66 Style nits + more reliable Tj(max) detection + improved reporting of
critical temperature + sched_unbind() after rdmsr + initialize sc_dev.

Submitted by:	Rui Paulo <rpaulo@fnop.net>, cnst
Approved by:	re (kensmith)
2007-08-23 10:53:03 +00:00
Dag-Erling Smørgrav
83d18f2283 Add a driver for the on-die digital thermal sensor found on Intel Core
and newer CPUs (including Core 2 and Core / Core 2 based Xeons).  The
driver attaches to each cpu device and creates a sysctl node in that
device's sysctl context (dev.cpu.N.temperature).  When invoked, the
handler binds to the appropriate CPU to ensure a correct reading.

Submitted by:	Rui Paulo <rpaulo@fnop.net>
Sponsored by:	Google Summer of Code 2007
Tested by:	des, marcus, Constantine A. Murenin, Ian FREISLICH
Approved by:	re (kensmith)
MFC after:	3 weeks
2007-08-15 19:26:03 +00:00