Commit Graph

17 Commits

Author SHA1 Message Date
Luiz Otavio O Souza
d47e148e0b Change the TI aintc driver name to "ti_aintc" to avoid the conflict with
the aintc driver for Allwinner A10.

This fixes the boot of the GENERIC ARM kernel on TI/AM335x SoCs.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2016-11-15 19:09:36 +00:00
Andrew Turner
df7675353e Stop including fdt_common.h from the arm code when it's unneeded.
Sponsored by:	ABT Systems Ltd
2016-11-14 11:41:22 +00:00
Andrew Turner
feabce61dc Start to remove the old pre-INTRNG code from the arm platforms. These have
all moved to use INTRNG.

Reviewed by:	manu, mmel
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D8469
2016-11-08 12:15:57 +00:00
Andrew Turner
9346e9130d Return the struct intr_pic pointer from intr_pic_register. This will be
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-18 15:05:44 +00:00
Svatopluk Kraus
cd642c88a1 INTRNG - redefine struct intr_map_data to avoid headers pollution. Each
struct associated with some type defined in enum intr_map_data_type
must have struct intr_map_data on the top of its own definition now.
When such structs are used, correct type and size must be filled in.

There are three such structs defined in sys/intr.h now. Their
definitions should be moved to corresponding headers by follow-up
commits.

While this change was propagated to all INTRNG like PICs,
pic_map_intr() method implementations were corrected on some places.
For this specific method, it's ensured by a caller that the 'data'
argument passed to this method is never NULL. Also, the return error
values were standardized there.
2016-05-05 13:31:19 +00:00
Andrew Turner
59c3cb81c1 Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine
independent code that needs to know about INTRNG such as PCI drivers.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 16:05:41 +00:00
Svatopluk Kraus
3d6bafd11a Fix typo. No functional change. 2016-04-05 13:56:43 +00:00
Svatopluk Kraus
86816217ff Rework am33xx interrupt controller for INTRNG and enable it
on BEAGLEBONE by default.

Reviewed by:	gonzo
Differential Revision:	https://reviews.freebsd.org/D5805
2016-04-04 09:23:21 +00:00
Warner Losh
31c9adb789 Create a simplebus PNP info wrapper.
Differential Review: https://reviews.freebsd.org/D4517
2015-12-18 05:29:22 +00:00
Ruslan Bukin
31239b7219 Attach interrupt controller device before other devices.
Sponsored by:	University of Cambridge
2015-10-05 13:15:21 +00:00
Oleksandr Tymoshenko
5b03aba6c8 Switch TI platform support code from using FreeBSD's custom-baked DTS
files to vendor-provided ones. It should make easier to adopt platform
code to new revisions of hardware and to use DTS overlays for various
Beaglebone extensions (shields/capes).

Original dts filenames were not changed, they're now wrappers over dts
files provided by TI. So make sure you update .dtb files on your
devices as part of kernel update

GPIO addressing was changed: instead of one global /dev/gpioc0 there
are per-bank instances of /dev/gpiocX. Each bank has 32 pins so for
instance pin 121 on /dev/gpioc0 in old addressing scheme is now pin 25
on /dev/gpioc3

On Pandaboard serial console devices was changed from /dev/ttyu0 to
/dev/ttyu2 so you'll have to update /etc/ttys to get login prompt
on serial port in multiuser mode. Single user mode serial console
should work as-is

Differential Revision:	https://reviews.freebsd.org/D2146
Reviewed by:	rpaulo, ian, Michal Meloun, Svatopluk Kraus
2015-05-22 03:16:18 +00:00
Ian Lepore
d3df8026cf Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in
both the post-filter and post-thread callbacks.

Also eliminate a completely unecessary write to INTC_ISR_CLEAR register,
which clears a software-generated interrupt that can only happen with a
write to INTC_ISR_SET (which nothing does).
2015-03-08 03:34:06 +00:00
Andrew Turner
3d6451aef8 Reduce the diff in the Ti aintc between head and arm_intrng 2014-12-21 16:48:57 +00:00
Ian Lepore
11d47032ee Eliminate one of the causes of spurious interrupts on armv6. The arm weak
memory ordering model allows writes to different devices to complete out
of order, leading to a situation where the write that clears an interrupt
source at a device can complete after a write that unmasks and EOIs the
interrupt at the interrupt controller, leading to a spurious re-interrupt.

This adds a generic barrier function specific to the needs of interrupt
controllers, and calls that function from the GIC and TI AINTC controllers.
There may still be other soc-specific controllers that need to make the call.

Reviewed by:	cognet, Svatopluk Kraus <onwahe@gmail.com>
MFC after:	3 days
2014-05-24 16:21:16 +00:00
Ian Lepore
add35ed5b8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
Oleksandr Tymoshenko
08dab5832b Properly clean "spurious interrupt" state
Suggested by: Ian Lepore
2013-04-06 03:31:28 +00:00
Oleksandr Tymoshenko
e53470fee3 Merging of projects/armv6, part 10
- Support for Texas Instruments SoCs:
	- AM335x
	- OMAP4

- Kernel configs, DTS for Beaglebone and Pandaboard

Submitted by:	Ben Gray, Damjan Marion
2012-08-15 06:31:32 +00:00