Commit Graph

243 Commits

Author SHA1 Message Date
Pyun YongHyeon
54899a96e1 Add support for RTL8105E PCIe Fast Ethernet controller. It seems
the controller has a kind of embedded controller/memory and vendor
applies a large set of magic code via undocumented PHY registers in
device initialization stage. I guess it's a firmware image for the
embedded controller in RTL8105E since the code is too big compared
to other DSP fixups. However I have no idea what that magic code
does and what's purpose of the embedded controller. Fortunately
driver seems to still work without loading the firmware.

While I'm here change device description of RTL810xE controller.

H/W donated by:	Realtek Semiconductor Corp.
2011-01-26 21:14:20 +00:00
Pyun YongHyeon
502be0f749 Do not use interrupt taskqueue on controllers with MSI/MSI-X
capability. One of reason using interrupt taskqueue in re(4) was
to reduce number of TX/RX interrupts under load because re(4)
controllers have no good TX/RX interrupt moderation mechanism.
Basic TX interrupt moderation is done by hardware for most
controllers but RX interrupt moderation through undocumented
register showed poor RX performance so it was disabled in r215025.
Using taskqueue to handle RX interrupt greatly reduced number of
interrupts but re(4) consumed all available CPU cycles to run the
taskqueue under high TX/RX network load.  This can happen even with
RTL810x fast ethernet controller and I believe this is not
acceptable for most systems.

To mitigate the issue, use one-shot timer register to moderate RX
interrupts. The timer register provides programmable one-shot timer
and can be used to suppress interrupt generation. The timer runs at
125MHZ on PCIe controllers so the minimum time allowed for the
timer is 8ns. Data sheet says the register is 32 bits but
experimentation shows only lower 13 bits are valid so maximum time
that can be programmed is 65.528us. This yields theoretical maximum
number of RX interrupts that could be generated per second is about
15260. Combined with TX completion interrupts re(4) shall generate
less than 20k interrupts. This number is still slightly high
compared to other intelligent ethernet controllers but system is
very responsive even under high network load.

Introduce sysctl variable dev.re.%d.int_rx_mod that controls amount
of time to delay RX interrupt processing in units of us. Value 0
completely disables RX interrupt moderation. To provide old
behavior for controllers that have MSI/MSI-X capability, introduce
a new tunable hw.re.intr_filter. If the tunable is set to non-zero
value, driver will use interrupt taskqueue. The default value of
the tunable is 0. This tunable has no effect on controllers that
has no MSI/MSI-X capability or if MSI/MSI-X is explicitly disabled
by administrator.

While I'm here cleanup interrupt setup/teardown since re(4) uses
single MSI/MSI-X message at this moment.
2011-01-26 20:25:40 +00:00
Pyun YongHyeon
d180a66f19 Remove TX taskqueue and directly invoke re_start in interrupt task. 2011-01-25 23:27:28 +00:00
Pyun YongHyeon
4a58fd452a Prefer MSI-X to MSI on controllers that support MSI-X. All
recent PCIe controllers(RTL8102E or later and RTL8168/8111C or
later) supports either 2 or 4 MSI-X messages. Unfortunately vendor
did not publicly release RSS related information yet. However
switching to MSI-X is one-step forward to support RSS.
2011-01-25 22:18:00 +00:00
Pyun YongHyeon
f9ad4da76d Disable TSO for all Realtek controllers. Experimentation showed
RTL8111C generated corrupted frames where TCP option header was
broken. All other sample controllers I have did not show such
problem so it could be RTL8111C specific issue. Because there are
too many variants it's hard to tell how many controllers have such
issue. Just disable TSO by default but have user override it.
2011-01-25 19:05:46 +00:00
Pyun YongHyeon
7be4de2de7 Apply TX interrupt moderation to all RTL810xE PCIe Fast Ethernet
controllers. Experimentation with RTL8102E, RTL8103E and RTL8105E
showed dramatic decrement of TX completion interrupts under high TX
load(e.g.  from 147k interrupts/second to 10k interrupts/second)
With this change, TX interrupt moderation is applied to all
controllers except RTL8139C+.
2011-01-24 00:01:06 +00:00
Pyun YongHyeon
ef278cb4ae Change model names of controller RTL_HWREV_8168_SPIN[123] to real ones.
s/RL_HWREV_8168_SPIN1/RL_HWREV_8168B_SPIN1/g
s/RL_HWREV_8168_SPIN2/RL_HWREV_8168B_SPIN2/g
s/RL_HWREV_8168_SPIN3/RL_HWREV_8168B_SPIN3/g
No functional changes.
2011-01-18 00:46:10 +00:00
Pyun YongHyeon
81eee0ebf8 Implement initial jumbo frame support for RTL8168/8111 C/D/E PCIe
GbE controllers. It seems these controllers no longer support
multi-fragmented RX buffers such that driver have to allocate
physically contiguous buffers.

 o Retire RL_FLAG_NOJUMBO flag and introduce RL_FLAG_JUMBOV2 to
   mark controllers that use new jumbo frame scheme.
 o Configure PCIe max read request size to 4096 for standard frames
   and reduce it to 512 for jumbo frames.
 o TSO/checksum offloading is not supported for jumbo frames on
   these controllers. Reflect it to ioctl handler and driver
   initialization.
 o Remove unused rl_stats_no_timeout in softc.
 o Embed a pointer to structure rl_hwrev into softc to keep track
   of controller MTU limitation and remove rl_hwrev in softc since
   that information is available through a pointer to structure
   rl_hwrev.

Special thanks to Realtek for donating sample hardwares which made
this possible.

H/W donated by:	Realtek Semiconductor Corp.
2011-01-17 03:24:33 +00:00
Pyun YongHyeon
f0431c5bb0 Add initial support for RTL8168E/8111E-VL PCIe GbE.
H/W donated by:	Realtek Semiconductor Corp.
2011-01-17 02:23:50 +00:00
Pyun YongHyeon
4a814a5edb If driver is not able to allocate RX buffer, do not start driver.
While I'm here move RX buffer allocation and descriptor
initialization up to not touch hardware registers in case of RX
buffer allocation failure.
2011-01-13 23:15:09 +00:00
Pyun YongHyeon
9e18005d99 Make sure to check validity of dma maps before destroying. 2011-01-13 23:00:28 +00:00
Pyun YongHyeon
9325262669 re_reset() should be called only after setting device specific
features.
2011-01-13 22:52:57 +00:00
Pyun YongHyeon
d3b181ae81 Allow TX/RX checksum offloading to be configured independently. 2011-01-13 22:49:10 +00:00
Pyun YongHyeon
89feeee459 For re(4) controllers that uses new jumbo frame scheme(RTL8168C/D/E),
limit maximum RX buffer size to RE_RX_DESC_BUFLEN instead of
blindly configuring it to 16KB. Due to lack of documentation, re(4)
didn't allow jumbo frame on these controllers. However it seems
controller is confused with jumbo frame such that it can DMA the
received frame to wrong address instead of splitting it into
multiple RX buffers. Of course, this caused panic.

Since re(4) does not support jumbo frames on these controllers,
make controller drop frame that is longer than RE_RX_DESC_BUFLEN
sized frame. Fortunately RTL810x controllers, which do not support
jumbo frame, have no such issues but this change also limited
maximum RX buffer size allowed to RTL810x controllers. Allowing
16KB RX buffer for controllers that have no such capability is
meaningless.

MFC after:	3 days
2011-01-12 03:43:47 +00:00
Pyun YongHyeon
16a4824bf9 When driver is not running, do not send DUMP command to controller
and just show old (cached) values. Controller will not respond to
the command unless MAC is enabled so DUMP request for down
interface caused request timeout.
2011-01-10 23:47:11 +00:00
Pyun YongHyeon
d6d7d923ad Implement TSO on RealTek RTL8168/8111 C or later controllers.
RealTek changed TX descriptor format for later controllers so these
controllers require MSS configuration in different location of TX
descriptor. TSO is enabled by default for controllers that use new
descriptor format.
For old controllers, TSO is still disabled by default due to broken
frames under certain conditions but users can enable it.
Special thanks to Hayes Wang at RealTek.

MFC after:	2 weeks
2011-01-10 23:28:46 +00:00
Pyun YongHyeon
64436f6e91 Add flow control for all re(4) controllers. re(4) controllers do
not provide any MAC configuration interface for resolved flow
control parameters. There is even no register that configures water
mark which will control generation of pause frames.
However enabling flow control surely enhanced performance a lot.
2010-11-15 00:06:19 +00:00
Pyun YongHyeon
5e6906ee36 Only moderate TX completion interrupts. Relying on taskqueue to
suppress RX interrupts seems to give better RX performance than
RX interrupt moderation.
2010-11-09 01:52:09 +00:00
Pyun YongHyeon
483cc44070 Follow the lead of vendor's interrupt moderation mechanism.
It seems RTL8169/RTL8168/RTL810xE has a kind of interrupt
moderation mechanism but it is not documented at all. The magic
value dramatically reduced number of interrupts without noticeable
performance drops so apply it to all RTL8169/RTL8169 controllers.
Vendor's FreeBSD driver also applies it to RTL810xE controllers but
their Linux driver explicitly cleared the register, so do not
enable interrupt moderation for RTL810xE controllers.

While I'm here sort 8169 specific registers.

Obtained from:	RealTek FreeBSD driver
2010-11-08 21:50:50 +00:00
Pyun YongHyeon
2bc085c69c Reduce spin wait time consumed in GMII register access routine.
There were a couple of attempts in the past to reduce it since it
took more than 1ms. Because mii_tick() periodically polls link
status, waiting more than 1ms for each GMII register access was
overkill. Unfortunately all previous attempts were failed with
various ways on different controllers.
This time, add additional 20us dealy at the end of GMII register
access which seems to requirement of all RealTek controllers to
issue next GMII register access request. This is the same way what
Linux does.
2010-11-08 19:15:31 +00:00
Pyun YongHyeon
0534aae0ce Add simple MAC statistics counter reading support. Unfortunately
useful counters like rl_missed_pkts is 16 bits quantity which is
too small to hold meaningful information happened in a second. This
means driver should frequently read these counters in order not to
lose accuracy and that approach is too inefficient in driver's
view. Moreover it seems there is no way to trigger an interrupt to
detect counter near-full or wraparound event as well as lacking
clearing the MAC counters. Another limitation of reading the
counters from RealTek controllers is lack of interrupt firing at
the end of DMA cycle of MAC counter read request such that driver
have to poll the end of the DMA which is a time consuming process
as well as inefficient. The more severe issue of the MAC counter
read request is it takes too long to complete the DMA. All these
limitation made maintaining MAC counters in driver impractical. For
now, just provide simple sysctl interface to trigger reading the
MAC counters. These counters could be used to track down driver
issues. Users can read MAC counters maintained in controller with
the following command.
#sysctl dev.re.0.stats=1

While I'm here add check for validity of dma map and allocated
memory before unloading/freeing them.

Tested by:	rmacklem
2010-11-05 19:28:00 +00:00
Pyun YongHyeon
63472df74a style(9). 2010-11-05 18:24:50 +00:00
Pyun YongHyeon
4baa031067 Remove extra white spaces. 2010-11-05 18:23:43 +00:00
Pyun YongHyeon
66366ca4bf Enable 64bit DMA addressing for RTL810xE/RTL8168/RTL8111 PCIe
controllers. Some old PCI controllers may work with DAC but it was
known to be buggy so 64bit DMA addressing is used only on PCIe
controllers.
2010-11-05 18:19:54 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Pyun YongHyeon
485d41c0a7 Don't change PCIe maximum read request size to 2048 on RTL810x
controllers. It caused device timeouts.

Reported by:	McLone < mclone <> gmail dot com >
Tested by:	McLone < mclone <> gmail dot com >
MFC after:	5 days
2010-05-07 23:05:27 +00:00
Pyun YongHyeon
d0c4515667 Add preliminary support for 8168E/8111E PCIe controller.
While I'm here simplify device description string.

Tested by:	Michael Beckmann < michael <> apfel dot de >
MFC after:	5 days
2010-04-09 22:50:28 +00:00
Pyun YongHyeon
ecafbbb5b9 Add TSO on VLANs. Because re(4) has a TSO limitation for jumbo
frame, make sure to update VLAN capabilities whenever jumbo frame
is configured.
While I'm here rearrange interface capabilities configuration. The
controller requires VLAN hardware tagging to make TSO work on VLANs
so explicitly check this requirement.
2010-02-22 18:51:14 +00:00
Pyun YongHyeon
02d77e455f Increase PCIe maximuim read request size to 2048. Because re(4) uses
Tx DMA burst size 2048, I beleive PCIe maximum read request size
also should match to the value of Tx DMA burst size. With this
change I can get more than 800Mbps for TCP bulk transfers.
Previously I was not able to get more than 700Mbps. If I enable TSO
it now shows 927Mbps.
2010-02-21 00:00:55 +00:00
Pyun YongHyeon
8281a098c6 Add initial support for RTL8103E PCIe fastethernet.
PR:	kern/142974
2010-01-27 17:49:27 +00:00
Pyun YongHyeon
01d1a6c355 Move interface reinitialization down after disabling WOL in resume
path.
2009-11-19 23:14:40 +00:00
Pyun YongHyeon
8476c243bb Minimize interface reinitialization by checking IFF_DRV_RUNNING
flag. This fixes unnecessary interface UP/DOWNs during getting an
IP address via DHCP.

Tested by:	Warren Block ( wblock<> wonkity dot com )
2009-11-19 23:12:44 +00:00
Pyun YongHyeon
5b6d1d9d08 Add a check to know whether driver is still running after
reacquiring driver lock in Rx handler. re(4) drops a driver lock
before passing received frame to upper stack and reacquire the
lock. During the time window ioctl calls could be executed and if
the ioctl was interface down request, driver will stop the
controller and free allocated mbufs. After that when driver comes
back to Rx handler again it does not know what was happend so it
could access free mbufs which in turn cause panic.

Reported by:	 Norbert Papke < npapk <> acm dot org >
Tested by:	 Norbert Papke < npapk <> acm dot org >
2009-11-02 18:35:05 +00:00
Pyun YongHyeon
5fa06abe89 Add RTL8168DP/RTL8111DP device id. While I'm here append "8111D" to
the description of RTL8168D as RL_HWREV_8168D can be either
RTL8168D or RTL8111D.

PR:	kern/137672
MFC after:	3 days
2009-08-24 18:58:13 +00:00
Tai-hwa Liang
3d22427cff Adding hardware ID for RTL810x PCIe found on HP Pavilion DV2-1022AX.
Reviewed by:	yongari
Approved by:	re (kib, kensmith)
2009-07-14 04:35:13 +00:00
Robert Watson
eb956cd041 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
Attilio Rao
1abcdbd127 When user_frac in the polling subsystem is low it is going to busy the
CPU for too long period than necessary.  Additively, interfaces are kept
polled (in the tick) even if no more packets are available.
In order to avoid such situations a new generic mechanism can be
implemented in proactive way, keeping track of the time spent on any
packet and fragmenting the time for any tick, stopping the processing
as soon as possible.

In order to implement such mechanism, the polling handler needs to
change, returning the number of packets processed.
While the intended logic is not part of this patch, the polling KPI is
broken by this commit, adding an int return value and the new flag
IFCAP_POLLING_NOCOUNT (which will signal that the return value is
meaningless for the installed handler and checking should be skipped).

Bump __FreeBSD_version in order to signal such situation.

Reviewed by:	emaste
Sponsored by:	Sandvine Incorporated
2009-05-30 15:14:44 +00:00
Pyun YongHyeon
f2e491c9c5 For RTL8139C+ controllers, have controller handle padding short
checksum offload frames. Software workaround used for broken
controllers(RTL8169, RTL8168, RTL8168B) seem to cause watchdog
timeouts on RTL8139C+.
Introduce a new flag RL_FLAG_AUTOPAD to mark automatic padding
feature of controller and set it for RTL8139C+ and controllers that
use new descriptor format. This fixes watchdog timeouts seen on
RTL8139C+.

Reported by:	Dimitri Rodis < DimitriR <> integritasystems dot com >
Tested by:	Dimitri Rodis < DimitriR <> integritasystems dot com >
2009-04-20 07:13:04 +00:00
Pyun YongHyeon
bd9bede57a Partial revert r185756.
It seems that RTL8168D and RTL8102EL requires additional settle
time to complete RL_PHYAR register write. Accessing RL_PHYAR
register right after the write causes errors for subsequent PHY
register accesses.

Tested by:	george at luckytele dot com,
		Steve Wills < STEVE at stevenwills dot com >
2009-03-31 03:29:05 +00:00
Warner Losh
aa11a83ce3 remove now-redunant cardbus attachment lines. 2009-03-09 13:25:34 +00:00
Pyun YongHyeon
2c21710b27 Add a new tunable hw.re.prefer_iomap which disables memory register
mapping. The tunable is OFF for all controllers except RTL8169SC
family. RTL8169SC seems to require more magic to use memory
register mapping. r187483 added a fix for RTL8169SCe controller but
it does not looke like fix other variants of RTL8169SC.

Tested by:	Gavin Stone-Tolcher g.stone-tolcher <> its dot uq dot edu dot au
2009-03-09 06:02:55 +00:00
Pyun YongHyeon
f1bb696a81 Allocating 2 MSI messages do not seem to work on certain controllers
so use just 1 MSI message. This fixes regression introduced in
r188381.

Tested by:	many
2009-02-11 00:23:56 +00:00
Pyun YongHyeon
c2d2e19cb7 Reclaim transmitted frames in re_tick(). This is for PCIe
controllers that lose Tx completion interrupts under certain
conditions. With this change it's safe to use MSI on PCIe
controllers so enable MSI on these controllers.
2009-02-09 04:59:13 +00:00
Jung-uk Kim
566ca8ca5d - Add support for 8110SCe part. Some magic registers were taken from
Linux driver.
- Swap hardware revisions for 8110S and 8169S as Linux driver claims.

Reviewed by:	yongari (early version)
2009-01-20 20:22:28 +00:00
Jung-uk Kim
aaab4fbea7 Retire RL_FLAG_INVMAR bit to match its comment and reality. 2009-01-20 20:04:09 +00:00
Jung-uk Kim
ff19136537 - Do not read and write RX configuration register multiple times.
- Always program RX configuration register from scratch instead of
doing read/modify/write.
- Rename re_setmulti() to re_set_rxmode() to be reflect reality.
- Simplify hash filter logic a little while I am here.

Reviewed by:	yongari (early version)
2009-01-20 19:58:01 +00:00
Pyun YongHyeon
96b774f489 Sometimes RTL8168B seems to take long time to access GMII registers
in device attach phase. Double GMII register access timeout value
to fix the issue.

Reported by:	wkoszek
Tested by:	wkoszek
2009-01-19 02:31:27 +00:00
Pyun YongHyeon
0fe200d953 Since we don't request reset for rlphy(4), the link state 'UP'
event from mii(4) may not be delivered if valid link was already
established. To address the issue, check current link state after
driving MII_TICK. This should fix a regression introduced in
r185753 on fast ethernet controllers.

Reported by:	csjp, Bruce Cran < bruce <> cran DOT org DOT uk >
Tested by:	csjp, Bruce Cran (initial version)
2008-12-22 00:46:22 +00:00
Pyun YongHyeon
818951afd8 It seems that RealTek PCIe controllers require an explicit Tx poll
command whenever Tx completion interrupt is raised. The Tx poll
bit is cleared when all packets waiting to be transferred have been
processed. This means the second Tx poll command can be silently
ignored as the Tx poll bit could be still active while processing
of previous Tx poll command is in progress.
To address the issue re(4) used to invoke the Tx poll command in Tx
completion handler whenever it detects there are pending packets in
TxQ. However that still does not seem to completely eliminate
watchdog timeouts seen on RealTek PCIe controllers. To fix the
issue kick Tx poll command only after Tx completion interrupt is
raised as this would indicate Tx is now idle state such that it can
accept new Tx poll command again. While here apply this workaround
for PCIe based controllers as other controllers does not seem to
have this limitation.

Tested by:	Victor Balada Diaz < victor <> bsdes DOT net >
2008-12-17 08:18:11 +00:00
Pyun YongHyeon
61f45a7222 For RTL8168C SPIN2 controllers, make sure to take the controller
out of sleep mode prior to accessing to PHY. This should fix device
attach failure seen on these controllers. Also enable the sleep
mode when device is put into sleep state.

PR:	kern/123123, kern/123053
2008-12-17 06:01:03 +00:00
Pyun YongHyeon
886ff602f2 Make WOL work on RTL8168B. This controller seems to require
explicit command to enable Rx MAC prior to entering D3.

Tested by:	Cyrus Rahman <crahman <> gmail DOT com>
2008-12-11 02:24:11 +00:00
Pyun YongHyeon
0596d7e65d Don't access undocumented register 0x82 on controllers that
have no such register. While here clear undocumented PHY
register 0x0B for RTL8110S.

Obtained from:	RealTek FreeBSD driver
2008-12-11 01:41:38 +00:00
Pyun YongHyeon
ead8fc669e Newer RealTek controllers requires setting stop request bit to
terminate active Tx/Rx operation.
2008-12-11 01:26:18 +00:00
Pyun YongHyeon
b659f1f0fe Always put controller into known state before device intialization.
While here remove re_reset calls invoked in system error case as
controller reset is always done in device initialization.
2008-12-11 00:46:07 +00:00
Pyun YongHyeon
f68bc089f9 Partly revert r185756. RTL8169SC doesn't like reduced delays in
GMII access while Tx/Rx is in progress.

Reported by:	Jaakko Heinonen <jh <> saunalahti DOT fi>,
		Anton Yuzhaninov <citrin <> citrin DOT ru>
Tested by:	Jaakko Heinonen <jh <> saunalahti DOT fi>
2008-12-11 00:30:26 +00:00
Pyun YongHyeon
b45fb24843 Reduce spin wait time consumed in GMII register access routines.
Waiting for 1ms for each GMII register access looks overkill and it
may also decrease overall performance of driver because re(4)
invokes mii_tick for every hz.

Tested by:	rpaulo
2008-12-08 02:48:41 +00:00
Pyun YongHyeon
130b6dfb35 o Implemented miibus_statchg handler. It detects whether re(4)
established a valid link or not. In miibus_statchg handler add a
  check for established link is valid one for the controller(e.g.
  1000baseT is not a valid link for fastethernet controllers.)
o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers.
o Added additional check to know whether we've really encountered
  watchdog timeouts or missed Tx completion interrupts. This change
  may help to track down the cause of watchdog timeouts.
o In interrupt handler, removed a check for link state change
  interrupt. Not all controllers have the bit and re(4) did not
  rely on the event for a long time. In addition, re(4) didn't
  request the interrupt in RL_IMR register.

Tested by:	rpaulo
2008-12-08 02:34:13 +00:00
Pyun YongHyeon
6f0f9b12fa Make sure to return the result of meida change request.
Previously it used to return success regardless of the result.
2008-12-08 01:44:18 +00:00
Pyun YongHyeon
59ef640d9e Add 8168D support.
Submitted by:	Andrew < andrewwtulloch <> gmail DOT com >
2008-12-02 03:39:34 +00:00
Pyun YongHyeon
97cf11ec18 Read ethernet address from ID registers for RTL8102E/RTL8102EL as
reading from EEPROM doesn't seem to work on these controllers.

Reported by:	Milan Obuch ( freebsd-net at dino dot sk )
Tested by:	Milan Obuch ( freebsd-net at dino dot sk )
2008-09-06 00:25:16 +00:00
Pyun YongHyeon
bddff93469 Fix VLAN hardware tag insertion/stripping on big-endian
architectures.

Reported by:	naddy
Tested on:	sparc64
MFC after:	1 week
2008-08-13 03:40:08 +00:00
Pyun YongHyeon
3d85c23dc6 Rearrange conditional compilation directives. This makes syntax
highlighting work in vim.
2008-08-04 04:00:10 +00:00
Pyun YongHyeon
3199b0c42c Remove return keyword at the end of functions that return void. 2008-08-04 03:51:20 +00:00
Pyun YongHyeon
0ce0868acd Remove register keyword. 2008-08-04 03:47:29 +00:00
Pyun YongHyeon
7b5ffebfe2 Use ANSI C declarations for all functions. 2008-08-04 03:45:07 +00:00
Pyun YongHyeon
a2a8420cfd Don't enable TSO by default. Users of RTL8169/8110 reported
watchdog timeout issues and the root cause seems to stem from
silicon bug of controller. Personally I couldn't reproduce it on
RTL8169 controller but it seems it's dependent on usage pattern.
For newer PCIe based controllers I have no TSO complaints but
turning off TSO would be more safe. Users who are sure that
their controller works with TSO can still reenable the TSO with
ifconfig(8).

Reported by:	Oliver Lehmann (lehmann at ans-netz dot de), Eugene Butusov (ebutusov at gmail dot com)
2008-08-04 02:34:40 +00:00
Pyun YongHyeon
ae64408754 The number of bits reserved for MSS in RealTek controllers is
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
2008-08-04 02:05:09 +00:00
Pyun YongHyeon
b1d62f0fd7 Add driver support for RTL8102E and RTL8102EL which is the second
generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx
descriptor format is different from that of first generation of
RTL8101E series. Jumbo frame is not supported for RTL810x
family.

Tested by:	NAGATA Shinya ( maya AT negeta DOT com )
2008-07-09 01:58:18 +00:00
Pyun YongHyeon
47fac8e527 Disable jumbo frame support for RTL810x fast ethernet controllers. 2008-07-09 01:44:06 +00:00
Pyun YongHyeon
715922d73f Add a new RTL8169 variant, 8169SB(L)/8110SB(L).
Reported by:	nork
Tested by:	nork
2008-07-02 08:00:14 +00:00
Pyun YongHyeon
deb5c680bb Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.
ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is
not yet supported. Because these newer controllers use different
descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to
handle that case in Tx/Rx handler. Also newer controllers seems to
require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register
so don't blindly try to set that bits.

Note, it seems that there is still power-saving related issue where
driver fails to attach PHY. Rebooting seems to fix that issue but
number of required reboots varys.

Many thanks to users that helped during developement. I really
appreciate their patient and test/feedbacks.
2008-07-02 07:54:53 +00:00
Pyun YongHyeon
a810fc83f5 Display detected chip revision in device attach. This will help to
diagnose revision specific issues in future. Also add 0x to notify
that the revision number is in hex form.
2008-07-02 06:55:03 +00:00
Pyun YongHyeon
4d2bf23925 If MSI is not active make sure to disable MSI in EEPROM. 2008-07-02 06:45:59 +00:00
Pyun YongHyeon
81cf2eb6db In device detach don't access ifnet structure unless device is
attached. This fixes NULL pointer dereference when polling(9) is
active and unsupported hardware is detected in device attach.
2008-07-02 06:41:46 +00:00
Pyun YongHyeon
3021aef8c9 Toggling IFF_ALLMULTI flag does not require full interface
reintialization.
2008-07-02 06:34:02 +00:00
Pyun YongHyeon
351a76f9aa Instead of allocating variables for each events/hardware flags, use
a dedicated flag that represents controller capabilities/events.
This will simplify many part of code that requires different
workaround for each controller revisions and will enhance
readability.
While I'm here move PHY wakeup code up before mii_phy_probe() which
seems to help to wake PHY in some cases.
2008-07-02 06:29:43 +00:00
Pyun YongHyeon
ace7ed5dd5 Switch to memory space register mapping over IO space. If that
mapping fails fall back to traditional IO space access.
2008-07-02 05:21:09 +00:00
Pyun YongHyeon
f98dd8cf50 While accessing EEPROM command register use pre-defined constant
instead of hardcoded value.
2008-07-02 05:01:19 +00:00
Pyun YongHyeon
9dfcacbe29 After the change of r176757 re(4) no longer relys on reading
RL_TXCFG register to identify a device in device probe. Reflect the
fact by modifing device description with general ethernet
controller family.
Note, rl_basetype in struct rl_type is not used and the more
detailed information is provided with rl_hwrev structure.
2008-07-02 04:55:39 +00:00
Pyun YongHyeon
dd6bd66671 Remove duplicated H/W revision check. 2008-07-02 04:27:36 +00:00
Pyun YongHyeon
339a44fb62 Don't touch MSI enable bit in RL_CFG2 register. For unknown reason
clearing MSI enable bit for MSI capable hardwares resulted in Tx
problems. MSI enable bit is set only when MSI is requested from
user.

Tested by:	remko
2008-04-15 00:46:15 +00:00
Pyun YongHyeon
a4148af5f0 Padding more bytes than necessary one broke another variants of
PCIe RealTek chips. Only pad IP packets if the payload is less than
28 bytes.

Obtained from:	NetBSD
PR:		kern/122221
2008-03-31 04:03:14 +00:00
Pyun YongHyeon
99c8ae87a4 In revision 1.70, 1.71 and 1.84 re(4) tried to workaround checksum
offload bugs by manual padding for short IP/UDP frames. Unfortunately
it seems that these workaround does not work reliably on newer PCIe
variants of RealTek chips.

To workaround the hardware bug, always pad short frames if Tx IP
checksum offload is requested. It seems that the hardware has a
bug in IP checksum offload handling. NetBSD manually pads short
frames only when the length of IP frame is less than 28 bytes but I
chose 60 bytes to safety. Also unconditionally set IP checksum
offload bit in Tx descriptor if any TCP or UDP checksum offload is
requested. This is the same way as Linux does but it's not
mentioned in data sheet.

Obtained from:	NetBSD
Tested by:	remko, danger
2008-03-28 01:21:21 +00:00
Pyun YongHyeon
2000cf6c0b MSI handling on some RealTek chips are broken so disable it by
default.

Reported by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
Tested by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
2008-03-23 05:35:18 +00:00
Pyun YongHyeon
03ca7ae8a9 For MSI capable hardwares, enable MSI enable bit in RL_CFG2
register.  If MSI was disabled by hw.re.msi_disable tunable
expliclty clear the MSI enable bit.
2008-03-23 05:31:35 +00:00
Pyun YongHyeon
ce6283934e Some RealTek chips are known to be buggy on DAC handling, so
disable DAC by default.
2008-03-23 05:13:45 +00:00
Pyun YongHyeon
ccf34c81f8 VLAN hardware tag information should be set for all desciptors of a
multi-descriptor transmission attempt. Datasheet said nothing about
this requirements. This should fix a long-standing VLAN hardware
tagging issues with re(4).

Reported by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
Tested by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
2008-03-23 05:06:16 +00:00
Pyun YongHyeon
70acaecfd0 Always honor configured VLAN/checksum offload capabilities.
Previously re(4) used to blindly enable VLAN hardware tag stripping
and Rx checksum offload regardless of enabled optional features of
interface.
2008-03-23 04:59:13 +00:00
Pyun YongHyeon
dfdb409ef0 Don't map memory/IO resource in device probe and just use PCI
vendor/revision/sub device id of the hardware to probe it.
This is the same way as NetBSD does and it enhances readabilty
a lot.
2008-03-03 04:15:08 +00:00
Pyun YongHyeon
c1d0b5737f Don't allow jumbo frame on 8139C+ controller.
While I'm here add a check for minimal MTU length.
2008-03-03 03:41:06 +00:00
Pyun YongHyeon
7467bd5370 Implement WOL.
Tested by:	Fabian Keil ( freebsd-listen AT fabienkeli DOT de )
2008-03-03 03:33:58 +00:00
John Baldwin
304a4c6fb1 - Retire npe_defrag(), gem_defrag(), msk_defrag(), nfe_defrag(), and
re_defrag() and use m_collapse() instead.
- Replace a reference to ath_defrag() in a comment in if_wpi.c with
  m_collapse().
2008-01-17 23:37:47 +00:00
Pyun YongHyeon
738489d1c1 Fix build. 2008-01-15 03:47:24 +00:00
Pyun YongHyeon
d65abd6663 Overhaul re(4).
o Increased number of Rx/Tx descriptors to 256 for 8169 GigEs
  because it's hard to push the hardware to the limit with default
  64 descriptors.
  TSO requires large number of Tx descriptors to pass a full sized
  TCP segment(65535 bytes IP packet) to hardware. Previously it
  consumed 32 Tx descriptors, assuming MCLBYTES DMA segment size,
  to send the TCP segment which means re(4) couldn't queue more
  than two full sized IP packets.
  For 8139C+ it still uses 64 Rx/Tx descriptors due to its hardware
  limitations. With this changes there are (very) small waste of
  memory for 8139C+ users but I don't think it would affect 8139C+
  users for most cases.
o Various bus_dma(9) fixes.
   - The hardware supports DAC so allow 64bit DMA operations.
   - Removed BUS_DMA_ALLOC_NOW flag.
   - Increased DMA segment size to 4096 from MCLBYTES because TSO
     consumes too many descriptors with MCLBYTES DMA segment size.
   - Tx/Rx side bus_dmamap_load_mbuf_sg(9) support. With these
     changes the code is more readable than previous one and got a
     (slightly) better performance as it doesn't need to pass/
     decode arguments to/from callback function.
   - Removed unnecessary callback function re_dmamap_desc() and
     nuked rl_dmaload_arg structure which was used in the callback.
   - Additional protection for DMA map load failure. In case of
     failure reuse current map instead of returning a bogus DMA
     map.
  -  Deferred DMA map unloading/sync operation for maximum
     performance until we really need to load new DMA map. If we
     happen to reuse current map(e.g. input error) there is no need
     to sync/unload/load again.
  -  The number of allowable Tx DMA segments for a mbuf chains are
     now 32 instead of magic nseg value. If the number of available
     Tx descriptors are short enough to send highly fragmented mbuf
     chains an optimized re_defrag() is called to collapse mbuf
     chains which is supposed to be much faster than m_defrag(9).
     re_defrag() was borrowed from ath(4).
   - Separated Rx/Tx DMA tag from a common DMA tag such that Rx DMA
     tag correctly uses DMA maps that were created with DMA alignment
     restriction(8bytes alignments). Tx DMA tag does not have such
     alignment limitation.
   - Added additional sanity checks for DMA ring map load failure.
   - Added additional spare Rx DMA map for graceful handling of Rx
     DMA map load failure.
   - Fixed misused bus_dmamap_sync(9) and added missing
     bus_dmamap_sync(9) in re_encap()/re_txeof()/re_rxeof().
o Enabled TSO again as re(4) have reasonable number of Tx
  descriptors.
o Don't touch DMA address of a Tx descriptor in re_txeof(). It's
  not needed.
o Fix incorrect update of if_ierrors counter. For Rx buffer
  shortage it should update if_qdrops as the buffer is reused.
o Added checks for unsupported H/W revisions and return ENXIO for
  these hardwares. This is required to remove resource allocation
  code in re_probe as other drivers do in device probe routine.
o Modified descriptor index manipulation macros as it's now possible
  to have different number of descriptors for Rx/Tx.
o In re_start, to save a lock operation, use IFQ_DRV_IS_EMPTY before
  trying to invoke IFQ_DRV_DEQUEUE. Also don't blindly call re_encap
  since we already know the number of available Tx descriptors in
  advance.
o Removed RL_TX_DESC_THLD which was used to reserve RL_TX_DESC_THLD
  descriptors in Tx path. There is no such a limitation mentioned in
  8139C+/8169/8110/8168/8101/8111 datasheet and it seems to work ok
  without reserving RL_TX_DESC_THLD descriptors.
o Fix a comment for RL_GTXSTART. The register is 8bits register.
o Added comments for 8169/8139C+ hardware restrictions on descriptors.
o Removed forward declaration for "struct rl_softc", it's not needed.
o Added a new structure rl_txdesc for Tx descriptor managements and
  a structure rl_rxdesc for Rx descriptor managements.
o Removed unused member variable rl_intlock in driver softc. There are
  still several unused member variables which are supposed to be used
  to access hardware statistics counters. But it seems that accessing
  hardware counters were not implemented yet.
2008-01-15 01:10:31 +00:00
Pyun YongHyeon
a0637caa3f By definition promiscuous mode should see all unicast frames as well
as multicast/broadcast frames. Previously re(4) ignored multicast
frames in promiscuous mode. The RTL8169 datasheet was not clear
how it handles multicast frames in promiscuous mode.

PR:	kern/118572
MFC after:	3 days
2007-12-20 07:26:20 +00:00
Pyun YongHyeon
1acbb78ada Add another RTL8168 revision 3 which is found on RTL8111-GR Gigabit
Ethernet Controller. Multicast filtering wasn't tested and needs more
expore. While I'm here change complex if statements with switch
statement which would improve readability.

Reported by:	Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca >
Tested by:	Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca >
2007-12-08 00:14:09 +00:00
Pyun YongHyeon
7c103000b6 Always honor promiscuous flag prior to programming Rx multicast
filter. This fixes a regression introduced in rev 1.89.

PR:	114632
MFC after:	3 days
2007-12-03 01:28:08 +00:00
Pyun YongHyeon
6a087a8722 Fix function prototype for device_shutdown method. 2007-11-22 02:45:00 +00:00
Remko Lodder
3b9982e59c Add support for D-Link DGE-528(T) Rev.B1
PR:		112774
Submitted by:	Denis Fortin <fortin at acm dot org>
Approved by:	imp (mentor), yongari
MFC After:	3 days
2007-11-12 15:44:00 +00:00
Pyun YongHyeon
c4aca09a2a Make sure to take PHY out of power down mode in device attach.
Without this the PHY wouldn't work as expected. This should fix
dual-boot Windows XP machine where RealTek Windows drivers put the
PHY in power down mode during shutdown. The magic PHY register
accesses come from RealTek driver. No datasheets mention the magic
PHY registers.
In general, the PHY wakeup code should go into PHY driver. However it
seems that it only apply to RTL8169S single chip and it would be
another hack if we have rgephy(4) check what parent driver/chip model
is attached.

Reported by:	lofi, Laurens Timmermans ( laurens AT timkapel DOT nl )
Tested by:	lofi
Obtained from:	RealTek FreeBSD driver
Approved by:	re (Ken Smith)
2007-08-14 02:00:04 +00:00