Add function map_port_space() to map the memory mapped I/O port
range as uncacheable virtual memory and call it prior to probing
for a console. This removes the dependency on the loader to have
done this for us. Note that this change does not include doing
the same for APs.
Approved by: re (blanket)
the kernel itself, but SAL on Itanium2 machines spontaneously
rebooted the machine.
Approved by: re (blanket)
Submitted by: Arun Sharma <adsharma@unix-os.sc.intel.com>
o Show the contents of the AP wakeup descriptor when dumping SAL
information.
o Increase S/N ratio when listing the itr and dtr. Only show valid
mappings and give the total number of TRs.
Approved by: re (blanket)
If the value from the user is less than 177, assume it is a multiple of
a single speed CDROM and convert to KB/sec.
No complaints from: sos
Reviewed by: ken
Approved by: re
MFC after: 1 day
i386 cpu_thread_exit(). This resulted in a panic with WITNESS
since we need to hold Giant to call kmem_free(), and we weren't
helding it anymore in cpu_thread_exit(). We now do this from a
new MD function, cpu_thread_dtor(), called by thread_dtor().
Approved by: re@
Suggested by: jhb
This code allows a user program to enable target mode on a SIM and
then emulate any number of devices (disks, tape drives, etc.) All
decisions about device behavior (UA, CA, inquiry response) are left
to the usermode program and the kernel driver is merely a conduit
for CCBs. This enables multiple concurrent target emulators, each
using its own backing store and IO model.
Also included is a user program that emulates a disk (RBC) using a
file as a backing store. This provides functionality similar to
md(4) at the CAM layer.
Code has been tested on ahc(4) and should also work on isp(4) (and
other SIMs that gain target mode support). It is a complete rewrite
of /sys/cam/scsi_target* and /usr/share/examples/scsi_target.
Design, comments from: gibbs
Supported by: Cryptography Research
Approved by: re
to PCI bridge can be read be evaluating the _BBN method of the host to PCI
device. Unfortunately, there appear to be some lazy/ignorant/moronic/
whatever BIOS writers that return 0 for _BBN for all host to PCI bridges in
the system. On a system with a single host to PCI bridge this is not a
problem as the child bus of that single bridge will be bus 0 anyway.
However, on systems with multiple host to PCI bridges and l/i/m/w BIOS
writers this is a major problem resulting in all but the first host to
PCI bridge failing to attach. So, this adds a workaround.
If the _BBN of a host to PCI bridge is zero and pcib0 already exists
and is not us, the we use _ADR to look up our PCI function and slot
(we currently assume we are on bus 0) and use that to call
host_pcib_get_busno() to try and extract our bus number from config
registers on the host to PCI bridge device. If that fails, then we make
an evil assumption that ACPI's _SB_ namespace lays out the host to PCI
bridges in ascending order and use our pcib unit number as our bus
number.
Approved by: re
In _thread_switch, set current thread pointer in kse mailbox
only after all registers copied out of thread mailbox, kernel will do
upcall at trap time, if set current thread pointer before loading all
registers from thread mailbox, at trap time, the thread mailbox data
will be overwritten by kernel, result is junk data is loaded into CPU.
macro for use when parsing MADT tables, thus we always tried to set the
interrupt model to APIC. This proved to be harmful on UP machines with
IO APIC's (or for UP kernels on SMP machines) since the wrong interrupt
routing information would be returned.
Pointy hat to: jhb
Approved by: re (rwatson)
- Provide a routine in sched_4bsd to add this functionality.
- Use sched_pctcpu() in kern_proc, which is the one place outside of
sched_4bsd where the old pctcpu value was accessed directly.
Approved by: re
intended to be used by significant memory consumers so that they may drain
some of their caches.
Inspired by: phk
Approved by: re
Tested on: x86, alpha
