The AP93 has:
* AR7240 - mips24k processor with integrated 10/100 switch and
various other peripherals;
* AR9283 - 2x2 2.4GHz 802.11n (with calibration data in flash);
* 64MB RAM;
* 16MB SPI flash.
The switch code detects as an AR8216 at the present moment, which isn't
_entirely_ strictly true. However, the MII/MDIO routing in AP93.hints
works - the arge0 MAC connects to PHY4 in the switch, but via the
switch internal MDIO bus. The switch connects to arge0's MDIO bus,
but only to export the switch registers.
Thanks to stb and ray for the switch work, and ray for helping determine
what the correct switch hints should be for this thing.
PAE to insta-panic on startup. Remove one unused variable that was
commented out.
Reviewed by: ambrisko@
Obtained from: jhb@ peter@ bz@ and countless others during BSDCAN
MFC after: 3 days
This is designed to support the very basic ethernet switch chip behaviour,
specifically:
* accessing switch register space;
* accessing per-PHY registers (for switches that actually expose PHYs);
* basic vlan group support, which applies for the rtl8366 driver but not
for the atheros switches.
This also includes initial support for:
* rtl8366rb support - which is a 10/100/1000 switch which supports
vlan groups;
* Initial Atheros AR8316 switch support - which is a 10/100/1000 switch
which supports an alternate vlan configuration (so the vlan group
methods are stubbed.)
The general idea here is that the switch driver may speak to a variety of
backend busses (mdio, i2c, spi, whatever) and expose:
* If applicable, one or more MDIO busses which ethernet interfaces can
then attach PHYs to via miiproxy/mdioproxy;
* exposes miibusses, one for each port at the moment, so ..
* .. a PHY can be exposed on each miibus, for each switch port, with all
of the existing MII/ifnet framework.
However:
* The ifnet is manually created for now, and it isn't linked into the
interface list, nor can you (currently) send/receive frames on this ifnet.
At some point in the future there may be _some_ support for this, for
switches with a multi-port, isolated mode.
* I'm still in the process of sorting out correct(er) locking.
TODO:
* ray's switch code in zrouter (zrouter.org) includes a much more developed
newbus API that covers the various switch methods, as well as a
capability API so drivers, the switch layer and the userland utility
can properly control the subset of supported features.
The plan is to sort that out later, once the rest of ray's switch drivers
are brought over and extended to export MII busses and PHYs.
Submitted by: Stefan Bethke <stb@lassitu.de>
Reviewed by: ray
# This doesn't implement the full Linux boot ABI for arm yet.
# since there's no ATAGs list passed in for r2, and r0 has
# boot options rather than 0 as specified in the standard.
# Commited code to the tree won't touch any of this anyway, but
# future code may be able to use this.
failed while write to some other succeeded. Instead mark disk as failed.
- Make RAID1E less aggressive in failing disks to avoid volume breakage.
MFC after: 2 weeks
deterministically handled after the corresponding PHY drivers when
loaded as modules. Otherwise, when these MAC/PHY driver pairs are
compiled into a single module probing the PHY driver may fail. This
makes r151438 and r226154 actually work. [1]
Reported and tested by: yongari (fxp(4))
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.
Submitted by: jhb [1]
MFC after: 3 days
ports. This currently is a nop, but will soon be used to allow
support for multiple boards to be built into one kernel (starting with
AT91RM9200 and expanding out from there).
There are two aspects to the sequential access optimization: (1) read ahead
of pages that are expected to be accessed in the near future and (2) unmap
and cache behind of pages that are not expected to be accessed again. This
revision changes both aspects.
The read ahead optimization is now more effective. It starts with the same
initial read window as before, but arithmetically grows the window on
sequential page faults. This can yield increased read bandwidth. For
example, on one of my machines, a program using mmap() to read a file that
is several times larger than the machine's physical memory takes about 17%
less time to complete.
The unmap and cache behind optimization is now more selectively applied.
The read ahead window must grow to its maximum size before unmap and cache
behind is performed. This significantly reduces the number of times that
pages are unmapped and cached only to be reactivated a short time later.
The unmap and cache behind optimization now clears each page's referenced
flag. Previously, in the case of dirty pages, if the containing file was
still mapped at the time that the page daemon examined the dirty pages,
they would be reactivated.
From a stylistic standpoint, this revision also cleanly separates the
implementation of the read ahead and unmap/cache behind optimizations.
Glanced at: kib
MFC after: 2 weeks
ataraid(4) previously was present there and having GEOM RAID is convinient.
Unlike other classes GEOM RAID can be set up from BIOS before install and
users are expecting it to be detected automatically.
2703 add mechanism to report ZFS send progress
If the zfs send command is used with the -v flag, the amount of bytes
transmitted is reported in per second updates.
References:
https://www.illumos.org/issues/2703
Obtained from: illumos (issue #2703)
MFC after: 2 weeks
as possible when using more than one igb(4) adapter. This
means that queues will not be bound to the same CPUs if
there are more CPUs availble.
This is only applicable to a system that has multiple interfaces.
Obtained from: Yahoo! Inc.
MFC after: 3 days
Place the arguments at a fixed offset of 0x800 withing the argument area
(of size 0x1000). Allow variable size extended arguments first of which
should be a size of the extended arguments (including the size
parameter).
Consolidate all related definitions in a new i386/common/bootargs.h header.
Many thanks to jhb and bde for their guidance and reviews.
Reviewed by: jhb, bde
Approved by: jhb
MFC after: 1 month
controller to perform MDIO type accesses to a remote transceiver
using message pages defined through MRBE(multirate backplane
ethernet). It's used in blade systems(e.g Dell Blade m610) which
are connected to pass-through blades rather than traditional
switches.
This change directly manipulates firmware's mailboxes to control
remote PHY such that it does not use mii(4). Alternatively, as
David said, it could be implemented in brgphy(4) by creating a fake
PHY and let brgphy(4) do necessary mii accesses and bce(4) can
implement mailbox accesses based on the type of brgphy(4)'s mii
accesses. Personally, I think it would make brgphy(4) hard to
maintain since it would have to access many bce(4) registers in
brgphy(4). Given that there are users who are suffering from lack
of remote PHY support, it would be better to get working system
rather than waiting for complete/perfect implementation.
Tested by: Jan Winter ( jan.winter <> kantarmedia dot de )
Reviewed by: davidch (initial version)
MFC after: 2 weeks
TX and RX PCU stop/drain routines have been thoroughly debugged.
It's also very likely that I should add hooks back up to the
interface glue (if_ath_pci / if_ath_ahb) to do any relevant
bus flushes that are required. A WMAC DDR flush may be required
for the AR9130 SoC.
