is that the JBus to EBus bridges share the interrupt controller of a
sibling JBus to PCIe bridge (at least as far as the OFW device tree
is concerned, in reality they are part of the same chip) so we have to
probe and attach the latter first. That happens to be also the case
due to the fact that the JBus to PCIe bridges appear first in the OFW
device tree but it doesn't hurt to ensure the right order.
system LED on or off. Unlike the EBus LED AUXIO register where the
remaining bits are unused the upper bits of the SBus AUXIO register
are used to control other things like the link test enable pin of
the on-board NIC which we don't want to change as a side-effect.
- Remove the superfluous bzero()'ing of the softc obtained from
device_get_softc().
Reviewed by: yongari
MFC after: 3 days
variant to allocating a fixed set of 5 banks that the EBus variant
is documented to have (and also has in reality). Trying to allocate
up to 8 banks is a remnant from experiments during the development
of this driver.
Discussed with: joerg, yongari
Reviewed by: yongari
Approved by: re (scottl)
resources in ebus.c rev. 1.22 and collapse the resource allocation for
both the EBus and SBus variants into auxio_attach_common().
- For the EBus variant make sure that the resource for controlling the
LED is actually available; (in theory) we could have ended up using
the resource without allocating it.
be used to announce various system activity.
The auxio device provides auxiliary I/O functions and is found on various
SBus/EBus UltraSPARC models. At present, only front panel LED is
controlled by this driver.
Approved by: jake (mentor)
Reviewed by: joerg
Tested by: joerg
