These can be returned from the PSCI AFFINITY_INFO call. This is not
marked as optional so bhyve will need to implement it & can use these
macros.
Sponsored by: Arm Ltd
Wrap parts of psci.h that aren't usable by userspace in _KERNEL checks.
This allows it to be used to implement PSCI and SMCCC by bhyve in
userspace.
Sponsored by: Arm Ltd
Sponsored by: Innovate UK
Sponsored by: The FreeBSD Foundation
Jumping direct to ret was not restoring the saved value of x19 and was
also not adjusting sp to discard the two saved registers.
Reviewed by: andrew
Sponsored by: DARPA
Differential Revision: https://reviews.freebsd.org/D37922
To allow device drivers to call into SMCCC we need to initialise it
earlier. As it depends on PSCI, and that is detected via ACPI or FDT
move the call to smccc_init to the PSCI driver.
Add a function for drivers to read the smccc version, or 0 if smccc
is not present.
psci_attach is way too late to provide the intended semantics for
psci_present. psci calls can be made immediately after psci_init(),
called way earlier at SI_SUB_CPU + SI_ORDER_FIRST, and we need it to
be valid as early as we can possibly call a psci function.
This fixes booting RPi3+4 with the in-review spintable patch;
rpi3-psci-monitor patches the FDT to add a PSCI node, but it doesn't
patch each cpus' enable-method. Because of this, we would stall the
boot while enabling CPU 1 as we saw a valid looking enable-method and
"no" functional PSCI and attempted to use the spintable rather than
simply not starting secondary APs.
Fixes: 2218070b2c ("psci: finish psci_present implementation")
Reported by: karels
Enabling HvCallSetVpRegisters and HvCallGetVpRegisters for hypercalls to
read and write to specific MSRs. This is required for implementing wrmsr
and rdmsr, which is required for Hyper-V vmbus driver for ARM64.
Also we need to use arm smccc hvc 1.2 version as we need to access
registers beyond X0-X3 for HvCallGetVpRegisters. Currently scoping
it only for Hyper-V.
Reviewed by: lwhsu, andrew, whu
Tested by: Souradeep Chakrabarti <schakrabarti@microsoft.com>
Signed-off-by: Souradeep Chakrabarti <schakrabarti@microsoft.com>
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D36256
To simplify adding new handlers merge the common parts of the functions
used to call into the arm SMCCC firmware.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D36297
This was already declared in psci.h, but it was never defined/set. Do
this now, so we can use it to decide if enable-method in /cpus FDT nodes
should be inspected later on. While we're here, convert it to a
boolean.
Reviewed by: andrew (slightly earlier version)
Differential Revision: https://reviews.freebsd.org/D34553
PSCI code to use it.
This interface will also be used by Intel Stratix 10 platform.
This was not tested on arm due to lack of PSCI-enabled arm hardware
lying around.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D21439
Minimalistic PSCI implementation in U-Boot doesn't implement get_version()
method for some SoC. In this case, use PSCI version declared by 'psci' node
in DT as fallback.
MFC after: 2 weeks
This calls into the Arm Trusted Firmware to enable and disable the
workaround for the Speculative Store Bypass Disable (SSBD) issue, also
known as Spectre Variant 4.
As this may have a large performance overhead, and how exploitable SSBD is
is unknown we follow the Linux lead of allowing the administrator to select
between always on, always off, or only enabled in the kernel, with the
latter being the default.
PR: 228955
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D15819
to call into the firmware in a similar way to the existing PSCI, and used
PSCI to detect when SMCCC is enabled.
There is a function ID space we can use. Currently we only support 3
functions in the ARM Architecture Calls region, however it is expected we
will expend these in the future.
Sponsored by: DARPA, AFRL
This is in preperation for supporting newer smccc functions that also use
the same call method.
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D15745
Prior to r324754 we treated PSCI 0.2 and 1.0 as identical, and r324754
extended that to include all PSCI 1.x revisions. Change the string
emitted under bootverbose to reference '0.2 compatible' to avoid
confusion when the system includes a later PSCI rev.
Discussed with: andrew
Sponsored by: The FreeBSD Foundation
reports version 1.1 so the check was failing. As thjis is a minor change
from 1.0, and future 1.x revisions are also expected to be backwards
compatible just ignore the minor revision in the init handler.
Sponsored by: DARPA, AFRL
Clang 4.0 accepts the smc instruction with or without specifying
.arch_extension sec, but Clang 5.0 produces an error without it.
MFC after: 3 weeks
Sponsored by: The FreeBSD Foundation
kernel calls this directly so the event handler is not called, meaning
the computer fails to reboot.
Tested by: cognet
MFC after: 1 week
Sponsored by: DARPA, AFRL
Table to find if the hardware supports PSCI, and if so what method the
kernel should use to interact with it.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
can be seen as the same as 0.2. There are changes with the data passed to
CPU_SUSPEND, however we don't yet use this call.
Sponsored by: ABT Systems Ltd
handles versions 0.1 and 0.2 of the standard on 32-bit ARM.
With this driver we can shutdown in QEMU. Further work is needed to
turn secondary cores on on boot and to support later revisions of the
specification.
Submitted by: Robin Randhawa <Robin.Randhawa at ARM.com>
Sponsored by: The FreeBSD Foundation
