Commit Graph

125268 Commits

Author SHA1 Message Date
Mark Johnston
fb50c41448 Enable witness(4) in the RISC-V GENERIC config.
Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D18559
2018-12-14 20:57:57 +00:00
Warner Losh
3d060215a5 atomic_cmpset return value is also an int. 2018-12-14 19:48:42 +00:00
Warner Losh
2fb9d3808a atomic_fcmpset* return int, not the type of *.
fcmpset returns true/false as a int, so make the return types and
variables match the int to be consistent with other arch.

Reviewed by: cognet@
Differential Revision: https://reviews.freebsd.org/D18557
2018-12-14 19:14:51 +00:00
Mark Johnston
4a02086817 Clean up the riscv pmap_bootstrap() implementation.
- Build up phys_avail[] in a single loop, excluding memory used by
  the loaded kernel.
- Fix an array indexing bug in the aforementioned phys_avail[]
  initialization.[1]
- Remove some unneeded code copied from the arm64 implementation.

PR:		231515 [1]
Reviewed by:	jhb
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D18464
2018-12-14 18:50:32 +00:00
Emmanuel Vadot
ad5bce19bf allwinner: aw_pwm: Read value at attach
The booloaded might have configured the pwm controller so read the values.
2018-12-14 18:39:17 +00:00
Emmanuel Vadot
6a9997ed67 pwm: Convert period and duty to unsigned int
We don't need a 64 bits value to store nanoseconds

Discused with:	ian, jhibbits
2018-12-14 18:37:26 +00:00
Mark Johnston
8b2de3f0d4 Add support for the nForce MCP89 adapter.
PR:		234015
Submitted by:	Andrejs Bogdanovs <sinchiroca86@gmail.com>
MFC after:	1 week
2018-12-14 18:16:35 +00:00
Marcin Wojtas
8a263d8fca Fix TPM driver compilation from r342084
Include recent ACPI_ID_PROBE API change.
2018-12-14 17:43:35 +00:00
Marcin Wojtas
a2d5ed9442 Introduce driver for TPM 2.0 in CRB and FIFO (TIS) modes
It was written basing on:
TCG PC Client Platform TPM Profile (PTP) Specification Version 22, Revision 1.03.
It only supports Locality 0. Interrupts are only supported in FIFO mode.

The driver in FIFO mode was tested on x86 with Infineon SLB9665 discrete TPM chip.
Driver in both modes was also tested on qemu with swtpm running on host.

Submitted by: Kornel Duleba <mindal@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D18048
2018-12-14 16:14:36 +00:00
Kashyap D Desai
92a1d56ccc Compilation failure on ppc and mips due to Revision 342066.
Adding extra memset on chain frame.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 10:49:48 +00:00
Emmanuel Vadot
6c8fcde80c arm64: allwinner: axp81x: Fix double invertion for FLDO1
This fix booting on A64 boards when disabling the unused regulators at boot.
We did disable all the regulator handled by register 0x13 which of course contain
mandatory regulators for the board to be up.

Reported by:	Mark Millard <marklmi@yahoo.com>
X-MFC-With:	r340848
2018-12-14 10:26:17 +00:00
Andriy Gapon
701ded4e30 ichwd: add Sunrise Point-LP ID
Submitted by:	Tetsuya Uemura <t_uemura@macome.co.jp>
Tested by:	Tetsuya Uemura <t_uemura@macome.co.jp>
MFC after:	2 weeks
Relnotes:	maybe
2018-12-14 09:30:43 +00:00
Andriy Gapon
8b65c16f6e ichwd: add support for clearing No Reboot bit in TCOv4
This is based on a patch developed by
Tetsuya Uemura <t_uemura@macome.co.jp>.
Many thanks!

Submitted by:	Tetsuya Uemura <t_uemura@macome.co.jp> (earlier version)
Tested by:	Tetsuya Uemura <t_uemura@macome.co.jp>
MFC after:	2 weeks
2018-12-14 09:28:20 +00:00
Kashyap D Desai
3fa18dc335 Driver version upgrade 07.708.02.00-fbsd
Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:06:39 +00:00
Kashyap D Desai
56d91e4964 This patch will increase debug level as current logging level has
very minimal prints and even few important messages will not get logged.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:05:49 +00:00
Kashyap D Desai
e80341d50f Change IOC INIT wait time to 180 secs to keep it inline with timeout
used by internal DCMDs.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:05:01 +00:00
Kashyap D Desai
3d27317677 This patch will add support for NVME PRPs creation by driver for fastpath
capable IOs. NVME specification supports specific type of scatter gather list
called as PRP (Physical Region Page) for IO data buffers. Since NVME drive is
connected behind SAS3.5 tri-mode adapter, MegaRAID driver/firmware has to convert
OS SGLs in native NVMe PRP format. For IOs sent to firmware, MegaRAID firmware
does this job of OS SGLs to PRP translation and send PRPs to backend NVME device.
For fastpath IOs, driver will do this OS SGLs to PRP translation.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:04:16 +00:00
Kashyap D Desai
79b4460b0f This patch will add support for new DCMD to get PD information and a single data structure
to specify LD and JBOD.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:03:28 +00:00
Kashyap D Desai
2a1d3bcde8 To improve RAID 1/10 Write performance, OS drivers need to issue the
required Write IOs as Fast Path IOs (after the appropriate checks
allowing Fast Path to be used) to the appropriate physical drives
(translated from the OS logical IO) and wait for all Write IOs to complete.

Design: A write IO on RAID volume will be examined if it can be sent in
Fast Path based on IO size and starting LBA and ending LBA falling on to
a Physical Drive boundary. If the underlying RAID volume is a RAID 1/10,
driver issues two fast path write IOs one for each corresponding physical
drive after computing the corresponding start LBA for each physical drive.
Both write IOs will have the same payload and are posted to HW such that
replies land in the same reply queue.

If there are no resources available for sending two IOs, driver will send
the original IO from upper layer to RAID volume through the Firmware.

When both IOs are completed by HW, the resources will be released
and SCSI IO completion handler will be called.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:02:44 +00:00
Kashyap D Desai
821df4b93e Detect sequential Write IOs and pass the hint that it is part of sequential
stream to help HBA Firmware do the Full Stripe Writes. For read IOs on
certain RAID volumes like Read Ahead volumes,this will help driver to
send it to Firmware even if the IOs can potentially be sent to
hardware directly (called fast path) bypassing firmware.

Design: 8 streams are maintained per RAID volume as per the combined
firmware/driver design. When there is no stream detected the LRU stream
is used for next potential stream and LRU/MRU map is updated to make this
as MRU stream. Every time a stream is detected the MRU map
is updated to make the current stream as MRU stream.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:01:49 +00:00
Kashyap D Desai
c376f8641e This patch will add new interface to support more than 256 JBODs.
Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:00:45 +00:00
Kashyap D Desai
503c4f8d7f This patch will add support for divert bitmap in RAID map. Divert bitmap is supported for
SAS3.5 adapters only.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 08:00:01 +00:00
Kashyap D Desai
4ad8357607 This patch will add support for new Dynamic RaidMap to have different sizes
for different number of supported VDs for SAS3.5 MegaRAID adapters.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 07:59:09 +00:00
Kashyap D Desai
7aade8bfb8 This patch will add support for next generation(SAS3.5) of Tri mode(SAS, SATA, NVMe)
MegaRAID adapters.

Submitted by: Sumit Saxena <sumit.saxena@broadcom.com>
Reviewed by:  Kashyap Desai <Kashyap.Desai@broadcom.com>
Approved by:  ken
MFC after:  3 days
Sponsored by:   Broadcom Inc
2018-12-14 07:57:00 +00:00
Mateusz Guzik
24d64be4c5 vfs: mostly depessimize NDINIT_ALL
1) filecaps_init was unnecesarily a function call
2) an asignment at the end was preventing tail calling of cap_rights_init

Sponsored by:	The FreeBSD Foundation
2018-12-14 03:55:08 +00:00
Jung-uk Kim
90b566fde9 MFV: r342049
Merge ACPICA 20181213.
2018-12-14 00:40:38 +00:00
Mateusz Guzik
8ca79fbd4a dtrace: fix userspace access on boxes with SMAP
dtrace has its own routines which were not updated after SMAP support got
implemented. Use ifunc just like for other routines.

This in particular fixes ustack().

Reviewed by:	markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D18542
2018-12-13 20:09:38 +00:00
Chuck Tuffli
87b3975e36 nda(4) fix check for Dataset Management support
In the nda(4) driver, only set DISKFLAG_CANDELETE (a.k.a. can support
BIO_DELETE) if the drive supports Dataset Management. There are reports
that without this check, VMWare Workstation does not work reliably.

Fix is to check the ONCS field in the NVMe Controller Data structure for
support. This check previously existed but did not survive the
big-endian changes.

Reported by: yuripv@yuripv.net
Reviewed by: imp, mav, jimharris
Approved by: imp (mentor)
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D18493
2018-12-13 13:25:37 +00:00
Andrey V. Elsukov
6062df0326 Plug memory leak for AES_*_NIST_GMAC algorithms.
swcr_newsession() allocates sw_ictx for these algorithms, thus we need
to free() it in swcr_freesession().

PR:		233907
MFC after:	1 week
2018-12-13 08:59:51 +00:00
Justin Hibbits
45b33e809f powerpc/booke: Change KERNBASE to be physical load address
Previous commits have made VM_MIN_KERNEL_ADDRESS its own separate entity,
and rebased the kernel around that address instead of KERNBASE.  This commit
pulls the trigger to rebase KERNBASE to a physical load address.  The
eventual goal is to align the address with the AIM KERNBASE, but at this
time that's not an option.

Currently a Book-E kernel must be loaded on a 64MB boundary, due to size
issues.  The common load address is at the 64MB mark (0x04000000), so simply
make that the default KERNBASE.

As of this commit, Book-E kernels can be loaded and booted with ubldr.

MFC after:	3 weeks
2018-12-13 05:07:39 +00:00
Justin Hibbits
3067a880ce powerpcspe: Fix GPR handling in SPE exception handler
Optimize the exception handler to only save and load the upper word of the
GPRs used in the emulating instruction.  This reduces the save/load
overhead, and as a side effect does not overwrite the upper word of any
temporary register.

With this commit I am now able to run editors/abiword and math/gnumeric on a
e500-based system.

MFC after:	1 week
MFC With:	r341752,r341751
2018-12-13 04:48:28 +00:00
Matt Macy
ff2038a9bf Generalize AES iov optimization
Right now, aesni_cipher_alloc does a bit of special-casing
for CRYPTO_F_IOV, to not do any allocation if the first uio
is large enough for the requested size. While working on ZFS
crypto port, I ran into horrible performance because the code
uses scatter-gather, and many of the times the data to encrypt
was in the second entry. This code looks through the list, and
tries to see if there is a single uio that can contain the
requested data, and, if so, uses that.

This has a slight impact on the current consumers, in that the
check is a little more complicated for the ones that use
CRYPTO_F_IOV -- but none of them meet the criteria for testing
more than one.

Submitted by:	sef at ixsystems.com
Reviewed by:	cem@
MFC after:	3 days
Sponsored by:	iX Systems
Differential Revision:	https://reviews.freebsd.org/D18522
2018-12-13 04:40:53 +00:00
Warner Losh
a1128e850e Correctly implemenet atomic_swap_long for mips64.
MIPS64 has 64-bit longs, so use uint64_t for it, otherwise uint32_t.
sizeof(long) == sizeof(ptr) for all platforms, so define
atomic_swap_ptr in terms of atomic_swap_long.

Submitted by: hps@
2018-12-13 00:42:26 +00:00
Emmanuel Vadot
2d5e81fbd0 mv_thermal: Add thermal driver for AP806 and CP110 thermal sensor
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:33:05 +00:00
Emmanuel Vadot
31cdaf420f arm64: mv_cp110_icu: Fix build 2018-12-12 22:24:30 +00:00
Emmanuel Vadot
e5ff483e7a mv_gpio: Since it's also an interrupt controller, attach sooner
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:10:11 +00:00
Emmanuel Vadot
cf60d56e05 sdhci_xenon: Add Marvell 8k compatible string
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:09:35 +00:00
Emmanuel Vadot
44d027bb5d arm64: Add mv_cp110_icu and mv_cp110_gicp
icu is a interrupt concentrator in the CP110 block and gicp
is a gic extension to allow interrupts in the CP block to be turned
into GIC SPI interrupts

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:08:43 +00:00
Emmanuel Vadot
2a3fb901a7 twsi: Clean up marvell part and add support for Marvell 7k/8k
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:05:07 +00:00
Emmanuel Vadot
73450c4a7a arm64: marvell: Add cp110 clock controller support
The cp110 clock controller controls the clocks and gate of the CP110
hardware block.

Every clock/gate are implemented except the NAND clock.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:04:21 +00:00
Emmanuel Vadot
4f3a5b510b arm64: mv_gpio: Add Marvell 8K support
While here put the interrupts setup in it's own function

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:02:57 +00:00
Emmanuel Vadot
e1453c9e4c arm64: marvell: Add driver for Marvell Ap806 System Controller
The first two clocks are for the clusters and their frequencies can be
found reading a register. Then a fixed 1200Mhz clock is present and two
fixed clocks, 'mss' which is 1200 / 6 and 'sdio' which is 1200 / 3.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:01:06 +00:00
Emmanuel Vadot
2d2a085222 arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller
Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl
support.

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:00:05 +00:00
Emmanuel Vadot
75a01d59f4 arm64: Add new SoC type MARVELL_8K
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 21:58:30 +00:00
Emmanuel Vadot
2091650b73 fdt: Add support for simple-mfd bus
Quoting the binding Documentation :

"These devices comprise a nexus for heterogeneous hardware blocks containing
more than one non-unique yet varying hardware functionality."

Reviewed by:	loos
Sponsored by:	Rubicon Communications, LLC ("Netgate")
Differential Revision:	https://reviews.freebsd.org/D17751
2018-12-12 21:56:45 +00:00
Emmanuel Vadot
41dd88513b arm64: allwinner: Fix pwm dtso
Double patched files ended up in the tree

Reported by:	kevans
2018-12-12 21:10:34 +00:00
Emmanuel Vadot
c3c78b0aeb arm64: allwinner: Add DTSO for pwm and r_pwm
Those are both dtso (overlays) for the two pwm controllers found on the A64.
2018-12-12 21:02:22 +00:00
Emmanuel Vadot
277a038d0d arm64: allwinner: Add pwm driver
Add a pwm driver for Allwinner PWM
Add pwm and aw_pwm to the GENERIC kernel
2018-12-12 20:58:43 +00:00
Emmanuel Vadot
9312900f6d Add a pwm subsystem so we can configure pwm controller from kernel and userland.
The pwm subsystem consist of API for PWM controllers, pwmbus to register them
and a pwm(8) utility to talk to them from userland.

Reviewed by:	oshgobo (capsicum), bcr (manpage), 0mp (manpage)
Differential Revision:	https://reviews.freebsd.org/D17938
2018-12-12 20:56:56 +00:00
Maxim Sobolev
9b5ada0b59 Add NETGRAPH_CHECKSUM.
MFC after:	1 week
2018-12-12 20:40:01 +00:00