Commit Graph

4 Commits

Author SHA1 Message Date
Adrian Chadd
fda21122d0 Add some debugging and comments about what's going on when reinitialising
the FIFO.

I still see some corner cases where no RX occurs when it should be
occuring.  It's quite possible that there's a subtle race condition
somewhere; or maybe I'm not programming the RX queues right.

There's also no locking here yet, so any reset/configuration path
state change (ie, enabling/disabling receive from the ioctl, net80211
taskqueue, etc) could quite possibly confuse things.
2012-07-10 07:45:47 +00:00
Adrian Chadd
62206b7681 Add/fix EDMA RX behaviour.
* For now, kickpcu should hopefully just do nothing - the PCU doesn't need
  'kicking' for Osprey and later NICs. The PCU will just restart once
  the next FIFO entry is pushed in.

* Teach "proc" about "dosched", so it can be used to just flush the
  FIFO contents without adding new FIFO entries.

* .. and now, implement the RX "flush" routine.

* Re-initialise the FIFO contents if the FIFO is empty (the DP is NULL.)
  When PCU RX is disabled (ie, writing RX_D to the RX configuration
  register) then the FIFO will be completely emptied.  If the software FIFO
  is full, then no further descriptors are pushed into the FIFO and
  things stall.

This all requires much, much more thorough stress testing.
2012-07-10 06:05:42 +00:00
Adrian Chadd
99e8d8c3bb Implement EDMA RX for AR93xx and later chips.
This is inspired by ath9k and the reference driver, but it's a new
implementation of the RX FIFO handling.

This has some issues - notably the FIFO needs to be reprogrammed when
the chip is reset.
2012-07-10 00:08:39 +00:00
Adrian Chadd
f8cc9b09b0 Begin abstracting out the RX path in preparation for RX EDMA support.
The RX EDMA support requires a modified approach to the RX descriptor
handling.

Specifically:

* There's now two RX queues - high and low priority;
* The RX queues are implemented as FIFOs; they're now an array of pointers
  to buffers;
* .. and the RX buffer and descriptor are in the same "buffer", rather than
  being separate.

So to that end, this commit abstracts out most of the RX related functions
from the bulk of the driver.  Notably, the RX DMA/buffer allocation isn't
updated, primarily because I haven't yet fleshed out what it should look
like.

Whilst I'm here, create a set of matching but mostly unimplemented EDMA
stubs.

Tested:

  * AR9280, station mode

TODO:

  * Thorough AP and other mode testing for non-EDMA chips;
  * Figure out how to allocate RX buffers suitable for RX EDMA, including
    correctly setting the mbuf length to compensate for the RX descriptor
    and completion status area.
2012-07-03 06:59:12 +00:00