196 lines
3.0 KiB
Plaintext
196 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Kingfisher (ULCB extension) board
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*
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* Copyright (C) 2017 Renesas Electronics Corp.
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* Copyright (C) 2017 Cogent Embedded, Inc.
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*/
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/ {
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aliases {
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serial1 = &hscif0;
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serial2 = &scif1;
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};
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&can1 {
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pinctrl-0 = <&can1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&ehci0 {
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dr_mode = "otg";
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status = "okay";
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};
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&hscif0 {
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pinctrl-0 = <&hscif0_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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status = "okay";
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};
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&hsusb {
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dr_mode = "otg";
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status = "okay";
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};
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&i2c2 {
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gpio_exp_74: gpio@74 {
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compatible = "ti,tca9539";
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reg = <0x74>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio6>;
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interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
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hub_pwen {
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gpio-hog;
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gpios = <6 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "HUB pwen";
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};
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hub_rst {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "HUB rst";
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};
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otg_offvbusn {
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gpio-hog;
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gpios = <8 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "OTG OFFVBUSn";
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};
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otg_extlpn {
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gpio-hog;
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gpios = <9 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "OTG EXTLPn";
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};
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};
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gpio_exp_75: gpio@75 {
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compatible = "ti,tca9539";
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reg = <0x75>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio6>;
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interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
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};
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i2cswitch2: i2c-switch@71 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x71>;
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reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
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};
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};
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&i2c4 {
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gpio_exp_76: gpio@76 {
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compatible = "ti,tca9539";
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reg = <0x76>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio7>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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};
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gpio_exp_77: gpio@77 {
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compatible = "ti,tca9539";
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reg = <0x77>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio5>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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};
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i2cswitch4: i2c-switch@71 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x71>;
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reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
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};
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};
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&ohci0 {
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dr_mode = "otg";
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status = "okay";
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};
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&pcie_bus_clk {
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clock-frequency = <100000000>;
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};
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&pciec0 {
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status = "okay";
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};
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&pciec1 {
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status = "okay";
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};
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&pfc {
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can0_pins: can0 {
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groups = "can0_data_a";
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function = "can0";
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};
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can1_pins: can1 {
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groups = "can1_data";
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function = "can1";
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};
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hscif0_pins: hscif0 {
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groups = "hscif0_data", "hscif0_ctrl";
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function = "hscif0";
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};
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scif1_pins: scif1 {
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groups = "scif1_data_b", "scif1_ctrl";
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function = "scif1";
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};
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usb0_pins: usb0 {
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groups = "usb0";
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function = "usb0";
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};
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};
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&scif1 {
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pinctrl-0 = <&scif1_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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status = "okay";
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};
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&usb2_phy0 {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&xhci0 {
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status = "okay";
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};
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