aa3ea612be
Reviewed by: jhb Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D29529
254 lines
6.2 KiB
ArmAsm
254 lines
6.2 KiB
ArmAsm
/*-
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* Copyright (c) 1989, 1990 William F. Jolitz.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2014-2018 The FreeBSD Foundation
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* All rights reserved.
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*
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* Portions of this software were developed by
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* Konstantin Belousov <kib@FreeBSD.org> under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $FreeBSD$
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*/
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/*
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* Interrupt entry points for external interrupts triggered by I/O APICs
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* as well as IPI handlers.
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*/
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#include "opt_smp.h"
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#include "assym.inc"
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#include <machine/asmacros.h>
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#include <machine/specialreg.h>
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#include <x86/apicreg.h>
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#ifdef SMP
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#define LK lock ;
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#else
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#define LK
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#endif
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.text
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SUPERALIGN_TEXT
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/* End Of Interrupt to APIC */
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as_lapic_eoi:
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cmpl $0,x2apic_mode
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jne 1f
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movq lapic_map,%rax
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movl $0,LA_EOI(%rax)
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ret
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1:
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movl $MSR_APIC_EOI,%ecx
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xorl %eax,%eax
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xorl %edx,%edx
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wrmsr
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ret
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/*
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* I/O Interrupt Entry Point. Rather than having one entry point for
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* each interrupt source, we use one entry point for each 32-bit word
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* in the ISR. The handler determines the highest bit set in the ISR,
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* translates that into a vector, and passes the vector to the
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* lapic_handle_intr() function.
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*/
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.macro ISR_VEC index, vec_name
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INTR_HANDLER \vec_name
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cmpl $0,x2apic_mode
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je 1f
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movl $(MSR_APIC_ISR0 + \index),%ecx
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rdmsr
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jmp 2f
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1:
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movq lapic_map, %rdx /* pointer to local APIC */
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movl LA_ISR + 16 * (\index)(%rdx), %eax /* load ISR */
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2:
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bsrl %eax, %eax /* index of highest set bit in ISR */
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jz 3f
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addl $(32 * \index),%eax
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movq %rsp, %rsi
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movl %eax, %edi /* pass the IRQ */
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call lapic_handle_intr
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3:
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jmp doreti
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.endm
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/*
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* Handle "spurious INTerrupts".
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* Notes:
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* This is different than the "spurious INTerrupt" generated by an
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* 8259 PIC for missing INTs. See the APIC documentation for details.
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* This routine should NOT do an 'EOI' cycle.
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*/
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.text
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SUPERALIGN_TEXT
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IDTVEC(spuriousint)
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/* No EOI cycle used here */
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jmp doreti_iret
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ISR_VEC 1, apic_isr1
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ISR_VEC 2, apic_isr2
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ISR_VEC 3, apic_isr3
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ISR_VEC 4, apic_isr4
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ISR_VEC 5, apic_isr5
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ISR_VEC 6, apic_isr6
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ISR_VEC 7, apic_isr7
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/*
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* Local APIC periodic timer handler.
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*/
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INTR_HANDLER timerint
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movq %rsp, %rdi
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call lapic_handle_timer
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jmp doreti
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/*
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* Local APIC CMCI handler.
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*/
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INTR_HANDLER cmcint
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call lapic_handle_cmc
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jmp doreti
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/*
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* Local APIC error interrupt handler.
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*/
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INTR_HANDLER errorint
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call lapic_handle_error
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jmp doreti
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#ifdef XENHVM
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/*
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* Xen event channel upcall interrupt handler.
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* Only used when the hypervisor supports direct vector callbacks.
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*/
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INTR_HANDLER xen_intr_upcall
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movq %rsp, %rdi
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call xen_intr_handle_upcall
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jmp doreti
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#endif
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#ifdef SMP
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/*
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* Global address space TLB shootdown.
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*/
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.text
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SUPERALIGN_TEXT
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/*
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* IPI handler for cache and TLB shootdown
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*/
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INTR_HANDLER invlop
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call invlop_handler
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call as_lapic_eoi
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jmp ld_regs
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/*
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* Handler for IPIs sent via the per-cpu IPI bitmap.
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*/
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INTR_HANDLER ipi_intr_bitmap_handler
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call as_lapic_eoi
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call ipi_bitmap_handler
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jmp doreti
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/*
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* Executed by a CPU when it receives an IPI_STOP from another CPU.
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*/
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INTR_HANDLER cpustop
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call as_lapic_eoi
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call cpustop_handler
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jmp doreti
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/*
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* Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
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*/
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INTR_HANDLER cpususpend
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call cpususpend_handler
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call as_lapic_eoi
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jmp doreti
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/*
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* Executed by a CPU when it receives an IPI_SWI.
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*/
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INTR_HANDLER ipi_swi
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call as_lapic_eoi
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call ipi_swi_handler
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jmp doreti
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/*
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* Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
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*
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* - Calls the generic rendezvous action function.
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*/
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INTR_HANDLER rendezvous
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#ifdef COUNT_IPIS
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movl PCPU(CPUID), %eax
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movq ipi_rendezvous_counts(,%rax,8), %rax
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incq (%rax)
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#endif
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call smp_rendezvous_action
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call as_lapic_eoi
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jmp doreti
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/*
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* IPI handler whose purpose is to interrupt the CPU with minimum overhead.
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* This is used by bhyve to force a host cpu executing in guest context to
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* trap into the hypervisor.
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*
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* This handler is different from other IPI handlers in the following aspects:
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*
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* 1. It doesn't push a trapframe on the stack.
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*
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* This implies that a DDB backtrace involving 'justreturn' will skip the
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* function that was interrupted by this handler.
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*
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* 2. It doesn't 'swapgs' when userspace is interrupted.
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*
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* The 'justreturn' handler does not access any pcpu data so it is not an
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* issue. Moreover the 'justreturn' handler can only be interrupted by an NMI
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* whose handler already doesn't trust GS.base when kernel code is interrupted.
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*/
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.text
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SUPERALIGN_TEXT
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IDTVEC(justreturn)
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pushq %rax
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pushq %rcx
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pushq %rdx
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call as_lapic_eoi
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popq %rdx
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popq %rcx
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popq %rax
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jmp doreti_iret
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INTR_HANDLER justreturn1
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call as_lapic_eoi
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jmp doreti
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#endif /* SMP */
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