718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
629 lines
18 KiB
C
629 lines
18 KiB
C
/* $FreeBSD$ */
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2004, 2005
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* Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#define IWI_CMD_RING_COUNT 16
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#define IWI_TX_RING_COUNT 64
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#define IWI_RX_RING_COUNT 32
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#define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc))
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#define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc))
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#define IWI_CSR_INTR 0x0008
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#define IWI_CSR_INTR_MASK 0x000c
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#define IWI_CSR_INDIRECT_ADDR 0x0010
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#define IWI_CSR_INDIRECT_DATA 0x0014
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#define IWI_CSR_AUTOINC_ADDR 0x0018
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#define IWI_CSR_AUTOINC_DATA 0x001c
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#define IWI_CSR_RST 0x0020
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#define IWI_CSR_CTL 0x0024
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#define IWI_CSR_IO 0x0030
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#define IWI_CSR_CMD_BASE 0x0200
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#define IWI_CSR_CMD_SIZE 0x0204
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#define IWI_CSR_TX1_BASE 0x0208
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#define IWI_CSR_TX1_SIZE 0x020c
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#define IWI_CSR_TX2_BASE 0x0210
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#define IWI_CSR_TX2_SIZE 0x0214
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#define IWI_CSR_TX3_BASE 0x0218
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#define IWI_CSR_TX3_SIZE 0x021c
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#define IWI_CSR_TX4_BASE 0x0220
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#define IWI_CSR_TX4_SIZE 0x0224
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#define IWI_CSR_CMD_RIDX 0x0280
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#define IWI_CSR_TX1_RIDX 0x0284
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#define IWI_CSR_TX2_RIDX 0x0288
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#define IWI_CSR_TX3_RIDX 0x028c
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#define IWI_CSR_TX4_RIDX 0x0290
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#define IWI_CSR_RX_RIDX 0x02a0
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#define IWI_CSR_RX_BASE 0x0500
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#define IWI_CSR_TABLE0_SIZE 0x0700
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#define IWI_CSR_TABLE0_BASE 0x0704
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#define IWI_CSR_NODE_BASE 0x0c0c
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#define IWI_CSR_CMD_WIDX 0x0f80
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#define IWI_CSR_TX1_WIDX 0x0f84
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#define IWI_CSR_TX2_WIDX 0x0f88
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#define IWI_CSR_TX3_WIDX 0x0f8c
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#define IWI_CSR_TX4_WIDX 0x0f90
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#define IWI_CSR_RX_WIDX 0x0fa0
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#define IWI_CSR_READ_INT 0x0ff4
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/* aliases */
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#define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE
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/* flags for IWI_CSR_INTR */
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#define IWI_INTR_RX_DONE 0x00000002
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#define IWI_INTR_CMD_DONE 0x00000800
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#define IWI_INTR_TX1_DONE 0x00001000
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#define IWI_INTR_TX2_DONE 0x00002000
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#define IWI_INTR_TX3_DONE 0x00004000
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#define IWI_INTR_TX4_DONE 0x00008000
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#define IWI_INTR_FW_INITED 0x01000000
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#define IWI_INTR_RADIO_OFF 0x04000000
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#define IWI_INTR_FATAL_ERROR 0x40000000
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#define IWI_INTR_PARITY_ERROR 0x80000000
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#define IWI_INTR_MASK \
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(IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \
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IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \
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IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \
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IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
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/* flags for IWI_CSR_RST */
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#define IWI_RST_PRINCETON_RESET 0x00000001
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#define IWI_RST_STANDBY 0x00000004
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#define IWI_RST_LED_ACTIVITY 0x00000010 /* tx/rx traffic led */
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#define IWI_RST_LED_ASSOCIATED 0x00000020 /* station associated led */
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#define IWI_RST_LED_OFDM 0x00000040 /* ofdm/cck led */
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#define IWI_RST_SOFT_RESET 0x00000080
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#define IWI_RST_MASTER_DISABLED 0x00000100
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#define IWI_RST_STOP_MASTER 0x00000200
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#define IWI_RST_GATE_ODMA 0x02000000
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#define IWI_RST_GATE_IDMA 0x04000000
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#define IWI_RST_GATE_ADMA 0x20000000
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/* flags for IWI_CSR_CTL */
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#define IWI_CTL_CLOCK_READY 0x00000001
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#define IWI_CTL_ALLOW_STANDBY 0x00000002
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#define IWI_CTL_INIT 0x00000004
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/* flags for IWI_CSR_IO */
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#define IWI_IO_RADIO_ENABLED 0x00010000
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/* flags for IWI_CSR_READ_INT */
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#define IWI_READ_INT_INIT_HOST 0x20000000
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/* constants for command blocks */
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#define IWI_CB_DEFAULT_CTL 0x8cea0000
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#define IWI_CB_MAXDATALEN 8191
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/* supported rates */
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#define IWI_RATE_DS1 10
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#define IWI_RATE_DS2 20
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#define IWI_RATE_DS5 55
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#define IWI_RATE_DS11 110
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#define IWI_RATE_OFDM6 13
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#define IWI_RATE_OFDM9 15
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#define IWI_RATE_OFDM12 5
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#define IWI_RATE_OFDM18 7
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#define IWI_RATE_OFDM24 9
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#define IWI_RATE_OFDM36 11
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#define IWI_RATE_OFDM48 1
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#define IWI_RATE_OFDM54 3
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/*
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* Old version firmware images start with this header,
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* fields are in little endian (le32) format.
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*/
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struct iwi_firmware_ohdr {
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uint32_t version;
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uint32_t mode;
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};
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#define IWI_FW_REQ_MAJOR 2
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#define IWI_FW_REQ_MINOR 4
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#define IWI_FW_GET_MAJOR(ver) ((ver) & 0xff)
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#define IWI_FW_GET_MINOR(ver) (((ver) & 0xff00) >> 8)
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#define IWI_FW_MODE_UCODE 0
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#define IWI_FW_MODE_BOOT 0
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#define IWI_FW_MODE_BSS 0
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#define IWI_FW_MODE_IBSS 1
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#define IWI_FW_MODE_MONITOR 2
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/*
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* New version firmware images contain boot, ucode and firmware
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* all in one chunk. The header at the beginning gives the version
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* and the size of each (sub)image, in le32 format.
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*/
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struct iwi_firmware_hdr {
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uint32_t version; /* version stamp */
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uint32_t bsize; /* size of boot image */
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uint32_t usize; /* size of ucode image */
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uint32_t fsize; /* size of firmware image */
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};
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struct iwi_hdr {
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uint8_t type;
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#define IWI_HDR_TYPE_DATA 0
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#define IWI_HDR_TYPE_COMMAND 1
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#define IWI_HDR_TYPE_NOTIF 3
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#define IWI_HDR_TYPE_FRAME 9
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uint8_t seq;
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uint8_t flags;
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#define IWI_HDR_FLAG_IRQ 0x04
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uint8_t reserved;
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} __packed;
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struct iwi_notif {
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uint32_t reserved[2];
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uint8_t type;
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#define IWI_NOTIF_TYPE_SUCCESS 0
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#define IWI_NOTIF_TYPE_UNSPECIFIED 1 /* unspecified failure */
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#define IWI_NOTIF_TYPE_ASSOCIATION 10
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#define IWI_NOTIF_TYPE_AUTHENTICATION 11
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#define IWI_NOTIF_TYPE_SCAN_CHANNEL 12
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#define IWI_NOTIF_TYPE_SCAN_COMPLETE 13
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#define IWI_NOTIF_TYPE_FRAG_LENGTH 14
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#define IWI_NOTIF_TYPE_LINK_QUALITY 15 /* "link deterioration" */
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#define IWI_NOTIF_TYPE_BEACON 17 /* beacon state, e.g. miss */
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#define IWI_NOTIF_TYPE_TGI_TX_KEY 18 /* WPA transmit key */
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#define IWI_NOTIF_TYPE_CALIBRATION 20
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#define IWI_NOTIF_TYPE_NOISE 25
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uint8_t flags;
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uint16_t len;
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} __packed;
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/* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
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struct iwi_notif_authentication {
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uint8_t state;
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#define IWI_AUTH_FAIL 0
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#define IWI_AUTH_SENT_1 1 /* tx first frame */
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#define IWI_AUTH_RECV_2 2 /* rx second frame */
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#define IWI_AUTH_SEQ1_PASS 3 /* 1st exchange passed */
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#define IWI_AUTH_SEQ1_FAIL 4 /* 1st exchange failed */
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#define IWI_AUTH_SUCCESS 9
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} __packed;
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/* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
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struct iwi_notif_association {
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uint8_t state;
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#define IWI_ASSOC_INIT 0
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#define IWI_ASSOC_SUCCESS 12
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uint8_t pad[11];
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} __packed;
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/* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
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struct iwi_notif_scan_channel {
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uint8_t nchan;
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/* XXX this is iwi_cmd_stats, and a u8 reserved field */
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uint8_t reserved[47];
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} __packed;
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/* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
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struct iwi_notif_scan_complete {
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uint8_t type;
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uint8_t nchan;
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uint8_t status;
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uint8_t reserved;
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} __packed;
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/* structure for notification IWI_NOTIF_TYPE_BEACON */
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struct iwi_notif_beacon_state {
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uint32_t state;
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#define IWI_BEACON_MISS 1
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uint32_t number;
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} __packed;
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/* structure(s) for notification IWI_NOTIF_TYPE_LINK_QUALITY */
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#define RX_FREE_BUFFERS 32
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#define RX_LOW_WATERMARK 8
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#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
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#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
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#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
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// Used for passing to driver number of successes and failures per rate
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struct iwi_rate_histogram {
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union {
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uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
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uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
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uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
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} success;
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union {
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uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
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uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
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uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
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} failed;
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} __packed;
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/* statistics command response */
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struct iwi_cmd_stats {
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uint8_t cmd_id;
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uint8_t seq_num;
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uint16_t good_sfd;
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uint16_t bad_plcp;
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uint16_t wrong_bssid;
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uint16_t valid_mpdu;
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uint16_t bad_mac_header;
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uint16_t reserved_frame_types;
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uint16_t rx_ina;
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uint16_t bad_crc32;
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uint16_t invalid_cts;
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uint16_t invalid_acks;
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uint16_t long_distance_ina_fina;
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uint16_t dsp_silence_unreachable;
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uint16_t accumulated_rssi;
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uint16_t rx_ovfl_frame_tossed;
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uint16_t rssi_silence_threshold;
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uint16_t rx_ovfl_frame_supplied;
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uint16_t last_rx_frame_signal;
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uint16_t last_rx_frame_noise;
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uint16_t rx_autodetec_no_ofdm;
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uint16_t rx_autodetec_no_barker;
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uint16_t reserved;
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} __packed;
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#define SILENCE_OVER_THRESH (1)
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#define SILENCE_UNDER_THRESH (2)
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struct iwi_notif_link_quality {
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struct iwi_cmd_stats stats;
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uint8_t rate;
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uint8_t modulation;
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struct iwi_rate_histogram histogram;
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uint8_t silence_notification_type; /* SILENCE_OVER/UNDER_THRESH */
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uint16_t silence_count;
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} __packed;
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/* received frame header */
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struct iwi_frame {
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uint32_t reserved1[2];
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uint8_t chan;
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uint8_t status;
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uint8_t rate;
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uint8_t rssi;
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uint8_t agc;
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uint8_t rssi_dbm;
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uint16_t signal;
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uint16_t noise;
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uint8_t antenna;
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uint8_t control;
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uint8_t reserved2[2];
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uint16_t len;
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} __packed;
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/* header for transmission */
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struct iwi_tx_desc {
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struct iwi_hdr hdr;
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uint32_t reserved1;
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uint8_t station; /* adhoc sta #, 0 for bss */
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uint8_t reserved2[3];
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uint8_t cmd;
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#define IWI_DATA_CMD_TX 0x0b
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uint8_t seq;
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uint16_t len;
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uint8_t priority;
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uint8_t flags;
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#define IWI_DATA_FLAG_SHPREAMBLE 0x04
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#define IWI_DATA_FLAG_NO_WEP 0x20
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#define IWI_DATA_FLAG_NEED_ACK 0x80
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uint8_t xflags;
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#define IWI_DATA_XFLAG_QOS 0x10
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uint8_t wep_txkey;
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uint8_t wepkey[IEEE80211_KEYBUF_SIZE];
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uint8_t rate;
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uint8_t antenna;
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uint8_t reserved3[10];
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struct ieee80211_qosframe_addr4 wh;
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uint32_t iv;
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uint32_t eiv;
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uint32_t nseg;
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#define IWI_MAX_NSEG 6
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uint32_t seg_addr[IWI_MAX_NSEG];
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uint16_t seg_len[IWI_MAX_NSEG];
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} __packed;
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/* command */
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struct iwi_cmd_desc {
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struct iwi_hdr hdr;
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uint8_t type;
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#define IWI_CMD_ENABLE 2
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#define IWI_CMD_SET_CONFIG 6
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#define IWI_CMD_SET_ESSID 8
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#define IWI_CMD_SET_MAC_ADDRESS 11
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#define IWI_CMD_SET_RTS_THRESHOLD 15
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#define IWI_CMD_SET_FRAG_THRESHOLD 16
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#define IWI_CMD_SET_POWER_MODE 17
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#define IWI_CMD_SET_WEP_KEY 18
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#define IWI_CMD_SCAN 20
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#define IWI_CMD_ASSOCIATE 21
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#define IWI_CMD_SET_RATES 22
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#define IWI_CMD_ABORT_SCAN 23
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#define IWI_CMD_SET_WME_PARAMS 25
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#define IWI_CMD_SCAN_EXT 26
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#define IWI_CMD_SET_OPTIE 31
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#define IWI_CMD_DISABLE 33
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#define IWI_CMD_SET_IV 34
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#define IWI_CMD_SET_TX_POWER 35
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#define IWI_CMD_SET_SENSITIVITY 42
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#define IWI_CMD_SET_WMEIE 84
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uint8_t len;
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uint16_t reserved;
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uint8_t data[120];
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} __packed;
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/* node information (IBSS) */
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struct iwi_ibssnode {
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uint8_t bssid[IEEE80211_ADDR_LEN];
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uint8_t reserved[2];
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} __packed;
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/* constants for 'mode' fields */
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#define IWI_MODE_11A 0
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#define IWI_MODE_11B 1
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#define IWI_MODE_11G 2
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/* possible values for command IWI_CMD_SET_POWER_MODE */
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#define IWI_POWER_MODE_CAM 0 /* no power save */
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#define IWI_POWER_MODE_PSP 3
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#define IWI_POWER_MODE_MAX 5 /* max power save operation */
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/* structure for command IWI_CMD_SET_RATES */
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struct iwi_rateset {
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uint8_t mode;
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uint8_t nrates;
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uint8_t type;
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#define IWI_RATESET_TYPE_NEGOTIATED 0
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#define IWI_RATESET_TYPE_SUPPORTED 1
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uint8_t reserved;
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#define IWI_RATESET_SIZE 12
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uint8_t rates[IWI_RATESET_SIZE];
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} __packed;
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/* structure for command IWI_CMD_SET_TX_POWER */
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struct iwi_txpower {
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uint8_t nchan;
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uint8_t mode;
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struct {
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uint8_t chan;
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uint8_t power;
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#define IWI_TXPOWER_MAX 20
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#define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
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} __packed chan[37];
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} __packed;
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/* structure for command IWI_CMD_ASSOCIATE */
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struct iwi_associate {
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uint8_t chan; /* channel # */
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uint8_t auth; /* type and key */
|
|
#define IWI_AUTH_OPEN 0
|
|
#define IWI_AUTH_SHARED 1
|
|
#define IWI_AUTH_NONE 3
|
|
|
|
uint8_t type; /* request */
|
|
#define IWI_HC_ASSOC 0
|
|
#define IWI_HC_REASSOC 1
|
|
#define IWI_HC_DISASSOC 2
|
|
#define IWI_HC_IBSS_START 3
|
|
#define IWI_HC_IBSS_RECONF 4
|
|
#define IWI_HC_DISASSOC_QUIET 5
|
|
uint8_t reserved;
|
|
uint16_t policy;
|
|
#define IWI_POLICY_WME 1
|
|
#define IWI_POLICY_WPA 2
|
|
|
|
uint8_t plen; /* preamble length */
|
|
uint8_t mode; /* 11a, 11b, or 11g */
|
|
uint8_t bssid[IEEE80211_ADDR_LEN];
|
|
uint8_t tstamp[8]; /* tsf for beacon sync */
|
|
uint16_t capinfo;
|
|
uint16_t lintval; /* listen interval */
|
|
uint16_t intval; /* beacon interval */
|
|
uint8_t dst[IEEE80211_ADDR_LEN];
|
|
uint16_t atim_window;
|
|
uint8_t smr;
|
|
uint8_t reserved1;
|
|
uint16_t reserved2;
|
|
} __packed;
|
|
|
|
#define IWI_SCAN_CHANNELS 54
|
|
|
|
/* structure for command IWI_CMD_SCAN */
|
|
struct iwi_scan {
|
|
uint8_t type;
|
|
uint16_t dwelltime; /* channel dwell time (ms) */
|
|
uint8_t channels[IWI_SCAN_CHANNELS];
|
|
#define IWI_CHAN_5GHZ (0 << 6)
|
|
#define IWI_CHAN_2GHZ (1 << 6)
|
|
|
|
uint8_t reserved[3];
|
|
} __packed;
|
|
|
|
/* scan type codes */
|
|
#define IWI_SCAN_TYPE_PASSIVE_STOP 0 /* passive, stop on first beacon */
|
|
#define IWI_SCAN_TYPE_PASSIVE 1 /* passive, full dwell on channel */
|
|
#define IWI_SCAN_TYPE_DIRECTED 2 /* active, directed probe req */
|
|
#define IWI_SCAN_TYPE_BROADCAST 3 /* active, bcast probe req */
|
|
#define IWI_SCAN_TYPE_BDIRECTED 4 /* active, directed+bcast probe */
|
|
#define IWI_SCAN_TYPES 5
|
|
|
|
/* scan result codes */
|
|
#define IWI_SCAN_COMPLETED 1 /* scan compeleted successfully */
|
|
#define IWI_SCAN_ABORTED 2 /* scan was aborted by the driver */
|
|
|
|
/* structure for command IWI_CMD_SCAN_EXT */
|
|
struct iwi_scan_ext {
|
|
uint32_t full_scan_index;
|
|
uint8_t channels[IWI_SCAN_CHANNELS];
|
|
uint8_t scan_type[IWI_SCAN_CHANNELS / 2];
|
|
uint8_t reserved;
|
|
uint16_t dwell_time[IWI_SCAN_TYPES];
|
|
} __packed;
|
|
|
|
/* structure for command IWI_CMD_SET_CONFIG */
|
|
struct iwi_configuration {
|
|
uint8_t bluetooth_coexistence;
|
|
uint8_t reserved1;
|
|
uint8_t answer_pbreq; /* answer bcast ssid probe req frames */
|
|
uint8_t allow_invalid_frames; /* accept data frames w/ errors */
|
|
uint8_t multicast_enabled; /* accept frames w/ any bssid */
|
|
uint8_t drop_unicast_unencrypted;
|
|
uint8_t disable_unicast_decryption;
|
|
uint8_t drop_multicast_unencrypted;
|
|
uint8_t disable_multicast_decryption;
|
|
uint8_t antenna; /* antenna diversity */
|
|
#define IWI_ANTENNA_AUTO 0 /* firmware selects best antenna */
|
|
#define IWI_ANTENNA_A 1 /* use antenna A only */
|
|
#define IWI_ANTENNA_B 3 /* use antenna B only */
|
|
#define IWI_ANTENNA_SLOWDIV 2 /* slow diversity algorithm */
|
|
uint8_t include_crc; /* include crc in rx'd frames */
|
|
uint8_t use_protection; /* auto-detect 11g operation */
|
|
uint8_t protection_ctsonly; /* use CTS-to-self protection */
|
|
uint8_t enable_multicast_filtering;
|
|
uint8_t bluetooth_threshold; /* collision threshold */
|
|
uint8_t silence_threshold; /* silence over/under threshold */
|
|
uint8_t allow_beacon_and_probe_resp;/* accept frames w/ any bssid */
|
|
uint8_t allow_mgt; /* accept frames w/ any bssid */
|
|
uint8_t noise_reported; /* report noise stats to host */
|
|
uint8_t reserved5;
|
|
} __packed;
|
|
|
|
/* structure for command IWI_CMD_SET_WEP_KEY */
|
|
struct iwi_wep_key {
|
|
uint8_t cmd;
|
|
#define IWI_WEP_KEY_CMD_SETKEY 0x08
|
|
|
|
uint8_t seq;
|
|
uint8_t idx;
|
|
uint8_t len;
|
|
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
|
} __packed;
|
|
|
|
/* structure for command IWI_CMD_SET_WME_PARAMS */
|
|
struct iwi_wme_params {
|
|
uint16_t cwmin[WME_NUM_AC];
|
|
uint16_t cwmax[WME_NUM_AC];
|
|
uint8_t aifsn[WME_NUM_AC];
|
|
uint8_t acm[WME_NUM_AC];
|
|
uint16_t burst[WME_NUM_AC];
|
|
} __packed;
|
|
|
|
/* structure for command IWI_CMD_SET_SENSITIVTY */
|
|
struct iwi_sensitivity {
|
|
uint16_t rssi; /* beacon rssi in dBm */
|
|
#define IWI_RSSI_TO_DBM 112
|
|
uint16_t reserved;
|
|
} __packed;
|
|
|
|
#define IWI_MEM_EEPROM_EVENT 0x00300004
|
|
#define IWI_MEM_EEPROM_CTL 0x00300040
|
|
|
|
#define IWI_EEPROM_MAC 0x21
|
|
#define IWI_EEPROM_NIC 0x25 /* nic type (lsb) */
|
|
#define IWI_EEPROM_SKU 0x25 /* nic type (msb) */
|
|
|
|
#define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
|
|
|
|
#define IWI_EEPROM_C (1 << 0) /* Serial Clock */
|
|
#define IWI_EEPROM_S (1 << 1) /* Chip Select */
|
|
#define IWI_EEPROM_D (1 << 2) /* Serial data input */
|
|
#define IWI_EEPROM_Q (1 << 4) /* Serial data output */
|
|
|
|
#define IWI_EEPROM_SHIFT_D 2
|
|
#define IWI_EEPROM_SHIFT_Q 4
|
|
|
|
/*
|
|
* control and status registers access macros
|
|
*/
|
|
#define CSR_READ_1(sc, reg) \
|
|
bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
|
|
|
|
#define CSR_READ_2(sc, reg) \
|
|
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
|
|
|
|
#define CSR_READ_4(sc, reg) \
|
|
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
|
|
|
|
#define CSR_READ_REGION_4(sc, offset, datap, count) \
|
|
bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
|
|
(datap), (count))
|
|
|
|
#define CSR_WRITE_1(sc, reg, val) \
|
|
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
|
|
|
#define CSR_WRITE_2(sc, reg, val) \
|
|
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
|
|
|
#define CSR_WRITE_4(sc, reg, val) \
|
|
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
|
|
|
#define CSR_WRITE_REGION_1(sc, offset, datap, count) \
|
|
bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
|
|
(datap), (count))
|
|
|
|
/*
|
|
* indirect memory space access macros
|
|
*/
|
|
#define MEM_WRITE_1(sc, addr, val) do { \
|
|
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
|
CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
|
} while (/* CONSTCOND */0)
|
|
|
|
#define MEM_WRITE_2(sc, addr, val) do { \
|
|
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
|
CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
|
} while (/* CONSTCOND */0)
|
|
|
|
#define MEM_WRITE_4(sc, addr, val) do { \
|
|
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
|
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
|
} while (/* CONSTCOND */0)
|
|
|
|
#define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
|
|
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
|
CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
|
|
} while (/* CONSTCOND */0)
|
|
|
|
/*
|
|
* EEPROM access macro
|
|
*/
|
|
#define IWI_EEPROM_CTL(sc, val) do { \
|
|
MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
|
|
DELAY(IWI_EEPROM_DELAY); \
|
|
} while (/* CONSTCOND */0)
|