fd053fae73
hardclock() tick should be run on every active CPU, or on only one. On my tests, avoiding extra interrupts because of this on 8-CPU Core i7 system with HZ=10000 saves about 2% of performance. At this moment option implemented only for global timers, as reprogramming per-CPU timers is too expensive now to be compensated by this benefit, especially since we still have to regularly run hardclock() on at least one active CPU to update system uptime. For global timer it is quite trivial: timer runs always, but we just skip IPIs to other CPUs when possible. Option is enabled by default now, keeping previous behavior, as periodic hardclock() calls are still used at least to implement setitimer(2) with ITIMER_VIRTUAL and ITIMER_PROF arguments. But since default schedulers don't depend on it since r232917, we are much more free to experiment with it. MFC after: 1 month
972 lines
24 KiB
C
972 lines
24 KiB
C
/*-
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* Copyright (c) 2010-2012 Alexander Motin <mav@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Common routines to manage event timers hardware.
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*/
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#include "opt_device_polling.h"
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#include "opt_kdtrace.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/kdb.h>
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#include <sys/ktr.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/kernel.h>
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#include <sys/sched.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <machine/atomic.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/smp.h>
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#ifdef KDTRACE_HOOKS
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#include <sys/dtrace_bsd.h>
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cyclic_clock_func_t cyclic_clock_func = NULL;
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#endif
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int cpu_can_deep_sleep = 0; /* C3 state is available. */
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int cpu_disable_deep_sleep = 0; /* Timer dies in C3. */
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static void setuptimer(void);
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static void loadtimer(struct bintime *now, int first);
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static int doconfigtimer(void);
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static void configtimer(int start);
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static int round_freq(struct eventtimer *et, int freq);
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static void getnextcpuevent(struct bintime *event, int idle);
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static void getnextevent(struct bintime *event);
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static int handleevents(struct bintime *now, int fake);
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#ifdef SMP
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static void cpu_new_callout(int cpu, int ticks);
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#endif
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static struct mtx et_hw_mtx;
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#define ET_HW_LOCK(state) \
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{ \
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if (timer->et_flags & ET_FLAGS_PERCPU) \
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mtx_lock_spin(&(state)->et_hw_mtx); \
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else \
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mtx_lock_spin(&et_hw_mtx); \
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}
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#define ET_HW_UNLOCK(state) \
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{ \
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if (timer->et_flags & ET_FLAGS_PERCPU) \
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mtx_unlock_spin(&(state)->et_hw_mtx); \
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else \
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mtx_unlock_spin(&et_hw_mtx); \
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}
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static struct eventtimer *timer = NULL;
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static struct bintime timerperiod; /* Timer period for periodic mode. */
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static struct bintime hardperiod; /* hardclock() events period. */
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static struct bintime statperiod; /* statclock() events period. */
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static struct bintime profperiod; /* profclock() events period. */
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static struct bintime nexttick; /* Next global timer tick time. */
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static struct bintime nexthard; /* Next global hardlock() event. */
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static u_int busy = 0; /* Reconfiguration is in progress. */
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static int profiling = 0; /* Profiling events enabled. */
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static char timername[32]; /* Wanted timer. */
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TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername));
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static int singlemul = 0; /* Multiplier for periodic mode. */
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TUNABLE_INT("kern.eventtimer.singlemul", &singlemul);
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SYSCTL_INT(_kern_eventtimer, OID_AUTO, singlemul, CTLFLAG_RW, &singlemul,
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0, "Multiplier for periodic mode");
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static u_int idletick = 0; /* Run periodic events when idle. */
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TUNABLE_INT("kern.eventtimer.idletick", &idletick);
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SYSCTL_UINT(_kern_eventtimer, OID_AUTO, idletick, CTLFLAG_RW, &idletick,
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0, "Run periodic events when idle");
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static u_int activetick = 1; /* Run all periodic events when active. */
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TUNABLE_INT("kern.eventtimer.activetick", &activetick);
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SYSCTL_UINT(_kern_eventtimer, OID_AUTO, activetick, CTLFLAG_RW, &activetick,
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0, "Run all periodic events when active");
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static int periodic = 0; /* Periodic or one-shot mode. */
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static int want_periodic = 0; /* What mode to prefer. */
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TUNABLE_INT("kern.eventtimer.periodic", &want_periodic);
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struct pcpu_state {
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struct mtx et_hw_mtx; /* Per-CPU timer mutex. */
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u_int action; /* Reconfiguration requests. */
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u_int handle; /* Immediate handle resuests. */
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struct bintime now; /* Last tick time. */
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struct bintime nextevent; /* Next scheduled event on this CPU. */
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struct bintime nexttick; /* Next timer tick time. */
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struct bintime nexthard; /* Next hardlock() event. */
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struct bintime nextstat; /* Next statclock() event. */
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struct bintime nextprof; /* Next profclock() event. */
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#ifdef KDTRACE_HOOKS
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struct bintime nextcyc; /* Next OpenSolaris cyclics event. */
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#endif
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int ipi; /* This CPU needs IPI. */
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int idle; /* This CPU is in idle mode. */
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};
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static DPCPU_DEFINE(struct pcpu_state, timerstate);
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#define FREQ2BT(freq, bt) \
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{ \
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(bt)->sec = 0; \
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(bt)->frac = ((uint64_t)0x8000000000000000 / (freq)) << 1; \
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}
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#define BT2FREQ(bt) \
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(((uint64_t)0x8000000000000000 + ((bt)->frac >> 2)) / \
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((bt)->frac >> 1))
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/*
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* Timer broadcast IPI handler.
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*/
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int
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hardclockintr(void)
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{
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struct bintime now;
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struct pcpu_state *state;
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int done;
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if (doconfigtimer() || busy)
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return (FILTER_HANDLED);
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state = DPCPU_PTR(timerstate);
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now = state->now;
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CTR4(KTR_SPARE2, "ipi at %d: now %d.%08x%08x",
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curcpu, now.sec, (unsigned int)(now.frac >> 32),
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(unsigned int)(now.frac & 0xffffffff));
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done = handleevents(&now, 0);
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return (done ? FILTER_HANDLED : FILTER_STRAY);
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}
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/*
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* Handle all events for specified time on this CPU
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*/
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static int
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handleevents(struct bintime *now, int fake)
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{
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struct bintime t;
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struct trapframe *frame;
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struct pcpu_state *state;
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uintfptr_t pc;
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int usermode;
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int done, runs;
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CTR4(KTR_SPARE2, "handle at %d: now %d.%08x%08x",
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curcpu, now->sec, (unsigned int)(now->frac >> 32),
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(unsigned int)(now->frac & 0xffffffff));
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done = 0;
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if (fake) {
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frame = NULL;
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usermode = 0;
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pc = 0;
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} else {
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frame = curthread->td_intr_frame;
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usermode = TRAPF_USERMODE(frame);
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pc = TRAPF_PC(frame);
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}
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state = DPCPU_PTR(timerstate);
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runs = 0;
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while (bintime_cmp(now, &state->nexthard, >=)) {
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bintime_add(&state->nexthard, &hardperiod);
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runs++;
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}
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if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 &&
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bintime_cmp(&state->nexthard, &nexthard, >))
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nexthard = state->nexthard;
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if (runs && fake < 2) {
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hardclock_cnt(runs, usermode);
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done = 1;
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}
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runs = 0;
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while (bintime_cmp(now, &state->nextstat, >=)) {
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bintime_add(&state->nextstat, &statperiod);
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runs++;
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}
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if (runs && fake < 2) {
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statclock_cnt(runs, usermode);
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done = 1;
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}
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if (profiling) {
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runs = 0;
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while (bintime_cmp(now, &state->nextprof, >=)) {
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bintime_add(&state->nextprof, &profperiod);
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runs++;
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}
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if (runs && !fake) {
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profclock_cnt(runs, usermode, pc);
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done = 1;
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}
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} else
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state->nextprof = state->nextstat;
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#ifdef KDTRACE_HOOKS
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if (fake == 0 && cyclic_clock_func != NULL &&
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state->nextcyc.sec != -1 &&
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bintime_cmp(now, &state->nextcyc, >=)) {
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state->nextcyc.sec = -1;
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(*cyclic_clock_func)(frame);
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}
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#endif
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getnextcpuevent(&t, 0);
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if (fake == 2) {
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state->nextevent = t;
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return (done);
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}
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ET_HW_LOCK(state);
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if (!busy) {
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state->idle = 0;
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state->nextevent = t;
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loadtimer(now, 0);
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}
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ET_HW_UNLOCK(state);
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return (done);
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}
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/*
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* Schedule binuptime of the next event on current CPU.
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*/
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static void
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getnextcpuevent(struct bintime *event, int idle)
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{
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struct bintime tmp;
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struct pcpu_state *state;
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int skip;
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state = DPCPU_PTR(timerstate);
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/* Handle hardclock() events. */
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*event = state->nexthard;
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if (idle || (!activetick && !profiling &&
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(timer->et_flags & ET_FLAGS_PERCPU) == 0)) {
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skip = idle ? 4 : (stathz / 2);
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if (curcpu == CPU_FIRST() && tc_min_ticktock_freq > skip)
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skip = tc_min_ticktock_freq;
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skip = callout_tickstofirst(hz / skip) - 1;
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CTR2(KTR_SPARE2, "skip at %d: %d", curcpu, skip);
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tmp = hardperiod;
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bintime_mul(&tmp, skip);
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bintime_add(event, &tmp);
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}
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if (!idle) { /* If CPU is active - handle other types of events. */
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if (bintime_cmp(event, &state->nextstat, >))
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*event = state->nextstat;
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if (profiling && bintime_cmp(event, &state->nextprof, >))
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*event = state->nextprof;
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}
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#ifdef KDTRACE_HOOKS
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if (state->nextcyc.sec != -1 && bintime_cmp(event, &state->nextcyc, >))
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*event = state->nextcyc;
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#endif
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}
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/*
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* Schedule binuptime of the next event on all CPUs.
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*/
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static void
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getnextevent(struct bintime *event)
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{
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struct pcpu_state *state;
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#ifdef SMP
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int cpu;
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#endif
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int c, nonidle;
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state = DPCPU_PTR(timerstate);
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*event = state->nextevent;
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c = curcpu;
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nonidle = !state->idle;
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if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
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#ifdef SMP
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CPU_FOREACH(cpu) {
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if (curcpu == cpu)
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continue;
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state = DPCPU_ID_PTR(cpu, timerstate);
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nonidle += !state->idle;
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if (bintime_cmp(event, &state->nextevent, >)) {
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*event = state->nextevent;
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c = cpu;
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}
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}
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#endif
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if (nonidle != 0 && bintime_cmp(event, &nexthard, >))
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*event = nexthard;
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}
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CTR5(KTR_SPARE2, "next at %d: next %d.%08x%08x by %d",
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curcpu, event->sec, (unsigned int)(event->frac >> 32),
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(unsigned int)(event->frac & 0xffffffff), c);
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}
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/* Hardware timer callback function. */
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static void
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timercb(struct eventtimer *et, void *arg)
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{
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struct bintime now;
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struct bintime *next;
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struct pcpu_state *state;
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#ifdef SMP
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int cpu, bcast;
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#endif
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/* Do not touch anything if somebody reconfiguring timers. */
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if (busy)
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return;
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/* Update present and next tick times. */
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state = DPCPU_PTR(timerstate);
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if (et->et_flags & ET_FLAGS_PERCPU) {
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next = &state->nexttick;
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} else
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next = &nexttick;
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if (periodic) {
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now = *next; /* Ex-next tick time becomes present time. */
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bintime_add(next, &timerperiod); /* Next tick in 1 period. */
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} else {
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binuptime(&now); /* Get present time from hardware. */
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next->sec = -1; /* Next tick is not scheduled yet. */
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}
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state->now = now;
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CTR4(KTR_SPARE2, "intr at %d: now %d.%08x%08x",
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curcpu, now.sec, (unsigned int)(now.frac >> 32),
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(unsigned int)(now.frac & 0xffffffff));
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|
|
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#ifdef SMP
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/* Prepare broadcasting to other CPUs for non-per-CPU timers. */
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bcast = 0;
|
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if ((et->et_flags & ET_FLAGS_PERCPU) == 0 && smp_started) {
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CPU_FOREACH(cpu) {
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state = DPCPU_ID_PTR(cpu, timerstate);
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ET_HW_LOCK(state);
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state->now = now;
|
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if (bintime_cmp(&now, &state->nextevent, >=)) {
|
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state->nextevent.sec++;
|
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if (curcpu != cpu) {
|
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state->ipi = 1;
|
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bcast = 1;
|
|
}
|
|
}
|
|
ET_HW_UNLOCK(state);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* Handle events for this time on this CPU. */
|
|
handleevents(&now, 0);
|
|
|
|
#ifdef SMP
|
|
/* Broadcast interrupt to other CPUs for non-per-CPU timers. */
|
|
if (bcast) {
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CPU_FOREACH(cpu) {
|
|
if (curcpu == cpu)
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continue;
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
if (state->ipi) {
|
|
state->ipi = 0;
|
|
ipi_cpu(cpu, IPI_HARDCLOCK);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Load new value into hardware timer.
|
|
*/
|
|
static void
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|
loadtimer(struct bintime *now, int start)
|
|
{
|
|
struct pcpu_state *state;
|
|
struct bintime new;
|
|
struct bintime *next;
|
|
uint64_t tmp;
|
|
int eq;
|
|
|
|
if (timer->et_flags & ET_FLAGS_PERCPU) {
|
|
state = DPCPU_PTR(timerstate);
|
|
next = &state->nexttick;
|
|
} else
|
|
next = &nexttick;
|
|
if (periodic) {
|
|
if (start) {
|
|
/*
|
|
* Try to start all periodic timers aligned
|
|
* to period to make events synchronous.
|
|
*/
|
|
tmp = ((uint64_t)now->sec << 36) + (now->frac >> 28);
|
|
tmp = (tmp % (timerperiod.frac >> 28)) << 28;
|
|
new.sec = 0;
|
|
new.frac = timerperiod.frac - tmp;
|
|
if (new.frac < tmp) /* Left less then passed. */
|
|
bintime_add(&new, &timerperiod);
|
|
CTR5(KTR_SPARE2, "load p at %d: now %d.%08x first in %d.%08x",
|
|
curcpu, now->sec, (unsigned int)(now->frac >> 32),
|
|
new.sec, (unsigned int)(new.frac >> 32));
|
|
*next = new;
|
|
bintime_add(next, now);
|
|
et_start(timer, &new, &timerperiod);
|
|
}
|
|
} else {
|
|
getnextevent(&new);
|
|
eq = bintime_cmp(&new, next, ==);
|
|
CTR5(KTR_SPARE2, "load at %d: next %d.%08x%08x eq %d",
|
|
curcpu, new.sec, (unsigned int)(new.frac >> 32),
|
|
(unsigned int)(new.frac & 0xffffffff),
|
|
eq);
|
|
if (!eq) {
|
|
*next = new;
|
|
bintime_sub(&new, now);
|
|
et_start(timer, &new, NULL);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Prepare event timer parameters after configuration changes.
|
|
*/
|
|
static void
|
|
setuptimer(void)
|
|
{
|
|
int freq;
|
|
|
|
if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
|
|
periodic = 0;
|
|
else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
|
|
periodic = 1;
|
|
singlemul = MIN(MAX(singlemul, 1), 20);
|
|
freq = hz * singlemul;
|
|
while (freq < (profiling ? profhz : stathz))
|
|
freq += hz;
|
|
freq = round_freq(timer, freq);
|
|
FREQ2BT(freq, &timerperiod);
|
|
}
|
|
|
|
/*
|
|
* Reconfigure specified per-CPU timer on other CPU. Called from IPI handler.
|
|
*/
|
|
static int
|
|
doconfigtimer(void)
|
|
{
|
|
struct bintime now;
|
|
struct pcpu_state *state;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
switch (atomic_load_acq_int(&state->action)) {
|
|
case 1:
|
|
binuptime(&now);
|
|
ET_HW_LOCK(state);
|
|
loadtimer(&now, 1);
|
|
ET_HW_UNLOCK(state);
|
|
state->handle = 0;
|
|
atomic_store_rel_int(&state->action, 0);
|
|
return (1);
|
|
case 2:
|
|
ET_HW_LOCK(state);
|
|
et_stop(timer);
|
|
ET_HW_UNLOCK(state);
|
|
state->handle = 0;
|
|
atomic_store_rel_int(&state->action, 0);
|
|
return (1);
|
|
}
|
|
if (atomic_readandclear_int(&state->handle) && !busy) {
|
|
binuptime(&now);
|
|
handleevents(&now, 0);
|
|
return (1);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Reconfigure specified timer.
|
|
* For per-CPU timers use IPI to make other CPUs to reconfigure.
|
|
*/
|
|
static void
|
|
configtimer(int start)
|
|
{
|
|
struct bintime now, next;
|
|
struct pcpu_state *state;
|
|
int cpu;
|
|
|
|
if (start) {
|
|
setuptimer();
|
|
binuptime(&now);
|
|
}
|
|
critical_enter();
|
|
ET_HW_LOCK(DPCPU_PTR(timerstate));
|
|
if (start) {
|
|
/* Initialize time machine parameters. */
|
|
next = now;
|
|
bintime_add(&next, &timerperiod);
|
|
if (periodic)
|
|
nexttick = next;
|
|
else
|
|
nexttick.sec = -1;
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
state->now = now;
|
|
state->nextevent = next;
|
|
if (periodic)
|
|
state->nexttick = next;
|
|
else
|
|
state->nexttick.sec = -1;
|
|
state->nexthard = next;
|
|
state->nextstat = next;
|
|
state->nextprof = next;
|
|
hardclock_sync(cpu);
|
|
}
|
|
busy = 0;
|
|
/* Start global timer or per-CPU timer of this CPU. */
|
|
loadtimer(&now, 1);
|
|
} else {
|
|
busy = 1;
|
|
/* Stop global timer or per-CPU timer of this CPU. */
|
|
et_stop(timer);
|
|
}
|
|
ET_HW_UNLOCK(DPCPU_PTR(timerstate));
|
|
#ifdef SMP
|
|
/* If timer is global or there is no other CPUs yet - we are done. */
|
|
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || !smp_started) {
|
|
critical_exit();
|
|
return;
|
|
}
|
|
/* Set reconfigure flags for other CPUs. */
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
atomic_store_rel_int(&state->action,
|
|
(cpu == curcpu) ? 0 : ( start ? 1 : 2));
|
|
}
|
|
/* Broadcast reconfigure IPI. */
|
|
ipi_all_but_self(IPI_HARDCLOCK);
|
|
/* Wait for reconfiguration completed. */
|
|
restart:
|
|
cpu_spinwait();
|
|
CPU_FOREACH(cpu) {
|
|
if (cpu == curcpu)
|
|
continue;
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
if (atomic_load_acq_int(&state->action))
|
|
goto restart;
|
|
}
|
|
#endif
|
|
critical_exit();
|
|
}
|
|
|
|
/*
|
|
* Calculate nearest frequency supported by hardware timer.
|
|
*/
|
|
static int
|
|
round_freq(struct eventtimer *et, int freq)
|
|
{
|
|
uint64_t div;
|
|
|
|
if (et->et_frequency != 0) {
|
|
div = lmax((et->et_frequency + freq / 2) / freq, 1);
|
|
if (et->et_flags & ET_FLAGS_POW2DIV)
|
|
div = 1 << (flsl(div + div / 2) - 1);
|
|
freq = (et->et_frequency + div / 2) / div;
|
|
}
|
|
if (et->et_min_period.sec > 0)
|
|
freq = 0;
|
|
else if (et->et_min_period.frac != 0)
|
|
freq = min(freq, BT2FREQ(&et->et_min_period));
|
|
if (et->et_max_period.sec == 0 && et->et_max_period.frac != 0)
|
|
freq = max(freq, BT2FREQ(&et->et_max_period));
|
|
return (freq);
|
|
}
|
|
|
|
/*
|
|
* Configure and start event timers (BSP part).
|
|
*/
|
|
void
|
|
cpu_initclocks_bsp(void)
|
|
{
|
|
struct pcpu_state *state;
|
|
int base, div, cpu;
|
|
|
|
mtx_init(&et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
mtx_init(&state->et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
|
|
#ifdef KDTRACE_HOOKS
|
|
state->nextcyc.sec = -1;
|
|
#endif
|
|
}
|
|
#ifdef SMP
|
|
callout_new_inserted = cpu_new_callout;
|
|
#endif
|
|
periodic = want_periodic;
|
|
/* Grab requested timer or the best of present. */
|
|
if (timername[0])
|
|
timer = et_find(timername, 0, 0);
|
|
if (timer == NULL && periodic) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
|
|
}
|
|
if (timer == NULL) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_ONESHOT, ET_FLAGS_ONESHOT);
|
|
}
|
|
if (timer == NULL && !periodic) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
|
|
}
|
|
if (timer == NULL)
|
|
panic("No usable event timer found!");
|
|
et_init(timer, timercb, NULL, NULL);
|
|
|
|
/* Adapt to timer capabilities. */
|
|
if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
|
|
periodic = 0;
|
|
else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
|
|
periodic = 1;
|
|
if (timer->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_deep_sleep++;
|
|
|
|
/*
|
|
* We honor the requested 'hz' value.
|
|
* We want to run stathz in the neighborhood of 128hz.
|
|
* We would like profhz to run as often as possible.
|
|
*/
|
|
if (singlemul <= 0 || singlemul > 20) {
|
|
if (hz >= 1500 || (hz % 128) == 0)
|
|
singlemul = 1;
|
|
else if (hz >= 750)
|
|
singlemul = 2;
|
|
else
|
|
singlemul = 4;
|
|
}
|
|
if (periodic) {
|
|
base = round_freq(timer, hz * singlemul);
|
|
singlemul = max((base + hz / 2) / hz, 1);
|
|
hz = (base + singlemul / 2) / singlemul;
|
|
if (base <= 128)
|
|
stathz = base;
|
|
else {
|
|
div = base / 128;
|
|
if (div >= singlemul && (div % singlemul) == 0)
|
|
div++;
|
|
stathz = base / div;
|
|
}
|
|
profhz = stathz;
|
|
while ((profhz + stathz) <= 128 * 64)
|
|
profhz += stathz;
|
|
profhz = round_freq(timer, profhz);
|
|
} else {
|
|
hz = round_freq(timer, hz);
|
|
stathz = round_freq(timer, 127);
|
|
profhz = round_freq(timer, stathz * 64);
|
|
}
|
|
tick = 1000000 / hz;
|
|
FREQ2BT(hz, &hardperiod);
|
|
FREQ2BT(stathz, &statperiod);
|
|
FREQ2BT(profhz, &profperiod);
|
|
ET_LOCK();
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Start per-CPU event timers on APs.
|
|
*/
|
|
void
|
|
cpu_initclocks_ap(void)
|
|
{
|
|
struct bintime now;
|
|
struct pcpu_state *state;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
binuptime(&now);
|
|
ET_HW_LOCK(state);
|
|
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 && periodic) {
|
|
state->now = nexttick;
|
|
bintime_sub(&state->now, &timerperiod);
|
|
} else
|
|
state->now = now;
|
|
hardclock_sync(curcpu);
|
|
handleevents(&state->now, 2);
|
|
if (timer->et_flags & ET_FLAGS_PERCPU)
|
|
loadtimer(&now, 1);
|
|
ET_HW_UNLOCK(state);
|
|
}
|
|
|
|
/*
|
|
* Switch to profiling clock rates.
|
|
*/
|
|
void
|
|
cpu_startprofclock(void)
|
|
{
|
|
|
|
ET_LOCK();
|
|
if (periodic) {
|
|
configtimer(0);
|
|
profiling = 1;
|
|
configtimer(1);
|
|
} else
|
|
profiling = 1;
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Switch to regular clock rates.
|
|
*/
|
|
void
|
|
cpu_stopprofclock(void)
|
|
{
|
|
|
|
ET_LOCK();
|
|
if (periodic) {
|
|
configtimer(0);
|
|
profiling = 0;
|
|
configtimer(1);
|
|
} else
|
|
profiling = 0;
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Switch to idle mode (all ticks handled).
|
|
*/
|
|
void
|
|
cpu_idleclock(void)
|
|
{
|
|
struct bintime now, t;
|
|
struct pcpu_state *state;
|
|
|
|
if (idletick || busy ||
|
|
(periodic && (timer->et_flags & ET_FLAGS_PERCPU))
|
|
#ifdef DEVICE_POLLING
|
|
|| curcpu == CPU_FIRST()
|
|
#endif
|
|
)
|
|
return;
|
|
state = DPCPU_PTR(timerstate);
|
|
if (periodic)
|
|
now = state->now;
|
|
else
|
|
binuptime(&now);
|
|
CTR4(KTR_SPARE2, "idle at %d: now %d.%08x%08x",
|
|
curcpu, now.sec, (unsigned int)(now.frac >> 32),
|
|
(unsigned int)(now.frac & 0xffffffff));
|
|
getnextcpuevent(&t, 1);
|
|
ET_HW_LOCK(state);
|
|
state->idle = 1;
|
|
state->nextevent = t;
|
|
if (!periodic)
|
|
loadtimer(&now, 0);
|
|
ET_HW_UNLOCK(state);
|
|
}
|
|
|
|
/*
|
|
* Switch to active mode (skip empty ticks).
|
|
*/
|
|
void
|
|
cpu_activeclock(void)
|
|
{
|
|
struct bintime now;
|
|
struct pcpu_state *state;
|
|
struct thread *td;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
if (state->idle == 0 || busy)
|
|
return;
|
|
if (periodic)
|
|
now = state->now;
|
|
else
|
|
binuptime(&now);
|
|
CTR4(KTR_SPARE2, "active at %d: now %d.%08x%08x",
|
|
curcpu, now.sec, (unsigned int)(now.frac >> 32),
|
|
(unsigned int)(now.frac & 0xffffffff));
|
|
spinlock_enter();
|
|
td = curthread;
|
|
td->td_intr_nesting_level++;
|
|
handleevents(&now, 1);
|
|
td->td_intr_nesting_level--;
|
|
spinlock_exit();
|
|
}
|
|
|
|
#ifdef KDTRACE_HOOKS
|
|
void
|
|
clocksource_cyc_set(const struct bintime *t)
|
|
{
|
|
struct bintime now;
|
|
struct pcpu_state *state;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
if (periodic)
|
|
now = state->now;
|
|
else
|
|
binuptime(&now);
|
|
|
|
CTR4(KTR_SPARE2, "set_cyc at %d: now %d.%08x%08x",
|
|
curcpu, now.sec, (unsigned int)(now.frac >> 32),
|
|
(unsigned int)(now.frac & 0xffffffff));
|
|
CTR4(KTR_SPARE2, "set_cyc at %d: t %d.%08x%08x",
|
|
curcpu, t->sec, (unsigned int)(t->frac >> 32),
|
|
(unsigned int)(t->frac & 0xffffffff));
|
|
|
|
ET_HW_LOCK(state);
|
|
if (bintime_cmp(t, &state->nextcyc, ==)) {
|
|
ET_HW_UNLOCK(state);
|
|
return;
|
|
}
|
|
state->nextcyc = *t;
|
|
if (bintime_cmp(&state->nextcyc, &state->nextevent, >=)) {
|
|
ET_HW_UNLOCK(state);
|
|
return;
|
|
}
|
|
state->nextevent = state->nextcyc;
|
|
if (!periodic)
|
|
loadtimer(&now, 0);
|
|
ET_HW_UNLOCK(state);
|
|
}
|
|
#endif
|
|
|
|
#ifdef SMP
|
|
static void
|
|
cpu_new_callout(int cpu, int ticks)
|
|
{
|
|
struct bintime tmp;
|
|
struct pcpu_state *state;
|
|
|
|
CTR3(KTR_SPARE2, "new co at %d: on %d in %d",
|
|
curcpu, cpu, ticks);
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
ET_HW_LOCK(state);
|
|
if (state->idle == 0 || busy) {
|
|
ET_HW_UNLOCK(state);
|
|
return;
|
|
}
|
|
/*
|
|
* If timer is periodic - just update next event time for target CPU.
|
|
* If timer is global - there is chance it is already programmed.
|
|
*/
|
|
if (periodic || (timer->et_flags & ET_FLAGS_PERCPU) == 0) {
|
|
tmp = hardperiod;
|
|
bintime_mul(&tmp, ticks - 1);
|
|
bintime_add(&tmp, &state->nexthard);
|
|
if (bintime_cmp(&tmp, &state->nextevent, <))
|
|
state->nextevent = tmp;
|
|
if (periodic ||
|
|
bintime_cmp(&state->nextevent, &nexttick, >=)) {
|
|
ET_HW_UNLOCK(state);
|
|
return;
|
|
}
|
|
}
|
|
/*
|
|
* Otherwise we have to wake that CPU up, as we can't get present
|
|
* bintime to reprogram global timer from here. If timer is per-CPU,
|
|
* we by definition can't do it from here.
|
|
*/
|
|
ET_HW_UNLOCK(state);
|
|
if (timer->et_flags & ET_FLAGS_PERCPU) {
|
|
state->handle = 1;
|
|
ipi_cpu(cpu, IPI_HARDCLOCK);
|
|
} else {
|
|
if (!cpu_idle_wakeup(cpu))
|
|
ipi_cpu(cpu, IPI_AST);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Report or change the active event timers hardware.
|
|
*/
|
|
static int
|
|
sysctl_kern_eventtimer_timer(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
char buf[32];
|
|
struct eventtimer *et;
|
|
int error;
|
|
|
|
ET_LOCK();
|
|
et = timer;
|
|
snprintf(buf, sizeof(buf), "%s", et->et_name);
|
|
ET_UNLOCK();
|
|
error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
|
|
ET_LOCK();
|
|
et = timer;
|
|
if (error != 0 || req->newptr == NULL ||
|
|
strcasecmp(buf, et->et_name) == 0) {
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
et = et_find(buf, 0, 0);
|
|
if (et == NULL) {
|
|
ET_UNLOCK();
|
|
return (ENOENT);
|
|
}
|
|
configtimer(0);
|
|
et_free(timer);
|
|
if (et->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_deep_sleep++;
|
|
if (timer->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_deep_sleep--;
|
|
periodic = want_periodic;
|
|
timer = et;
|
|
et_init(timer, timercb, NULL, NULL);
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
SYSCTL_PROC(_kern_eventtimer, OID_AUTO, timer,
|
|
CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE,
|
|
0, 0, sysctl_kern_eventtimer_timer, "A", "Chosen event timer");
|
|
|
|
/*
|
|
* Report or change the active event timer periodicity.
|
|
*/
|
|
static int
|
|
sysctl_kern_eventtimer_periodic(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
int error, val;
|
|
|
|
val = periodic;
|
|
error = sysctl_handle_int(oidp, &val, 0, req);
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
ET_LOCK();
|
|
configtimer(0);
|
|
periodic = want_periodic = val;
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
SYSCTL_PROC(_kern_eventtimer, OID_AUTO, periodic,
|
|
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
|
|
0, 0, sysctl_kern_eventtimer_periodic, "I", "Enable event timer periodic mode");
|