03479763b2
available on firmwares 3.15 and earlier. Caveats: Support for the internal SATA controller is currently missing, as is support for framebuffer resolutions other than 720x480. These deficiencies will be remedied soon. Special thanks to Peter Grehan for providing the hardware that made this port possible, and thanks to Geoff Levand of Sony Computer Entertainment for advice on the LV1 hypervisor.
257 lines
5.0 KiB
ArmAsm
257 lines
5.0 KiB
ArmAsm
/*-
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* Copyright (C) 2010 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* Hypercall stubs. Note: this is all a hack and should die. */
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#define hc .long 0x44000022
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#define LD64_IM(r, highest, higher, high, low) \
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lis r,highest; \
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addi r,r,higher; \
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sldi r,r,32; \
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addis r,r,high; \
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addi r,r,low;
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#define SIMPLE_HVCALL(x, c) \
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.global x; \
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x: \
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mflr %r0; \
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stw %r0,4(%r1); \
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clrldi %r3,%r3,32; \
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clrldi %r4,%r4,32; \
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clrldi %r5,%r5,32; \
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clrldi %r6,%r6,32; \
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clrldi %r7,%r7,32; \
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clrldi %r8,%r8,32; \
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clrldi %r9,%r9,32; \
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clrldi %r10,%r10,32; \
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li %r11,c; \
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hc; \
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extsw %r3,%r3; \
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lwz %r0,4(%r1); \
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mtlr %r0; \
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blr
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SIMPLE_HVCALL(lv1_open_device, 170)
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SIMPLE_HVCALL(lv1_close_device, 171)
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SIMPLE_HVCALL(lv1_gpu_open, 210)
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SIMPLE_HVCALL(lv1_gpu_context_attribute, 225)
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SIMPLE_HVCALL(lv1_panic, 255)
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SIMPLE_HVCALL(lv1_net_start_tx_dma, 187)
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SIMPLE_HVCALL(lv1_net_stop_tx_dma, 188)
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SIMPLE_HVCALL(lv1_net_start_rx_dma, 189)
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SIMPLE_HVCALL(lv1_net_stop_rx_dma, 190)
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.global lv1_get_physmem
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lv1_get_physmem:
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mflr %r0
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stw %r0,4(%r1)
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stw %r3,-8(%r1) /* Address for maxmem */
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li %r11,69 /* Get PU ID */
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hc
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std %r4,-16(%r1)
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li %r11,74 /* Get LPAR ID */
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hc
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std %r4,-24(%r1)
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ld %r3,-24(%r1)
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LD64_IM(%r4,0x0000,0x0000,0x6269,0x0000 /* "bi" */)
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LD64_IM(%r5,0x7075,0x0000,0x0000,0x0000 /* "pu" */)
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ld %r6,-16(%r1)
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LD64_IM(%r7,0x726d,0x5f73,0x697a,0x6500 /* "rm_size" */)
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li %r11,91
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hc
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extsw %r3,%r3
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lwz %r5,-8(%r1)
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std %r4,0(%r5)
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_setup_address_space
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lv1_setup_address_space:
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mflr %r0
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stw %r0,4(%r1)
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stw %r3,-4(%r1)
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stw %r4,-8(%r1)
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li %r3,18 /* PT size: log2(256 KB) */
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li %r4,2 /* Two page sizes */
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li %r5,24 /* Page sizes: (24 << 56) | (16 << 48) */
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sldi %r5,%r5,24
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li %r6,16
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sldi %r6,%r6,16
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or %r5,%r5,%r6
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sldi %r5,%r5,32
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li %r11,2 /* lv1_construct_virtual_address_space */
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hc
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lwz %r6,-4(%r1)
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lwz %r7,-8(%r1)
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std %r4,0(%r6)
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std %r5,0(%r7)
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/* AS_ID in r4 */
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mr %r3,%r4
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li %r11,7 /* lv1_select_virtual_address_space */
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hc
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extsw %r3,%r3
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_insert_pte
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lv1_insert_pte:
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mflr %r0
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stw %r0,4(%r1)
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mr %r11,%r4 /* Save R4 */
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clrldi %r3,%r3,32
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clrldi %r7,%r5,32
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sldi %r4,%r3,3 /* Convert ptegidx into base PTE slot */
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li %r3,0 /* Current address space */
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ld %r5,0(%r11)
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ld %r6,8(%r11)
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li %r8,0 /* No other flags */
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li %r11,158
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hc
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extsw %r3,%r3
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_gpu_context_allocate
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lv1_gpu_context_allocate:
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mflr %r0
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stw %r0,4(%r1)
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stw %r7,-4(%r1)
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sldi %r3,%r3,32
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clrldi %r4,%r4,32
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ori %r3,%r3,%r4
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clrldi %r4,%r5,32
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clrldi %r5,%r6,32
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li %r11,217
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hc
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extsw %r3,%r3
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lwz %r7,-4(%r1)
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std %r4,0(%r7)
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_gpu_memory_allocate
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lv1_gpu_memory_allocate:
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mflr %r0
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stw %r0,4(%r1)
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stw %r8,-4(%r1)
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stw %r9,-8(%r1)
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li %r11,214
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hc
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extsw %r3,%r3
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lwz %r8,-4(%r1)
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lwz %r9,-8(%r1)
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std %r4,0(%r8)
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std %r5,0(%r9)
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_net_control
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lv1_net_control:
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mflr %r0
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stw %r0,4(%r1)
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stw %r9,-4(%r1)
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li %r11,194
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hc
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extsw %r3,%r3
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lwz %r8,-4(%r1)
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std %r4,0(%r8)
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lwz %r0,4(%r1)
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mtlr %r0
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blr
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.global lv1_setup_dma
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lv1_setup_dma:
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mflr %r0
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stw %r0,4(%r1)
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stw %r3,-4(%r1)
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stw %r4,-8(%r1)
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stw %r5,-12(%r1)
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lwz %r3,-4(%r1)
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lwz %r4,-8(%r1)
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lis %r5,0x0800 /* 128 MB */
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li %r6,24 /* log2(IO_PAGESIZE) */
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li %r7,0 /* flags */
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li %r11,174 /* lv1_allocate_device_dma_region */
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hc
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extsw %r3,%r3
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cmpdi %r3,0
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bne 1f
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std %r4,-24(%r1)
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lwz %r3,-4(%r1)
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lwz %r4,-8(%r1)
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li %r5,0
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ld %r6,-24(%r1)
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lis %r7,0x0800 /* 128 MB */
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lis %r8,0xf800 /* flags */
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sldi %r8,%r8,32
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li %r11,176 /* lv1_map_device_dma_region */
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hc
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extsw %r3,%r3
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lwz %r9,-12(%r1)
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ld %r6,-24(%r1)
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std %r6,0(%r9)
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1: lwz %r0,4(%r1)
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mtlr %r0
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blr
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