7330dd0bb4
This is (almost!) enough to actually probe, attach, configure a default port group and do some basic work. It's also totally hard-coded for the Qualcomm Atheros DB120 board - it doesn't yet have any of the code from OpenWRT which parses extra configuration data to know how to program the switch. The LED stuff is also missing. But, it's enough to facilitate board, PHY, switch and VLAN bringup, so I am committing it now. Tested: * Qualcomm Atheros DB120 Obtained from: OpenWRT
92 lines
2.6 KiB
C
92 lines
2.6 KiB
C
/*-
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* Copyright (c) 2014 Adrian Chadd <adrian@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __ARSWITCH_8327_H__
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#define __ARSWITCH_8327_H__
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enum ar8327_pad_mode {
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AR8327_PAD_NC = 0,
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AR8327_PAD_MAC2MAC_MII,
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AR8327_PAD_MAC2MAC_GMII,
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AR8327_PAD_MAC_SGMII,
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AR8327_PAD_MAC2PHY_MII,
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AR8327_PAD_MAC2PHY_GMII,
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AR8327_PAD_MAC_RGMII,
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AR8327_PAD_PHY_GMII,
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AR8327_PAD_PHY_RGMII,
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AR8327_PAD_PHY_MII,
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};
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enum ar8327_clk_delay_sel {
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AR8327_CLK_DELAY_SEL0 = 0,
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AR8327_CLK_DELAY_SEL1,
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AR8327_CLK_DELAY_SEL2,
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AR8327_CLK_DELAY_SEL3,
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};
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/* XXX update the field types */
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struct ar8327_pad_cfg {
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uint32_t mode;
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uint32_t rxclk_sel;
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uint32_t txclk_sel;
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uint32_t txclk_delay_sel;
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uint32_t rxclk_delay_sel;
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uint32_t txclk_delay_en;
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uint32_t rxclk_delay_en;
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uint32_t sgmii_delay_en;
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uint32_t pipe_rxclk_sel;
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};
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struct ar8327_sgmii_cfg {
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uint32_t sgmii_ctrl;
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uint32_t serdes_aen;
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};
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struct ar8327_led_cfg {
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uint32_t led_ctrl0;
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uint32_t led_ctrl1;
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uint32_t led_ctrl2;
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uint32_t led_ctrl3;
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uint32_t open_drain;
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};
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struct ar8327_port_cfg {
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#define AR8327_PORT_SPEED_10 1
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#define AR8327_PORT_SPEED_100 2
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#define AR8327_PORT_SPEED_1000 3
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uint32_t speed;
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uint32_t force_link;
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uint32_t duplex;
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uint32_t txpause;
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uint32_t rxpause;
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};
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extern void ar8327_attach(struct arswitch_softc *sc);
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#endif /* __ARSWITCH_8327_H__ */
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