70b0d39bbc
driver parameters correctly. Approved by: rrs (mentor) Obtained from: Sriram Gorti <srgorti@netlogicmicro.com>
199 lines
7.4 KiB
C
199 lines
7.4 KiB
C
/*********************************************************************
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*
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* Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights
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* reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* *****************************RMI_2**********************************/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/cpufunc.h>
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#include <mips/rmi/msgring.h>
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#include <mips/rmi/board.h>
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#include <mips/rmi/pic.h>
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#include <mips/rmi/shared_structs.h>
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static int xlr_rxstn_to_txstn_map[128] = {
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[0 ... 7] = TX_STN_CPU_0,
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[8 ... 15] = TX_STN_CPU_1,
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[16 ... 23] = TX_STN_CPU_2,
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[24 ... 31] = TX_STN_CPU_3,
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[32 ... 39] = TX_STN_CPU_4,
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[40 ... 47] = TX_STN_CPU_5,
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[48 ... 55] = TX_STN_CPU_6,
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[56 ... 63] = TX_STN_CPU_7,
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[64 ... 95] = TX_STN_INVALID,
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[96 ... 103] = TX_STN_GMAC,
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[104 ... 107] = TX_STN_DMA,
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[108 ... 111] = TX_STN_INVALID,
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[112 ... 113] = TX_STN_XGS_0,
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[114 ... 115] = TX_STN_XGS_1,
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[116 ... 119] = TX_STN_INVALID,
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[120 ... 127] = TX_STN_SAE
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};
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static int xls_rxstn_to_txstn_map[128] = {
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[0 ... 7] = TX_STN_CPU_0,
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[8 ... 15] = TX_STN_CPU_1,
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[16 ... 23] = TX_STN_CPU_2,
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[24 ... 31] = TX_STN_CPU_3,
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[32 ... 63] = TX_STN_INVALID,
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[64 ... 71] = TX_STN_PCIE,
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[72 ... 79] = TX_STN_INVALID,
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[80 ... 87] = TX_STN_GMAC1,
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[88 ... 95] = TX_STN_INVALID,
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[96 ... 103] = TX_STN_GMAC0,
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[104 ... 107] = TX_STN_DMA,
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[108 ... 111] = TX_STN_CDE,
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[112 ... 119] = TX_STN_INVALID,
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[120 ... 127] = TX_STN_SAE
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};
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struct stn_cc *xlr_core_cc_configs[] = {&cc_table_cpu_0, &cc_table_cpu_1,
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&cc_table_cpu_2, &cc_table_cpu_3,
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&cc_table_cpu_4, &cc_table_cpu_5,
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&cc_table_cpu_6, &cc_table_cpu_7};
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struct stn_cc *xls_core_cc_configs[] = {&xls_cc_table_cpu_0, &xls_cc_table_cpu_1,
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&xls_cc_table_cpu_2, &xls_cc_table_cpu_3};
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struct xlr_board_info xlr_board_info;
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/*
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* All our knowledge of chip and board that cannot be detected by probing
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* at run-time goes here
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*/
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int
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xlr_board_info_setup()
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{
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if (xlr_is_xls()) {
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xlr_board_info.is_xls = 1;
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xlr_board_info.nr_cpus = 8;
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xlr_board_info.usb = 1;
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/* Board version 8 has NAND flash */
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xlr_board_info.cfi =
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(xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII);
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xlr_board_info.pci_irq = 0;
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xlr_board_info.credit_configs = xls_core_cc_configs;
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xlr_board_info.bucket_sizes = &xls_bucket_sizes;
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xlr_board_info.msgmap = xls_rxstn_to_txstn_map;
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xlr_board_info.gmacports = 8;
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/* network block 0 */
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xlr_board_info.gmac_block[0].type = XLR_GMAC;
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xlr_board_info.gmac_block[0].enabled = 0xf;
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xlr_board_info.gmac_block[0].credit_config = &xls_cc_table_gmac0;
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xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
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xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
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if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI ||
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xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XI ||
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xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XII)
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xlr_board_info.gmac_block[0].mode = XLR_PORT0_RGMII;
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else
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xlr_board_info.gmac_block[0].mode = XLR_SGMII;
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xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
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xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
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xlr_board_info.gmac_block[0].baseinst = 0;
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/* network block 1 */
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xlr_board_info.gmac_block[1].type = XLR_GMAC;
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xlr_board_info.gmac_block[1].enabled = xlr_is_xls1xx() ? 0 : 0xf;
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if (xlr_is_xls4xx_lite()) {
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xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
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uint32_t tmp;
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/* some ports are not enabled on the condor 4xx, figure this
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out from the GPIO fuse bank */
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tmp = xlr_read_reg(mmio, 35);
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if (tmp & (1<<28))
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xlr_board_info.gmac_block[1].enabled &= ~0x8;
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if (tmp & (1<<29))
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xlr_board_info.gmac_block[1].enabled &= ~0x4;
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}
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xlr_board_info.gmac_block[1].credit_config = &xls_cc_table_gmac1;
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xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_GMAC1_TX0;
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xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_GMAC1_FR_0;
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xlr_board_info.gmac_block[1].mode = XLR_SGMII;
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xlr_board_info.gmac_block[1].baseaddr = XLR_IO_GMAC_4_OFFSET;
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xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
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xlr_board_info.gmac_block[1].baseinst = 4;
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/* network block 2 */
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xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */
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} else {
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xlr_board_info.is_xls = 0;
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xlr_board_info.nr_cpus = 32;
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xlr_board_info.usb = 0;
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xlr_board_info.cfi = 1;
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xlr_board_info.pci_irq = 0;
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xlr_board_info.credit_configs = xlr_core_cc_configs;
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xlr_board_info.bucket_sizes = &bucket_sizes;
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xlr_board_info.msgmap = xlr_rxstn_to_txstn_map;
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xlr_board_info.gmacports = 4;
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/* GMAC0 */
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xlr_board_info.gmac_block[0].type = XLR_GMAC;
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xlr_board_info.gmac_block[0].enabled = 0xf;
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xlr_board_info.gmac_block[0].credit_config = &cc_table_gmac;
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xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
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xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
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xlr_board_info.gmac_block[0].mode = XLR_RGMII;
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xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
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xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
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xlr_board_info.gmac_block[0].baseinst = 0;
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/* XGMAC0 */
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xlr_board_info.gmac_block[1].type = XLR_XGMAC;
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xlr_board_info.gmac_block[1].enabled = 1;
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xlr_board_info.gmac_block[1].credit_config = &cc_table_xgs_0;
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xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_XGS0_TX;
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xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_XGS0FR;
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xlr_board_info.gmac_block[1].mode = -1;
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xlr_board_info.gmac_block[1].baseaddr = XLR_IO_XGMAC_0_OFFSET;
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xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
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xlr_board_info.gmac_block[1].baseinst = 4;
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/* XGMAC1 */
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xlr_board_info.gmac_block[2].type = XLR_XGMAC;
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xlr_board_info.gmac_block[2].enabled = 1;
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xlr_board_info.gmac_block[2].credit_config = &cc_table_xgs_1;
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xlr_board_info.gmac_block[2].station_txbase = MSGRNG_STNID_XGS1_TX;
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xlr_board_info.gmac_block[2].station_rfr = MSGRNG_STNID_XGS1FR;
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xlr_board_info.gmac_block[2].mode = -1;
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xlr_board_info.gmac_block[2].baseaddr = XLR_IO_XGMAC_1_OFFSET;
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xlr_board_info.gmac_block[2].baseirq = PIC_XGS_1_IRQ;
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xlr_board_info.gmac_block[2].baseinst = 5;
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}
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return 0;
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}
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