134 lines
5.2 KiB
C
134 lines
5.2 KiB
C
/*-
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* Copyright 2007-2009 Solarflare Communications Inc. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_SIENA_FLASH_H
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#define _SYS_SIENA_FLASH_H
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#pragma pack(1)
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/* Fixed locations near the start of flash (which may be in the internal PHY
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* firmware header) point to the boot header.
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*
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* - parsed by MC boot ROM and firmware
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* - reserved (but not parsed) by PHY firmware
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* - opaque to driver
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*/
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#define SIENA_MC_BOOT_PHY_FW_HDR_LEN (0x20)
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#define SIENA_MC_BOOT_PTR_LOCATION (0x18) /* First thing we try to boot */
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#define SIENA_MC_BOOT_ALT_PTR_LOCATION (0x1c) /* Alternative if that fails */
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#define SIENA_MC_BOOT_HDR_LEN (0x200)
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#define SIENA_MC_BOOT_MAGIC (0x51E4A001)
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#define SIENA_MC_BOOT_VERSION (1)
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typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_BOOT_MAGIC */
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efx_word_t hdr_version; /* this structure definition is version 1 */
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efx_byte_t board_type;
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efx_byte_t firmware_version_a;
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efx_byte_t firmware_version_b;
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efx_byte_t firmware_version_c;
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efx_word_t checksum; /* of whole header area + firmware image */
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efx_word_t firmware_version_d;
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efx_word_t reserved_a[1]; /* (set to 0) */
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efx_dword_t firmware_text_offset; /* offset to firmware .text */
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efx_dword_t firmware_text_size; /* length of firmware .text, in bytes */
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efx_dword_t firmware_data_offset; /* offset to firmware .data */
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efx_dword_t firmware_data_size; /* length of firmware .data, in bytes */
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efx_dword_t reserved_b[8]; /* (set to 0) */
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} siena_mc_boot_hdr_t;
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#define SIENA_MC_STATIC_CONFIG_MAGIC (0xBDCF5555)
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#define SIENA_MC_STATIC_CONFIG_VERSION (0)
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typedef struct siena_mc_static_config_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_STATIC_CONFIG_MAGIC */
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efx_word_t length; /* of header area (i.e. not including VPD) */
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efx_byte_t version;
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efx_byte_t csum; /* over header area (i.e. not including VPD) */
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efx_dword_t static_vpd_offset;
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efx_dword_t static_vpd_length;
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efx_dword_t capabilities;
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efx_byte_t mac_addr_base[6];
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efx_byte_t green_mode_cal; /* Green mode calibration result */
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efx_byte_t green_mode_valid; /* Whether cal holds a valid value */
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efx_word_t mac_addr_count;
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efx_word_t mac_addr_stride;
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efx_dword_t reserved2[2]; /* (write as zero) */
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efx_dword_t num_dbi_items;
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struct {
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efx_word_t addr;
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efx_word_t byte_enables;
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efx_dword_t value;
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} dbi[];
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} siena_mc_static_config_hdr_t;
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#define SIENA_MC_DYNAMIC_CONFIG_MAGIC (0xBDCFDDDD)
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#define SIENA_MC_DYNAMIC_CONFIG_VERSION (0)
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typedef struct siena_mc_fw_version_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t fw_subtype;
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efx_word_t version_w;
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efx_word_t version_x;
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efx_word_t version_y;
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efx_word_t version_z;
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} siena_mc_fw_version_t;
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typedef struct siena_mc_dynamic_config_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_DYNAMIC_CONFIG_MAGIC */
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efx_word_t length; /* of header area (i.e. not including VPD) */
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efx_byte_t version;
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efx_byte_t csum; /* over header area (i.e. not including VPD) */
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efx_dword_t dynamic_vpd_offset;
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efx_dword_t dynamic_vpd_length;
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efx_dword_t num_fw_version_items;
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siena_mc_fw_version_t fw_version[];
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} siena_mc_dynamic_config_hdr_t;
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#define SIENA_MC_EXPROM_SINGLE_MAGIC (0xAA55) /* little-endian uint16_t */
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#define SIENA_MC_EXPROM_COMBO_MAGIC (0xB0070102) /* little-endian uint32_t */
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typedef struct siena_mc_combo_rom_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC */
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efx_dword_t len1; /* length of first image */
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efx_dword_t len2; /* length of second image */
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efx_dword_t off1; /* offset of first byte to edit to combine images */
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efx_dword_t off2; /* offset of second byte to edit to combine images */
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efx_word_t infoblk0_off; /* infoblk offset */
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efx_word_t infoblk1_off; /* infoblk offset */
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efx_byte_t infoblk_len; /* length of space reserved for infoblk structures */
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efx_byte_t reserved[7]; /* (set to 0) */
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} siena_mc_combo_rom_hdr_t;
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#pragma pack()
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#endif /* _SYS_SIENA_FLASH_H */
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