b3b25f2cbf
ahc_pci.c: ahd_pci.c: aic7xxx.c: aic79xx.c: aic_osm_lib.c: aic_osm_lib.h: Use common OSM routines from aic_osm_lib for bus dma operations, delay routines, accessing CCBs, byte swapping, etc. aic7xxx_pci.c: Provide a better description for the 2915/30LP on attach. aic7xxx.c: aic79xx.c: aic7770.c: aic79xx_pci.c: aic7xxx_pci.c: aic7xxx_93cx6.c: Move FBSDID behind an ifdef so that these core files will still compile under other OSes. aic79xx.h: aic79xx_pci.c: aic79xx.seq: To speed up non-packetized CDB delivery in Rev B, all CDB acks are "released" to the output sync as soon as the command phase starts. There is only one problem with this approach. If the target changes phase before all data are sent, we have left over acks that can go out on the bus in a data phase. Due to other chip contraints, this only happens if the target goes to data-in, but if the acks go out before we can test SDONE, we'll think that the transfer has completed successfully. Work around this by taking advantage of the 400ns or 800ns dead time between command phase and the REQ of the new phase. If the transfer has completed successfully, SCSIEN should fall *long* before we see a phase change. We thus treat any phasemiss that occurs before SCSIEN falls as an incomplete transfer. aic79xx.h: Add the AHD_FAST_CDB_DELIVERY feature. aic79xx_pci.c: Set AHD_FAST_CDB_DELIVERY for all Rev. B parts. aic79xx.seq: Test for PHASEMIS in the command phase for all AHD_FAST_CDB_DELIVERY controlelrs. ahd_pci.c: ahc_pci.c: aic7xxx.h: aic79xx.h: Move definition of controller BAR offsets to core header files. aic7xxx.c: aic79xx.c: In the softc free routine, leave removal of a softc from the global list of softcs to the OSM (the caller of this routine). This allows us to avoid holding the softc list_lock during device destruction where we may have to sleep waiting for our recovery thread to halt. ahc_pci.c: Use ahc_pci_test_register access to validate I/O mapped in addition to the tests already performed for memory mapped access. Remove unused ahc_power_state_change() function. The PCI layer in both 4.X and 5.X now offer this functionality. ahd_pci.c: Remove reduntant definition of controller BAR offsets. These are also defined in aic79xx.h. Remove unused ahd_power_state_change() function. The PCI layer in both 4.X and 5.X now offer this functionality. aic7xxx.c: aic79xx.c: aic79xx.h: aic7xxx.h: aic7xxx_osm.c: aic79xx_osm.c: Move timeout handling to the driver cores. In the case of the aic79xx driver, the algorithm has been enhanced to try target resets before performing a bus reset. For the aic7xxx driver, the algorithm is unchanged. Although the drivers do not currently sleep during recovery (recovery is timeout driven), the cores do expect all processing to be performed via a recovery thread. Our timeout handlers are now little stubs that wakeup the recovery thread. aic79xx.c: aic79xx.h: aic79xx_inline.h: Change shared_data allocation to use a map_node so that the sentinel hscb can use this map node in ahd_swap_with_next_hscb. This routine now swaps the hscb_map pointer in additon to the hscb contents so that any sync operations occur on the correct map. physaddr -> busaddr Pointed out by: Jason Thorpe <thorpej@wasabisystems.com> aic79xx.c: Make more use of the in/out/w/l/q macros for accessing byte registers in the chip. Correct some issues in the ahd_flush_qoutfifo() routine. o Run the qoutfifo only once the command channel DMA engine has been halted. This closes a window where we might have missed some entries. o Change ahd_run_data_fifo() to not loop to completion. If we happen to start on the wrong FIFO and the other FIFO has a snapshot savepointers, we might deadlock. This required our delay between FIFO tests to be moved to the ahd_flush_qoutfifo() routine. o Update/add comments. o Remove spurious test for COMPLETE_DMA list being empty when completing transactions from the GSFIFO with residuals. The SCB must be put on the COMPLETE_DMA scb list unconditionally. o When halting command channel DMA activity, we must disable the DMA channel in all cases but an update of the QOUTFIFO. The latter case is required so that the sequencer will update its position in the QOUTFIFO. Previously, we left the channel enabled for all "push" DMAs. This left us vulnerable to the sequencer handling an SCB push long after that SCB was already processed manually by this routine. o Correct the polarity of tests involving ahd_scb_active_in_fifo(). This routine returns non-zero for true. Return to processing bad status completions through the qoutfifo. This reduces the time that the sequencer is kept paused when handling transactions with bad status or underruns. When waiting for the controller to quiece selections, add a delay to our loop. Otherwise we may fail to wait long enough for the sequencer to comply. On H2A4 hardware, use the slow slewrate for non-paced transfers. This mirrors what the Adaptec Windows drivers do. On the Rev B. only slow down the CRC timing for older U160 devices that might need the slower timing. We define "older" as devices that do not support packetized protocol. Wait up to 5000 * 5us for the SEEPROM to become unbusy. Write ops seem to take much longer than read ops. aic79xx.seq: For controllers with the FAINT_LED bug, turn the diagnostic led feature on during selection and reselection. This covers the non-packetized case. The LED will be disabled for non-packetized transfers once we return to the top level idle loop. Add more comments about the busy LED workaround. Extend a critical section around the entire command channel idle loop process. Previously the portion of this handler that directly manipulated the linked list of completed SCBs was not protected. This is the likely cause of the recent reports of commands being completed twice by the driver. Extend critical sections across the test for, and the longjump to, longjump routines. This prevents the firmware from trying to jump to a longjmp handler that was just cleared by the host. Improve the locations of several critical section begin and end points. Typically these changes remove instructions that did not need to be inside a critical section. Close the "busfree after selection, but before busfree interrupts can be enabled" race to just a single sequencer instruction. We now test the BSY line explicitly before clearing the busfree status and enabling the busfree interrupt. Close a race condition in the processing of HS_MAILBOX updates. We now clear the "updated" status before the copy. This ensures that we don't accidentally clear the status incorrectly when the host sneaks in an update just after our last copy, but before we clear the status. This race has never been observed. Don't re-enable SCSIEN if we lose the race to disable SCSIEN in our interrupt handler's workaround for the RevA data-valid too early issue. aic79xx_inline.h: Add comments indicating that the order in which bytes are read or written in ahd_inw and ahd_outw is important. This allows us to use these inlines when accessing registers with side-effects. aic79xx_pci.c: The 29320 and the 29320B are 7902 not 7901 based products. Correct the driver banner. aic7xxx.h: Enable the use of the auto-access pause feature on the aic7870 and aic7880. It was disabled due to an oversight. aic7xxx.reg: Move TARG_IMMEDIATE_SCB to alias LAST_MSG to avoid leaving garbage in MWI_RESIDUAL. This prevents spurious overflows whn operating target mode on controllers that require the MWI_RESIDUAL work-around. aic7xxx.seq: AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag. Reference the correct softc field when testing for its presence. Set the NOT_IDENTIFIED and NO_CDB_SENT bits in SEQ_FLAGS to indicate that the nexus is invalid in await busfree. aic7xxx_93cx6.c: Add support for the C56/C66 versions of the EWEN and EWDS commands. aic7xxx.c: aic7xxx_pci.c: Move test for the validity of left over BIOS data to ahc_test_register_access(). This guarantees that any left over CHIPRST value is not clobbered by our register access test and lost to the test that was in ahc_reset.
1678 lines
43 KiB
C
1678 lines
43 KiB
C
/*
|
|
* Bus independent FreeBSD shim for the aic7xxx based Adaptec SCSI controllers
|
|
*
|
|
* Copyright (c) 1994-2001 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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|
* without modification.
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|
* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
|
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* GNU Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/aic7xxx_osm.c#20 $
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*/
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|
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/aic7xxx/aic7xxx_osm.h>
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#include <dev/aic7xxx/aic7xxx_inline.h>
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#include <sys/kthread.h>
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#ifndef AHC_TMODE_ENABLE
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#define AHC_TMODE_ENABLE 0
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#endif
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#include <dev/aic7xxx/aic_osm_lib.c>
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#define ccb_scb_ptr spriv_ptr0
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devclass_t ahc_devclass;
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#if UNUSED
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static void ahc_dump_targcmd(struct target_cmd *cmd);
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#endif
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static int ahc_modevent(module_t mod, int type, void *data);
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static void ahc_action(struct cam_sim *sim, union ccb *ccb);
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static void ahc_get_tran_settings(struct ahc_softc *ahc,
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int our_id, char channel,
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struct ccb_trans_settings *cts);
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static void ahc_async(void *callback_arg, uint32_t code,
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struct cam_path *path, void *arg);
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static void ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs,
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int nsegments, int error);
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static void ahc_poll(struct cam_sim *sim);
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static void ahc_setup_data(struct ahc_softc *ahc, struct cam_sim *sim,
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struct ccb_scsiio *csio, struct scb *scb);
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static void ahc_abort_ccb(struct ahc_softc *ahc, struct cam_sim *sim,
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union ccb *ccb);
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static int ahc_create_path(struct ahc_softc *ahc,
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char channel, u_int target, u_int lun,
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struct cam_path **path);
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static int
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ahc_create_path(struct ahc_softc *ahc, char channel, u_int target,
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u_int lun, struct cam_path **path)
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{
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path_id_t path_id;
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if (channel == 'B')
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path_id = cam_sim_path(ahc->platform_data->sim_b);
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else
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path_id = cam_sim_path(ahc->platform_data->sim);
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return (xpt_create_path(path, /*periph*/NULL,
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path_id, target, lun));
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}
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int
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ahc_map_int(struct ahc_softc *ahc)
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{
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int error;
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/* Hook up our interrupt handler */
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error = bus_setup_intr(ahc->dev_softc, ahc->platform_data->irq,
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INTR_TYPE_CAM, ahc_platform_intr, ahc,
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&ahc->platform_data->ih);
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if (error != 0)
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device_printf(ahc->dev_softc, "bus_setup_intr() failed: %d\n",
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error);
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return (error);
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}
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/*
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* Attach all the sub-devices we can find
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*/
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int
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ahc_attach(struct ahc_softc *ahc)
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{
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char ahc_info[256];
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struct ccb_setasync csa;
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struct cam_devq *devq;
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int bus_id;
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int bus_id2;
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struct cam_sim *sim;
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struct cam_sim *sim2;
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struct cam_path *path;
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struct cam_path *path2;
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long s;
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int count;
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count = 0;
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sim = NULL;
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sim2 = NULL;
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/*
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* Create a thread to perform all recovery.
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*/
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if (ahc_spawn_recovery_thread(ahc) != 0)
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goto fail;
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ahc_controller_info(ahc, ahc_info);
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printf("%s\n", ahc_info);
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ahc_lock(ahc, &s);
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/*
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* Attach secondary channel first if the user has
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* declared it the primary channel.
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*/
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if ((ahc->features & AHC_TWIN) != 0
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&& (ahc->flags & AHC_PRIMARY_CHANNEL) != 0) {
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bus_id = 1;
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bus_id2 = 0;
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} else {
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bus_id = 0;
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bus_id2 = 1;
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}
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/*
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* Create the device queue for our SIM(s).
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*/
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devq = cam_simq_alloc(AHC_MAX_QUEUE);
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if (devq == NULL)
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goto fail;
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/*
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* Construct our first channel SIM entry
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*/
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sim = cam_sim_alloc(ahc_action, ahc_poll, "ahc", ahc,
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device_get_unit(ahc->dev_softc),
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1, AHC_MAX_QUEUE, devq);
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if (sim == NULL) {
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cam_simq_free(devq);
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goto fail;
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}
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if (xpt_bus_register(sim, bus_id) != CAM_SUCCESS) {
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cam_sim_free(sim, /*free_devq*/TRUE);
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sim = NULL;
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goto fail;
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}
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if (xpt_create_path(&path, /*periph*/NULL,
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cam_sim_path(sim), CAM_TARGET_WILDCARD,
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CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
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xpt_bus_deregister(cam_sim_path(sim));
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cam_sim_free(sim, /*free_devq*/TRUE);
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sim = NULL;
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goto fail;
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}
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xpt_setup_ccb(&csa.ccb_h, path, /*priority*/5);
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csa.ccb_h.func_code = XPT_SASYNC_CB;
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csa.event_enable = AC_LOST_DEVICE;
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csa.callback = ahc_async;
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csa.callback_arg = sim;
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xpt_action((union ccb *)&csa);
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count++;
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if (ahc->features & AHC_TWIN) {
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sim2 = cam_sim_alloc(ahc_action, ahc_poll, "ahc",
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ahc, device_get_unit(ahc->dev_softc), 1,
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AHC_MAX_QUEUE, devq);
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if (sim2 == NULL) {
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printf("ahc_attach: Unable to attach second "
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"bus due to resource shortage");
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goto fail;
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}
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if (xpt_bus_register(sim2, bus_id2) != CAM_SUCCESS) {
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printf("ahc_attach: Unable to attach second "
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"bus due to resource shortage");
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/*
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* We do not want to destroy the device queue
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* because the first bus is using it.
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*/
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cam_sim_free(sim2, /*free_devq*/FALSE);
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goto fail;
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}
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if (xpt_create_path(&path2, /*periph*/NULL,
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cam_sim_path(sim2),
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CAM_TARGET_WILDCARD,
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CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
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xpt_bus_deregister(cam_sim_path(sim2));
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cam_sim_free(sim2, /*free_devq*/FALSE);
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sim2 = NULL;
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goto fail;
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}
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xpt_setup_ccb(&csa.ccb_h, path2, /*priority*/5);
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csa.ccb_h.func_code = XPT_SASYNC_CB;
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csa.event_enable = AC_LOST_DEVICE;
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csa.callback = ahc_async;
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csa.callback_arg = sim2;
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xpt_action((union ccb *)&csa);
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count++;
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}
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fail:
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if ((ahc->features & AHC_TWIN) != 0
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&& (ahc->flags & AHC_PRIMARY_CHANNEL) != 0) {
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ahc->platform_data->sim_b = sim;
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ahc->platform_data->path_b = path;
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ahc->platform_data->sim = sim2;
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ahc->platform_data->path = path2;
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} else {
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ahc->platform_data->sim = sim;
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ahc->platform_data->path = path;
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ahc->platform_data->sim_b = sim2;
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ahc->platform_data->path_b = path2;
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}
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if (count != 0) {
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/* We have to wait until after any system dumps... */
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ahc->platform_data->eh =
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EVENTHANDLER_REGISTER(shutdown_final, ahc_shutdown,
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ahc, SHUTDOWN_PRI_DEFAULT);
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ahc_intr_enable(ahc, TRUE);
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}
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ahc_unlock(ahc, &s);
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return (count);
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}
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/*
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* Catch an interrupt from the adapter
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*/
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void
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ahc_platform_intr(void *arg)
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{
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struct ahc_softc *ahc;
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ahc = (struct ahc_softc *)arg;
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ahc_intr(ahc);
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}
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|
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/*
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* We have an scb which has been processed by the
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* adaptor, now we look to see how the operation
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* went.
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*/
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void
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ahc_done(struct ahc_softc *ahc, struct scb *scb)
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{
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union ccb *ccb;
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|
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CAM_DEBUG(scb->io_ctx->ccb_h.path, CAM_DEBUG_TRACE,
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("ahc_done - scb %d\n", scb->hscb->tag));
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ccb = scb->io_ctx;
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LIST_REMOVE(scb, pending_links);
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if ((scb->flags & SCB_TIMEDOUT) != 0)
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LIST_REMOVE(scb, timedout_links);
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if ((scb->flags & SCB_UNTAGGEDQ) != 0) {
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struct scb_tailq *untagged_q;
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int target_offset;
|
|
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target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
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untagged_q = &ahc->untagged_queues[target_offset];
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TAILQ_REMOVE(untagged_q, scb, links.tqe);
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scb->flags &= ~SCB_UNTAGGEDQ;
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ahc_run_untagged_queue(ahc, untagged_q);
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}
|
|
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untimeout(ahc_platform_timeout, (caddr_t)scb, ccb->ccb_h.timeout_ch);
|
|
|
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if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
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bus_dmasync_op_t op;
|
|
|
|
if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
|
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op = BUS_DMASYNC_POSTREAD;
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else
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op = BUS_DMASYNC_POSTWRITE;
|
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bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
|
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bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
|
|
}
|
|
|
|
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
|
|
struct cam_path *ccb_path;
|
|
|
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/*
|
|
* If we have finally disconnected, clean up our
|
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* pending device state.
|
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* XXX - There may be error states that cause where
|
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* we will remain connected.
|
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*/
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ccb_path = ccb->ccb_h.path;
|
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if (ahc->pending_device != NULL
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&& xpt_path_comp(ahc->pending_device->path, ccb_path) == 0) {
|
|
|
|
if ((ccb->ccb_h.flags & CAM_SEND_STATUS) != 0) {
|
|
ahc->pending_device = NULL;
|
|
} else {
|
|
if (bootverbose) {
|
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xpt_print_path(ccb->ccb_h.path);
|
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printf("Still connected\n");
|
|
}
|
|
aic_freeze_ccb(ccb);
|
|
}
|
|
}
|
|
|
|
if (aic_get_transaction_status(scb) == CAM_REQ_INPROG)
|
|
ccb->ccb_h.status |= CAM_REQ_CMP;
|
|
ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
|
|
ahc_free_scb(ahc, scb);
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* If the recovery SCB completes, we have to be
|
|
* out of our timeout.
|
|
*/
|
|
if ((scb->flags & SCB_RECOVERY_SCB) != 0) {
|
|
struct scb *list_scb;
|
|
|
|
/*
|
|
* We were able to complete the command successfully,
|
|
* so renew the timeouts for all other pending
|
|
* commands.
|
|
*/
|
|
LIST_FOREACH(list_scb, &ahc->pending_scbs, pending_links) {
|
|
|
|
aic_scb_timer_reset(scb, aic_get_timeout(scb));
|
|
}
|
|
|
|
if (aic_get_transaction_status(scb) == CAM_BDR_SENT
|
|
|| aic_get_transaction_status(scb) == CAM_REQ_ABORTED)
|
|
aic_set_transaction_status(scb, CAM_CMD_TIMEOUT);
|
|
ahc_print_path(ahc, scb);
|
|
printf("no longer in timeout, status = %x\n",
|
|
ccb->ccb_h.status);
|
|
}
|
|
|
|
/* Don't clobber any existing error state */
|
|
if (aic_get_transaction_status(scb) == CAM_REQ_INPROG) {
|
|
ccb->ccb_h.status |= CAM_REQ_CMP;
|
|
} else if ((scb->flags & SCB_SENSE) != 0) {
|
|
/*
|
|
* We performed autosense retrieval.
|
|
*
|
|
* Zero any sense not transferred by the
|
|
* device. The SCSI spec mandates that any
|
|
* untransfered data should be assumed to be
|
|
* zero. Complete the 'bounce' of sense information
|
|
* through buffers accessible via bus-space by
|
|
* copying it into the clients csio.
|
|
*/
|
|
memset(&ccb->csio.sense_data, 0, sizeof(ccb->csio.sense_data));
|
|
memcpy(&ccb->csio.sense_data,
|
|
ahc_get_sense_buf(ahc, scb),
|
|
(aic_le32toh(scb->sg_list->len) & AHC_SG_LEN_MASK)
|
|
- ccb->csio.sense_resid);
|
|
scb->io_ctx->ccb_h.status |= CAM_AUTOSNS_VALID;
|
|
}
|
|
ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
|
|
ahc_free_scb(ahc, scb);
|
|
xpt_done(ccb);
|
|
}
|
|
|
|
static void
|
|
ahc_action(struct cam_sim *sim, union ccb *ccb)
|
|
{
|
|
struct ahc_softc *ahc;
|
|
struct ahc_tmode_lstate *lstate;
|
|
u_int target_id;
|
|
u_int our_id;
|
|
long s;
|
|
|
|
CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahc_action\n"));
|
|
|
|
ahc = (struct ahc_softc *)cam_sim_softc(sim);
|
|
|
|
target_id = ccb->ccb_h.target_id;
|
|
our_id = SIM_SCSI_ID(ahc, sim);
|
|
|
|
switch (ccb->ccb_h.func_code) {
|
|
/* Common cases first */
|
|
case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
|
|
case XPT_CONT_TARGET_IO:/* Continue Host Target I/O Connection*/
|
|
{
|
|
struct ahc_tmode_tstate *tstate;
|
|
cam_status status;
|
|
|
|
status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate,
|
|
&lstate, TRUE);
|
|
|
|
if (status != CAM_REQ_CMP) {
|
|
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
|
|
/* Response from the black hole device */
|
|
tstate = NULL;
|
|
lstate = ahc->black_hole;
|
|
} else {
|
|
ccb->ccb_h.status = status;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
}
|
|
if (ccb->ccb_h.func_code == XPT_ACCEPT_TARGET_IO) {
|
|
|
|
ahc_lock(ahc, &s);
|
|
SLIST_INSERT_HEAD(&lstate->accept_tios, &ccb->ccb_h,
|
|
sim_links.sle);
|
|
ccb->ccb_h.status = CAM_REQ_INPROG;
|
|
if ((ahc->flags & AHC_TQINFIFO_BLOCKED) != 0)
|
|
ahc_run_tqinfifo(ahc, /*paused*/FALSE);
|
|
ahc_unlock(ahc, &s);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* The target_id represents the target we attempt to
|
|
* select. In target mode, this is the initiator of
|
|
* the original command.
|
|
*/
|
|
our_id = target_id;
|
|
target_id = ccb->csio.init_id;
|
|
/* FALLTHROUGH */
|
|
}
|
|
case XPT_SCSI_IO: /* Execute the requested I/O operation */
|
|
case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
|
|
{
|
|
struct scb *scb;
|
|
struct hardware_scb *hscb;
|
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) == 0
|
|
&& (ccb->ccb_h.func_code == XPT_SCSI_IO
|
|
|| ccb->ccb_h.func_code == XPT_RESET_DEV)) {
|
|
ccb->ccb_h.status = CAM_PROVIDE_FAIL;
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* get an scb to use.
|
|
*/
|
|
ahc_lock(ahc, &s);
|
|
if ((scb = ahc_get_scb(ahc)) == NULL) {
|
|
|
|
xpt_freeze_simq(sim, /*count*/1);
|
|
ahc->flags |= AHC_RESOURCE_SHORTAGE;
|
|
ahc_unlock(ahc, &s);
|
|
ccb->ccb_h.status = CAM_REQUEUE_REQ;
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
ahc_unlock(ahc, &s);
|
|
|
|
hscb = scb->hscb;
|
|
|
|
CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_SUBTRACE,
|
|
("start scb(%p)\n", scb));
|
|
scb->io_ctx = ccb;
|
|
/*
|
|
* So we can find the SCB when an abort is requested
|
|
*/
|
|
ccb->ccb_h.ccb_scb_ptr = scb;
|
|
|
|
/*
|
|
* Put all the arguments for the xfer in the scb
|
|
*/
|
|
hscb->control = 0;
|
|
hscb->scsiid = BUILD_SCSIID(ahc, sim, target_id, our_id);
|
|
hscb->lun = ccb->ccb_h.target_lun;
|
|
if (ccb->ccb_h.func_code == XPT_RESET_DEV) {
|
|
hscb->cdb_len = 0;
|
|
scb->flags |= SCB_DEVICE_RESET;
|
|
hscb->control |= MK_MESSAGE;
|
|
ahc_execute_scb(scb, NULL, 0, 0);
|
|
} else {
|
|
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
|
|
struct target_data *tdata;
|
|
|
|
tdata = &hscb->shared_data.tdata;
|
|
if (ahc->pending_device == lstate)
|
|
scb->flags |= SCB_TARGET_IMMEDIATE;
|
|
hscb->control |= TARGET_SCB;
|
|
scb->flags |= SCB_TARGET_SCB;
|
|
tdata->target_phases = 0;
|
|
if ((ccb->ccb_h.flags & CAM_SEND_STATUS) != 0) {
|
|
tdata->target_phases |= SPHASE_PENDING;
|
|
tdata->scsi_status =
|
|
ccb->csio.scsi_status;
|
|
}
|
|
if (ccb->ccb_h.flags & CAM_DIS_DISCONNECT)
|
|
tdata->target_phases |= NO_DISCONNECT;
|
|
|
|
tdata->initiator_tag = ccb->csio.tag_id;
|
|
}
|
|
if (ccb->ccb_h.flags & CAM_TAG_ACTION_VALID)
|
|
hscb->control |= ccb->csio.tag_action;
|
|
|
|
ahc_setup_data(ahc, sim, &ccb->csio, scb);
|
|
}
|
|
break;
|
|
}
|
|
case XPT_NOTIFY_ACK:
|
|
case XPT_IMMED_NOTIFY:
|
|
{
|
|
struct ahc_tmode_tstate *tstate;
|
|
struct ahc_tmode_lstate *lstate;
|
|
cam_status status;
|
|
|
|
status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate,
|
|
&lstate, TRUE);
|
|
|
|
if (status != CAM_REQ_CMP) {
|
|
ccb->ccb_h.status = status;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
SLIST_INSERT_HEAD(&lstate->immed_notifies, &ccb->ccb_h,
|
|
sim_links.sle);
|
|
ccb->ccb_h.status = CAM_REQ_INPROG;
|
|
ahc_send_lstate_events(ahc, lstate);
|
|
break;
|
|
}
|
|
case XPT_EN_LUN: /* Enable LUN as a target */
|
|
ahc_handle_en_lun(ahc, sim, ccb);
|
|
xpt_done(ccb);
|
|
break;
|
|
case XPT_ABORT: /* Abort the specified CCB */
|
|
{
|
|
ahc_abort_ccb(ahc, sim, ccb);
|
|
break;
|
|
}
|
|
case XPT_SET_TRAN_SETTINGS:
|
|
{
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
struct ahc_devinfo devinfo;
|
|
struct ccb_trans_settings *cts;
|
|
struct ccb_trans_settings_scsi *scsi;
|
|
struct ccb_trans_settings_spi *spi;
|
|
struct ahc_initiator_tinfo *tinfo;
|
|
struct ahc_tmode_tstate *tstate;
|
|
uint16_t *discenable;
|
|
uint16_t *tagenable;
|
|
u_int update_type;
|
|
|
|
cts = &ccb->cts;
|
|
scsi = &cts->proto_specific.scsi;
|
|
spi = &cts->xport_specific.spi;
|
|
ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
|
|
cts->ccb_h.target_id,
|
|
cts->ccb_h.target_lun,
|
|
SIM_CHANNEL(ahc, sim),
|
|
ROLE_UNKNOWN);
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
|
|
devinfo.our_scsiid,
|
|
devinfo.target, &tstate);
|
|
update_type = 0;
|
|
if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
|
|
update_type |= AHC_TRANS_GOAL;
|
|
discenable = &tstate->discenable;
|
|
tagenable = &tstate->tagenable;
|
|
tinfo->curr.protocol_version =
|
|
cts->protocol_version;
|
|
tinfo->curr.transport_version =
|
|
cts->transport_version;
|
|
tinfo->goal.protocol_version =
|
|
cts->protocol_version;
|
|
tinfo->goal.transport_version =
|
|
cts->transport_version;
|
|
} else if (cts->type == CTS_TYPE_USER_SETTINGS) {
|
|
update_type |= AHC_TRANS_USER;
|
|
discenable = &ahc->user_discenable;
|
|
tagenable = &ahc->user_tagenable;
|
|
tinfo->user.protocol_version =
|
|
cts->protocol_version;
|
|
tinfo->user.transport_version =
|
|
cts->transport_version;
|
|
} else {
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
|
|
ahc_lock(ahc, &s);
|
|
|
|
if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
|
|
if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
|
|
*discenable |= devinfo.target_mask;
|
|
else
|
|
*discenable &= ~devinfo.target_mask;
|
|
}
|
|
|
|
if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
|
|
if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
|
|
*tagenable |= devinfo.target_mask;
|
|
else
|
|
*tagenable &= ~devinfo.target_mask;
|
|
}
|
|
|
|
if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
|
|
ahc_validate_width(ahc, /*tinfo limit*/NULL,
|
|
&spi->bus_width, ROLE_UNKNOWN);
|
|
ahc_set_width(ahc, &devinfo, spi->bus_width,
|
|
update_type, /*paused*/FALSE);
|
|
}
|
|
|
|
if ((spi->valid & CTS_SPI_VALID_PPR_OPTIONS) == 0) {
|
|
if (update_type == AHC_TRANS_USER)
|
|
spi->ppr_options = tinfo->user.ppr_options;
|
|
else
|
|
spi->ppr_options = tinfo->goal.ppr_options;
|
|
}
|
|
|
|
if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0) {
|
|
if (update_type == AHC_TRANS_USER)
|
|
spi->sync_offset = tinfo->user.offset;
|
|
else
|
|
spi->sync_offset = tinfo->goal.offset;
|
|
}
|
|
|
|
if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0) {
|
|
if (update_type == AHC_TRANS_USER)
|
|
spi->sync_period = tinfo->user.period;
|
|
else
|
|
spi->sync_period = tinfo->goal.period;
|
|
}
|
|
|
|
if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
|
|
|| ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
|
|
struct ahc_syncrate *syncrate;
|
|
u_int maxsync;
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
maxsync = AHC_SYNCRATE_DT;
|
|
else if ((ahc->features & AHC_ULTRA) != 0)
|
|
maxsync = AHC_SYNCRATE_ULTRA;
|
|
else
|
|
maxsync = AHC_SYNCRATE_FAST;
|
|
|
|
if (spi->bus_width != MSG_EXT_WDTR_BUS_16_BIT)
|
|
spi->ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
|
|
|
syncrate = ahc_find_syncrate(ahc, &spi->sync_period,
|
|
&spi->ppr_options,
|
|
maxsync);
|
|
ahc_validate_offset(ahc, /*tinfo limit*/NULL,
|
|
syncrate, &spi->sync_offset,
|
|
spi->bus_width, ROLE_UNKNOWN);
|
|
|
|
/* We use a period of 0 to represent async */
|
|
if (spi->sync_offset == 0) {
|
|
spi->sync_period = 0;
|
|
spi->ppr_options = 0;
|
|
}
|
|
|
|
ahc_set_syncrate(ahc, &devinfo, syncrate,
|
|
spi->sync_period, spi->sync_offset,
|
|
spi->ppr_options, update_type,
|
|
/*paused*/FALSE);
|
|
}
|
|
ahc_unlock(ahc, &s);
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
xpt_done(ccb);
|
|
#else
|
|
struct ahc_devinfo devinfo;
|
|
struct ccb_trans_settings *cts;
|
|
struct ahc_initiator_tinfo *tinfo;
|
|
struct ahc_tmode_tstate *tstate;
|
|
uint16_t *discenable;
|
|
uint16_t *tagenable;
|
|
u_int update_type;
|
|
long s;
|
|
|
|
cts = &ccb->cts;
|
|
ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
|
|
cts->ccb_h.target_id,
|
|
cts->ccb_h.target_lun,
|
|
SIM_CHANNEL(ahc, sim),
|
|
ROLE_UNKNOWN);
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
|
|
devinfo.our_scsiid,
|
|
devinfo.target, &tstate);
|
|
update_type = 0;
|
|
if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
|
|
update_type |= AHC_TRANS_GOAL;
|
|
discenable = &tstate->discenable;
|
|
tagenable = &tstate->tagenable;
|
|
} else if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
|
|
update_type |= AHC_TRANS_USER;
|
|
discenable = &ahc->user_discenable;
|
|
tagenable = &ahc->user_tagenable;
|
|
} else {
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
|
|
ahc_lock(ahc, &s);
|
|
|
|
if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
|
|
if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
|
|
*discenable |= devinfo.target_mask;
|
|
else
|
|
*discenable &= ~devinfo.target_mask;
|
|
}
|
|
|
|
if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
|
|
if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
|
|
*tagenable |= devinfo.target_mask;
|
|
else
|
|
*tagenable &= ~devinfo.target_mask;
|
|
}
|
|
|
|
if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
|
|
ahc_validate_width(ahc, /*tinfo limit*/NULL,
|
|
&cts->bus_width, ROLE_UNKNOWN);
|
|
ahc_set_width(ahc, &devinfo, cts->bus_width,
|
|
update_type, /*paused*/FALSE);
|
|
}
|
|
|
|
if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) == 0) {
|
|
if (update_type == AHC_TRANS_USER)
|
|
cts->sync_offset = tinfo->user.offset;
|
|
else
|
|
cts->sync_offset = tinfo->goal.offset;
|
|
}
|
|
|
|
if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) == 0) {
|
|
if (update_type == AHC_TRANS_USER)
|
|
cts->sync_period = tinfo->user.period;
|
|
else
|
|
cts->sync_period = tinfo->goal.period;
|
|
}
|
|
|
|
if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
|
|
|| ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
|
|
struct ahc_syncrate *syncrate;
|
|
u_int ppr_options;
|
|
u_int maxsync;
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
maxsync = AHC_SYNCRATE_DT;
|
|
else if ((ahc->features & AHC_ULTRA) != 0)
|
|
maxsync = AHC_SYNCRATE_ULTRA;
|
|
else
|
|
maxsync = AHC_SYNCRATE_FAST;
|
|
|
|
ppr_options = 0;
|
|
if (cts->sync_period <= 9
|
|
&& cts->bus_width == MSG_EXT_WDTR_BUS_16_BIT)
|
|
ppr_options = MSG_EXT_PPR_DT_REQ;
|
|
|
|
syncrate = ahc_find_syncrate(ahc, &cts->sync_period,
|
|
&ppr_options,
|
|
maxsync);
|
|
ahc_validate_offset(ahc, /*tinfo limit*/NULL,
|
|
syncrate, &cts->sync_offset,
|
|
MSG_EXT_WDTR_BUS_8_BIT,
|
|
ROLE_UNKNOWN);
|
|
|
|
/* We use a period of 0 to represent async */
|
|
if (cts->sync_offset == 0) {
|
|
cts->sync_period = 0;
|
|
ppr_options = 0;
|
|
}
|
|
|
|
if (ppr_options == MSG_EXT_PPR_DT_REQ
|
|
&& tinfo->user.transport_version >= 3) {
|
|
tinfo->goal.transport_version =
|
|
tinfo->user.transport_version;
|
|
tinfo->curr.transport_version =
|
|
tinfo->user.transport_version;
|
|
}
|
|
|
|
ahc_set_syncrate(ahc, &devinfo, syncrate,
|
|
cts->sync_period, cts->sync_offset,
|
|
ppr_options, update_type,
|
|
/*paused*/FALSE);
|
|
}
|
|
ahc_unlock(ahc, &s);
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
xpt_done(ccb);
|
|
#endif
|
|
break;
|
|
}
|
|
case XPT_GET_TRAN_SETTINGS:
|
|
/* Get default/user set transfer settings for the target */
|
|
{
|
|
|
|
ahc_lock(ahc, &s);
|
|
ahc_get_tran_settings(ahc, SIM_SCSI_ID(ahc, sim),
|
|
SIM_CHANNEL(ahc, sim), &ccb->cts);
|
|
ahc_unlock(ahc, &s);
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
case XPT_CALC_GEOMETRY:
|
|
{
|
|
int extended;
|
|
|
|
extended = SIM_IS_SCSIBUS_B(ahc, sim)
|
|
? ahc->flags & AHC_EXTENDED_TRANS_B
|
|
: ahc->flags & AHC_EXTENDED_TRANS_A;
|
|
aic_calc_geometry(&ccb->ccg, extended);
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
case XPT_RESET_BUS: /* Reset the specified SCSI bus */
|
|
{
|
|
int found;
|
|
|
|
ahc_lock(ahc, &s);
|
|
found = ahc_reset_channel(ahc, SIM_CHANNEL(ahc, sim),
|
|
/*initiate reset*/TRUE);
|
|
ahc_unlock(ahc, &s);
|
|
if (bootverbose) {
|
|
xpt_print_path(SIM_PATH(ahc, sim));
|
|
printf("SCSI bus reset delivered. "
|
|
"%d SCBs aborted.\n", found);
|
|
}
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
case XPT_TERM_IO: /* Terminate the I/O process */
|
|
/* XXX Implement */
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
xpt_done(ccb);
|
|
break;
|
|
case XPT_PATH_INQ: /* Path routing inquiry */
|
|
{
|
|
struct ccb_pathinq *cpi = &ccb->cpi;
|
|
|
|
cpi->version_num = 1; /* XXX??? */
|
|
cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
|
|
if ((ahc->features & AHC_WIDE) != 0)
|
|
cpi->hba_inquiry |= PI_WIDE_16;
|
|
if ((ahc->features & AHC_TARGETMODE) != 0) {
|
|
cpi->target_sprt = PIT_PROCESSOR
|
|
| PIT_DISCONNECT
|
|
| PIT_TERM_IO;
|
|
} else {
|
|
cpi->target_sprt = 0;
|
|
}
|
|
cpi->hba_misc = 0;
|
|
cpi->hba_eng_cnt = 0;
|
|
cpi->max_target = (ahc->features & AHC_WIDE) ? 15 : 7;
|
|
cpi->max_lun = AHC_NUM_LUNS - 1;
|
|
if (SIM_IS_SCSIBUS_B(ahc, sim)) {
|
|
cpi->initiator_id = ahc->our_id_b;
|
|
if ((ahc->flags & AHC_RESET_BUS_B) == 0)
|
|
cpi->hba_misc |= PIM_NOBUSRESET;
|
|
} else {
|
|
cpi->initiator_id = ahc->our_id;
|
|
if ((ahc->flags & AHC_RESET_BUS_A) == 0)
|
|
cpi->hba_misc |= PIM_NOBUSRESET;
|
|
}
|
|
cpi->bus_id = cam_sim_bus(sim);
|
|
cpi->base_transfer_speed = 3300;
|
|
strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
|
|
strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
|
|
strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
|
|
cpi->unit_number = cam_sim_unit(sim);
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
cpi->protocol = PROTO_SCSI;
|
|
cpi->protocol_version = SCSI_REV_2;
|
|
cpi->transport = XPORT_SPI;
|
|
cpi->transport_version = 2;
|
|
cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
|
|
if ((ahc->features & AHC_DT) != 0) {
|
|
cpi->transport_version = 3;
|
|
cpi->xport_specific.spi.ppr_options =
|
|
SID_SPI_CLOCK_DT_ST;
|
|
}
|
|
#endif
|
|
cpi->ccb_h.status = CAM_REQ_CMP;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
default:
|
|
ccb->ccb_h.status = CAM_PROVIDE_FAIL;
|
|
xpt_done(ccb);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ahc_get_tran_settings(struct ahc_softc *ahc, int our_id, char channel,
|
|
struct ccb_trans_settings *cts)
|
|
{
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
struct ahc_devinfo devinfo;
|
|
struct ccb_trans_settings_scsi *scsi;
|
|
struct ccb_trans_settings_spi *spi;
|
|
struct ahc_initiator_tinfo *targ_info;
|
|
struct ahc_tmode_tstate *tstate;
|
|
struct ahc_transinfo *tinfo;
|
|
|
|
scsi = &cts->proto_specific.scsi;
|
|
spi = &cts->xport_specific.spi;
|
|
ahc_compile_devinfo(&devinfo, our_id,
|
|
cts->ccb_h.target_id,
|
|
cts->ccb_h.target_lun,
|
|
channel, ROLE_UNKNOWN);
|
|
targ_info = ahc_fetch_transinfo(ahc, devinfo.channel,
|
|
devinfo.our_scsiid,
|
|
devinfo.target, &tstate);
|
|
|
|
if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
|
|
tinfo = &targ_info->curr;
|
|
else
|
|
tinfo = &targ_info->user;
|
|
|
|
scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
|
|
spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
|
|
if (cts->type == CTS_TYPE_USER_SETTINGS) {
|
|
if ((ahc->user_discenable & devinfo.target_mask) != 0)
|
|
spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
|
|
|
|
if ((ahc->user_tagenable & devinfo.target_mask) != 0)
|
|
scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
|
|
} else {
|
|
if ((tstate->discenable & devinfo.target_mask) != 0)
|
|
spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
|
|
|
|
if ((tstate->tagenable & devinfo.target_mask) != 0)
|
|
scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
|
|
}
|
|
cts->protocol_version = tinfo->protocol_version;
|
|
cts->transport_version = tinfo->transport_version;
|
|
|
|
spi->sync_period = tinfo->period;
|
|
spi->sync_offset = tinfo->offset;
|
|
spi->bus_width = tinfo->width;
|
|
spi->ppr_options = tinfo->ppr_options;
|
|
|
|
cts->protocol = PROTO_SCSI;
|
|
cts->transport = XPORT_SPI;
|
|
spi->valid = CTS_SPI_VALID_SYNC_RATE
|
|
| CTS_SPI_VALID_SYNC_OFFSET
|
|
| CTS_SPI_VALID_BUS_WIDTH
|
|
| CTS_SPI_VALID_PPR_OPTIONS;
|
|
|
|
if (cts->ccb_h.target_lun != CAM_LUN_WILDCARD) {
|
|
scsi->valid = CTS_SCSI_VALID_TQ;
|
|
spi->valid |= CTS_SPI_VALID_DISC;
|
|
} else {
|
|
scsi->valid = 0;
|
|
}
|
|
|
|
cts->ccb_h.status = CAM_REQ_CMP;
|
|
#else
|
|
struct ahc_devinfo devinfo;
|
|
struct ahc_initiator_tinfo *targ_info;
|
|
struct ahc_tmode_tstate *tstate;
|
|
struct ahc_transinfo *tinfo;
|
|
|
|
ahc_compile_devinfo(&devinfo, our_id,
|
|
cts->ccb_h.target_id,
|
|
cts->ccb_h.target_lun,
|
|
channel, ROLE_UNKNOWN);
|
|
targ_info = ahc_fetch_transinfo(ahc, devinfo.channel,
|
|
devinfo.our_scsiid,
|
|
devinfo.target, &tstate);
|
|
|
|
if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
|
|
tinfo = &targ_info->curr;
|
|
else
|
|
tinfo = &targ_info->user;
|
|
|
|
cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
|
|
if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) == 0) {
|
|
if ((ahc->user_discenable & devinfo.target_mask) != 0)
|
|
cts->flags |= CCB_TRANS_DISC_ENB;
|
|
|
|
if ((ahc->user_tagenable & devinfo.target_mask) != 0)
|
|
cts->flags |= CCB_TRANS_TAG_ENB;
|
|
} else {
|
|
if ((tstate->discenable & devinfo.target_mask) != 0)
|
|
cts->flags |= CCB_TRANS_DISC_ENB;
|
|
|
|
if ((tstate->tagenable & devinfo.target_mask) != 0)
|
|
cts->flags |= CCB_TRANS_TAG_ENB;
|
|
}
|
|
cts->sync_period = tinfo->period;
|
|
cts->sync_offset = tinfo->offset;
|
|
cts->bus_width = tinfo->width;
|
|
|
|
cts->valid = CCB_TRANS_SYNC_RATE_VALID
|
|
| CCB_TRANS_SYNC_OFFSET_VALID
|
|
| CCB_TRANS_BUS_WIDTH_VALID;
|
|
|
|
if (cts->ccb_h.target_lun != CAM_LUN_WILDCARD)
|
|
cts->valid |= CCB_TRANS_DISC_VALID|CCB_TRANS_TQ_VALID;
|
|
|
|
cts->ccb_h.status = CAM_REQ_CMP;
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
ahc_async(void *callback_arg, uint32_t code, struct cam_path *path, void *arg)
|
|
{
|
|
struct ahc_softc *ahc;
|
|
struct cam_sim *sim;
|
|
|
|
sim = (struct cam_sim *)callback_arg;
|
|
ahc = (struct ahc_softc *)cam_sim_softc(sim);
|
|
switch (code) {
|
|
case AC_LOST_DEVICE:
|
|
{
|
|
struct ahc_devinfo devinfo;
|
|
long s;
|
|
|
|
ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
|
|
xpt_path_target_id(path),
|
|
xpt_path_lun_id(path),
|
|
SIM_CHANNEL(ahc, sim),
|
|
ROLE_UNKNOWN);
|
|
|
|
/*
|
|
* Revert to async/narrow transfers
|
|
* for the next device.
|
|
*/
|
|
ahc_lock(ahc, &s);
|
|
ahc_set_width(ahc, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
|
|
AHC_TRANS_GOAL|AHC_TRANS_CUR, /*paused*/FALSE);
|
|
ahc_set_syncrate(ahc, &devinfo, /*syncrate*/NULL,
|
|
/*period*/0, /*offset*/0, /*ppr_options*/0,
|
|
AHC_TRANS_GOAL|AHC_TRANS_CUR,
|
|
/*paused*/FALSE);
|
|
ahc_unlock(ahc, &s);
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
|
|
int error)
|
|
{
|
|
struct scb *scb;
|
|
union ccb *ccb;
|
|
struct ahc_softc *ahc;
|
|
struct ahc_initiator_tinfo *tinfo;
|
|
struct ahc_tmode_tstate *tstate;
|
|
u_int mask;
|
|
long s;
|
|
|
|
scb = (struct scb *)arg;
|
|
ccb = scb->io_ctx;
|
|
ahc = scb->ahc_softc;
|
|
|
|
if (error != 0) {
|
|
if (error == EFBIG)
|
|
aic_set_transaction_status(scb, CAM_REQ_TOO_BIG);
|
|
else
|
|
aic_set_transaction_status(scb, CAM_REQ_CMP_ERR);
|
|
if (nsegments != 0)
|
|
bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
|
|
ahc_lock(ahc, &s);
|
|
ahc_free_scb(ahc, scb);
|
|
ahc_unlock(ahc, &s);
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
if (nsegments != 0) {
|
|
struct ahc_dma_seg *sg;
|
|
bus_dma_segment_t *end_seg;
|
|
bus_dmasync_op_t op;
|
|
|
|
end_seg = dm_segs + nsegments;
|
|
|
|
/* Copy the segments into our SG list */
|
|
sg = scb->sg_list;
|
|
while (dm_segs < end_seg) {
|
|
uint32_t len;
|
|
|
|
sg->addr = aic_htole32(dm_segs->ds_addr);
|
|
len = dm_segs->ds_len
|
|
| ((dm_segs->ds_addr >> 8) & 0x7F000000);
|
|
sg->len = aic_htole32(len);
|
|
sg++;
|
|
dm_segs++;
|
|
}
|
|
|
|
/*
|
|
* Note where to find the SG entries in bus space.
|
|
* We also set the full residual flag which the
|
|
* sequencer will clear as soon as a data transfer
|
|
* occurs.
|
|
*/
|
|
scb->hscb->sgptr = aic_htole32(scb->sg_list_phys|SG_FULL_RESID);
|
|
|
|
if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
|
|
op = BUS_DMASYNC_PREREAD;
|
|
else
|
|
op = BUS_DMASYNC_PREWRITE;
|
|
|
|
bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
|
|
|
|
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
|
|
struct target_data *tdata;
|
|
|
|
tdata = &scb->hscb->shared_data.tdata;
|
|
tdata->target_phases |= DPHASE_PENDING;
|
|
/*
|
|
* CAM data direction is relative to the initiator.
|
|
*/
|
|
if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
|
|
tdata->data_phase = P_DATAOUT;
|
|
else
|
|
tdata->data_phase = P_DATAIN;
|
|
|
|
/*
|
|
* If the transfer is of an odd length and in the
|
|
* "in" direction (scsi->HostBus), then it may
|
|
* trigger a bug in the 'WideODD' feature of
|
|
* non-Ultra2 chips. Force the total data-length
|
|
* to be even by adding an extra, 1 byte, SG,
|
|
* element. We do this even if we are not currently
|
|
* negotiated wide as negotiation could occur before
|
|
* this command is executed.
|
|
*/
|
|
if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0
|
|
&& (ccb->csio.dxfer_len & 0x1) != 0
|
|
&& (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
|
|
|
|
nsegments++;
|
|
if (nsegments > AHC_NSEG) {
|
|
|
|
aic_set_transaction_status(scb,
|
|
CAM_REQ_TOO_BIG);
|
|
bus_dmamap_unload(ahc->buffer_dmat,
|
|
scb->dmamap);
|
|
ahc_lock(ahc, &s);
|
|
ahc_free_scb(ahc, scb);
|
|
ahc_unlock(ahc, &s);
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
sg->addr = aic_htole32(ahc->dma_bug_buf);
|
|
sg->len = aic_htole32(1);
|
|
sg++;
|
|
}
|
|
}
|
|
sg--;
|
|
sg->len |= aic_htole32(AHC_DMA_LAST_SEG);
|
|
|
|
/* Copy the first SG into the "current" data pointer area */
|
|
scb->hscb->dataptr = scb->sg_list->addr;
|
|
scb->hscb->datacnt = scb->sg_list->len;
|
|
} else {
|
|
scb->hscb->sgptr = aic_htole32(SG_LIST_NULL);
|
|
scb->hscb->dataptr = 0;
|
|
scb->hscb->datacnt = 0;
|
|
}
|
|
|
|
scb->sg_count = nsegments;
|
|
|
|
ahc_lock(ahc, &s);
|
|
|
|
/*
|
|
* Last time we need to check if this SCB needs to
|
|
* be aborted.
|
|
*/
|
|
if (aic_get_transaction_status(scb) != CAM_REQ_INPROG) {
|
|
if (nsegments != 0)
|
|
bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
|
|
ahc_free_scb(ahc, scb);
|
|
ahc_unlock(ahc, &s);
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
|
|
tinfo = ahc_fetch_transinfo(ahc, SCSIID_CHANNEL(ahc, scb->hscb->scsiid),
|
|
SCSIID_OUR_ID(scb->hscb->scsiid),
|
|
SCSIID_TARGET(ahc, scb->hscb->scsiid),
|
|
&tstate);
|
|
|
|
mask = SCB_GET_TARGET_MASK(ahc, scb);
|
|
scb->hscb->scsirate = tinfo->scsirate;
|
|
scb->hscb->scsioffset = tinfo->curr.offset;
|
|
if ((tstate->ultraenb & mask) != 0)
|
|
scb->hscb->control |= ULTRAENB;
|
|
|
|
if ((tstate->discenable & mask) != 0
|
|
&& (ccb->ccb_h.flags & CAM_DIS_DISCONNECT) == 0)
|
|
scb->hscb->control |= DISCENB;
|
|
|
|
if ((ccb->ccb_h.flags & CAM_NEGOTIATE) != 0
|
|
&& (tinfo->goal.width != 0
|
|
|| tinfo->goal.offset != 0
|
|
|| tinfo->goal.ppr_options != 0)) {
|
|
scb->flags |= SCB_NEGOTIATE;
|
|
scb->hscb->control |= MK_MESSAGE;
|
|
} else if ((tstate->auto_negotiate & mask) != 0) {
|
|
scb->flags |= SCB_AUTO_NEGOTIATE;
|
|
scb->hscb->control |= MK_MESSAGE;
|
|
}
|
|
|
|
LIST_INSERT_HEAD(&ahc->pending_scbs, scb, pending_links);
|
|
|
|
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
|
|
|
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
|
|
uint64_t time;
|
|
|
|
if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT)
|
|
ccb->ccb_h.timeout = 5 * 1000;
|
|
|
|
time = ccb->ccb_h.timeout;
|
|
time *= hz;
|
|
time /= 1000;
|
|
ccb->ccb_h.timeout_ch =
|
|
timeout(ahc_platform_timeout, (caddr_t)scb, time);
|
|
}
|
|
|
|
/*
|
|
* We only allow one untagged transaction
|
|
* per target in the initiator role unless
|
|
* we are storing a full busy target *lun*
|
|
* table in SCB space.
|
|
*/
|
|
if ((scb->hscb->control & (TARGET_SCB|TAG_ENB)) == 0
|
|
&& (ahc->flags & AHC_SCB_BTT) == 0) {
|
|
struct scb_tailq *untagged_q;
|
|
int target_offset;
|
|
|
|
target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
|
|
untagged_q = &(ahc->untagged_queues[target_offset]);
|
|
TAILQ_INSERT_TAIL(untagged_q, scb, links.tqe);
|
|
scb->flags |= SCB_UNTAGGEDQ;
|
|
if (TAILQ_FIRST(untagged_q) != scb) {
|
|
ahc_unlock(ahc, &s);
|
|
return;
|
|
}
|
|
}
|
|
scb->flags |= SCB_ACTIVE;
|
|
|
|
if ((scb->flags & SCB_TARGET_IMMEDIATE) != 0) {
|
|
/* Define a mapping from our tag to the SCB. */
|
|
ahc->scb_data->scbindex[scb->hscb->tag] = scb;
|
|
ahc_pause(ahc);
|
|
if ((ahc->flags & AHC_PAGESCBS) == 0)
|
|
ahc_outb(ahc, SCBPTR, scb->hscb->tag);
|
|
ahc_outb(ahc, TARG_IMMEDIATE_SCB, scb->hscb->tag);
|
|
ahc_unpause(ahc);
|
|
} else {
|
|
ahc_queue_scb(ahc, scb);
|
|
}
|
|
|
|
ahc_unlock(ahc, &s);
|
|
}
|
|
|
|
static void
|
|
ahc_poll(struct cam_sim *sim)
|
|
{
|
|
struct ahc_softc *ahc;
|
|
|
|
ahc = (struct ahc_softc *)cam_sim_softc(sim);
|
|
ahc_intr(ahc);
|
|
}
|
|
|
|
static void
|
|
ahc_setup_data(struct ahc_softc *ahc, struct cam_sim *sim,
|
|
struct ccb_scsiio *csio, struct scb *scb)
|
|
{
|
|
struct hardware_scb *hscb;
|
|
struct ccb_hdr *ccb_h;
|
|
|
|
hscb = scb->hscb;
|
|
ccb_h = &csio->ccb_h;
|
|
|
|
csio->resid = 0;
|
|
csio->sense_resid = 0;
|
|
if (ccb_h->func_code == XPT_SCSI_IO) {
|
|
hscb->cdb_len = csio->cdb_len;
|
|
if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
|
|
|
|
if (hscb->cdb_len > sizeof(hscb->cdb32)
|
|
|| (ccb_h->flags & CAM_CDB_PHYS) != 0) {
|
|
u_long s;
|
|
|
|
aic_set_transaction_status(scb,
|
|
CAM_REQ_INVALID);
|
|
ahc_lock(ahc, &s);
|
|
ahc_free_scb(ahc, scb);
|
|
ahc_unlock(ahc, &s);
|
|
xpt_done((union ccb *)csio);
|
|
return;
|
|
}
|
|
if (hscb->cdb_len > 12) {
|
|
memcpy(hscb->cdb32,
|
|
csio->cdb_io.cdb_ptr,
|
|
hscb->cdb_len);
|
|
scb->flags |= SCB_CDB32_PTR;
|
|
} else {
|
|
memcpy(hscb->shared_data.cdb,
|
|
csio->cdb_io.cdb_ptr,
|
|
hscb->cdb_len);
|
|
}
|
|
} else {
|
|
if (hscb->cdb_len > 12) {
|
|
memcpy(hscb->cdb32, csio->cdb_io.cdb_bytes,
|
|
hscb->cdb_len);
|
|
scb->flags |= SCB_CDB32_PTR;
|
|
} else {
|
|
memcpy(hscb->shared_data.cdb,
|
|
csio->cdb_io.cdb_bytes,
|
|
hscb->cdb_len);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Only use S/G if there is a transfer */
|
|
if ((ccb_h->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
|
|
if ((ccb_h->flags & CAM_SCATTER_VALID) == 0) {
|
|
/* We've been given a pointer to a single buffer */
|
|
if ((ccb_h->flags & CAM_DATA_PHYS) == 0) {
|
|
int s;
|
|
int error;
|
|
|
|
s = splsoftvm();
|
|
error = bus_dmamap_load(ahc->buffer_dmat,
|
|
scb->dmamap,
|
|
csio->data_ptr,
|
|
csio->dxfer_len,
|
|
ahc_execute_scb,
|
|
scb, /*flags*/0);
|
|
if (error == EINPROGRESS) {
|
|
/*
|
|
* So as to maintain ordering,
|
|
* freeze the controller queue
|
|
* until our mapping is
|
|
* returned.
|
|
*/
|
|
xpt_freeze_simq(sim,
|
|
/*count*/1);
|
|
scb->io_ctx->ccb_h.status |=
|
|
CAM_RELEASE_SIMQ;
|
|
}
|
|
splx(s);
|
|
} else {
|
|
struct bus_dma_segment seg;
|
|
|
|
/* Pointer to physical buffer */
|
|
if (csio->dxfer_len > AHC_MAXTRANSFER_SIZE)
|
|
panic("ahc_setup_data - Transfer size "
|
|
"larger than can device max");
|
|
|
|
seg.ds_addr =
|
|
(bus_addr_t)(vm_offset_t)csio->data_ptr;
|
|
seg.ds_len = csio->dxfer_len;
|
|
ahc_execute_scb(scb, &seg, 1, 0);
|
|
}
|
|
} else {
|
|
struct bus_dma_segment *segs;
|
|
|
|
if ((ccb_h->flags & CAM_DATA_PHYS) != 0)
|
|
panic("ahc_setup_data - Physical segment "
|
|
"pointers unsupported");
|
|
|
|
if ((ccb_h->flags & CAM_SG_LIST_PHYS) == 0)
|
|
panic("ahc_setup_data - Virtual segment "
|
|
"addresses unsupported");
|
|
|
|
/* Just use the segments provided */
|
|
segs = (struct bus_dma_segment *)csio->data_ptr;
|
|
ahc_execute_scb(scb, segs, csio->sglist_cnt, 0);
|
|
}
|
|
} else {
|
|
ahc_execute_scb(scb, NULL, 0, 0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
ahc_abort_ccb(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
|
|
{
|
|
union ccb *abort_ccb;
|
|
|
|
abort_ccb = ccb->cab.abort_ccb;
|
|
switch (abort_ccb->ccb_h.func_code) {
|
|
case XPT_ACCEPT_TARGET_IO:
|
|
case XPT_IMMED_NOTIFY:
|
|
case XPT_CONT_TARGET_IO:
|
|
{
|
|
struct ahc_tmode_tstate *tstate;
|
|
struct ahc_tmode_lstate *lstate;
|
|
struct ccb_hdr_slist *list;
|
|
cam_status status;
|
|
|
|
status = ahc_find_tmode_devs(ahc, sim, abort_ccb, &tstate,
|
|
&lstate, TRUE);
|
|
|
|
if (status != CAM_REQ_CMP) {
|
|
ccb->ccb_h.status = status;
|
|
break;
|
|
}
|
|
|
|
if (abort_ccb->ccb_h.func_code == XPT_ACCEPT_TARGET_IO)
|
|
list = &lstate->accept_tios;
|
|
else if (abort_ccb->ccb_h.func_code == XPT_IMMED_NOTIFY)
|
|
list = &lstate->immed_notifies;
|
|
else
|
|
list = NULL;
|
|
|
|
if (list != NULL) {
|
|
struct ccb_hdr *curelm;
|
|
int found;
|
|
|
|
curelm = SLIST_FIRST(list);
|
|
found = 0;
|
|
if (curelm == &abort_ccb->ccb_h) {
|
|
found = 1;
|
|
SLIST_REMOVE_HEAD(list, sim_links.sle);
|
|
} else {
|
|
while(curelm != NULL) {
|
|
struct ccb_hdr *nextelm;
|
|
|
|
nextelm =
|
|
SLIST_NEXT(curelm, sim_links.sle);
|
|
|
|
if (nextelm == &abort_ccb->ccb_h) {
|
|
found = 1;
|
|
SLIST_NEXT(curelm,
|
|
sim_links.sle) =
|
|
SLIST_NEXT(nextelm,
|
|
sim_links.sle);
|
|
break;
|
|
}
|
|
curelm = nextelm;
|
|
}
|
|
}
|
|
|
|
if (found) {
|
|
abort_ccb->ccb_h.status = CAM_REQ_ABORTED;
|
|
xpt_done(abort_ccb);
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
} else {
|
|
xpt_print_path(abort_ccb->ccb_h.path);
|
|
printf("Not found\n");
|
|
ccb->ccb_h.status = CAM_PATH_INVALID;
|
|
}
|
|
break;
|
|
}
|
|
/* FALLTHROUGH */
|
|
}
|
|
case XPT_SCSI_IO:
|
|
/* XXX Fully implement the hard ones */
|
|
ccb->ccb_h.status = CAM_UA_ABORT;
|
|
break;
|
|
default:
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
break;
|
|
}
|
|
xpt_done(ccb);
|
|
}
|
|
|
|
void
|
|
ahc_send_async(struct ahc_softc *ahc, char channel, u_int target,
|
|
u_int lun, ac_code code, void *opt_arg)
|
|
{
|
|
struct ccb_trans_settings cts;
|
|
struct cam_path *path;
|
|
void *arg;
|
|
int error;
|
|
|
|
arg = NULL;
|
|
error = ahc_create_path(ahc, channel, target, lun, &path);
|
|
|
|
if (error != CAM_REQ_CMP)
|
|
return;
|
|
|
|
switch (code) {
|
|
case AC_TRANSFER_NEG:
|
|
{
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
struct ccb_trans_settings_scsi *scsi;
|
|
|
|
cts.type = CTS_TYPE_CURRENT_SETTINGS;
|
|
scsi = &cts.proto_specific.scsi;
|
|
#else
|
|
cts.flags = CCB_TRANS_CURRENT_SETTINGS;
|
|
#endif
|
|
cts.ccb_h.path = path;
|
|
cts.ccb_h.target_id = target;
|
|
cts.ccb_h.target_lun = lun;
|
|
ahc_get_tran_settings(ahc, channel == 'A' ? ahc->our_id
|
|
: ahc->our_id_b,
|
|
channel, &cts);
|
|
arg = &cts;
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
scsi->valid &= ~CTS_SCSI_VALID_TQ;
|
|
scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
|
|
#else
|
|
cts.valid &= ~CCB_TRANS_TQ_VALID;
|
|
cts.flags &= ~CCB_TRANS_TAG_ENB;
|
|
#endif
|
|
if (opt_arg == NULL)
|
|
break;
|
|
if (*((ahc_queue_alg *)opt_arg) == AHC_QUEUE_TAGGED)
|
|
#ifdef AHC_NEW_TRAN_SETTINGS
|
|
scsi->flags |= ~CTS_SCSI_FLAGS_TAG_ENB;
|
|
scsi->valid |= CTS_SCSI_VALID_TQ;
|
|
#else
|
|
cts.flags |= CCB_TRANS_TAG_ENB;
|
|
cts.valid |= CCB_TRANS_TQ_VALID;
|
|
#endif
|
|
break;
|
|
}
|
|
case AC_SENT_BDR:
|
|
case AC_BUS_RESET:
|
|
break;
|
|
default:
|
|
panic("ahc_send_async: Unexpected async event");
|
|
}
|
|
xpt_async(code, path, arg);
|
|
xpt_free_path(path);
|
|
}
|
|
|
|
void
|
|
ahc_platform_set_tags(struct ahc_softc *ahc,
|
|
struct ahc_devinfo *devinfo, int enable)
|
|
{
|
|
}
|
|
|
|
int
|
|
ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg)
|
|
{
|
|
ahc->platform_data = malloc(sizeof(struct ahc_platform_data), M_DEVBUF,
|
|
M_NOWAIT | M_ZERO);
|
|
if (ahc->platform_data == NULL)
|
|
return (ENOMEM);
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
ahc_platform_free(struct ahc_softc *ahc)
|
|
{
|
|
struct ahc_platform_data *pdata;
|
|
|
|
pdata = ahc->platform_data;
|
|
if (pdata != NULL) {
|
|
if (pdata->regs != NULL)
|
|
bus_release_resource(ahc->dev_softc,
|
|
pdata->regs_res_type,
|
|
pdata->regs_res_id,
|
|
pdata->regs);
|
|
|
|
if (pdata->irq != NULL)
|
|
bus_release_resource(ahc->dev_softc,
|
|
pdata->irq_res_type,
|
|
0, pdata->irq);
|
|
|
|
if (pdata->sim_b != NULL) {
|
|
xpt_async(AC_LOST_DEVICE, pdata->path_b, NULL);
|
|
xpt_free_path(pdata->path_b);
|
|
xpt_bus_deregister(cam_sim_path(pdata->sim_b));
|
|
cam_sim_free(pdata->sim_b, /*free_devq*/TRUE);
|
|
}
|
|
if (pdata->sim != NULL) {
|
|
xpt_async(AC_LOST_DEVICE, pdata->path, NULL);
|
|
xpt_free_path(pdata->path);
|
|
xpt_bus_deregister(cam_sim_path(pdata->sim));
|
|
cam_sim_free(pdata->sim, /*free_devq*/TRUE);
|
|
}
|
|
if (pdata->eh != NULL)
|
|
EVENTHANDLER_DEREGISTER(shutdown_final, pdata->eh);
|
|
free(ahc->platform_data, M_DEVBUF);
|
|
}
|
|
}
|
|
|
|
int
|
|
ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc)
|
|
{
|
|
/* We don't sort softcs under FreeBSD so report equal always */
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ahc_detach(device_t dev)
|
|
{
|
|
struct ahc_softc *ahc;
|
|
u_long l;
|
|
u_long s;
|
|
|
|
ahc_list_lock(&l);
|
|
device_printf(dev, "detaching device\n");
|
|
ahc = device_get_softc(dev);
|
|
ahc = ahc_find_softc(ahc);
|
|
if (ahc == NULL) {
|
|
device_printf(dev, "aic7xxx already detached\n");
|
|
ahc_list_unlock(&l);
|
|
return (ENOENT);
|
|
}
|
|
TAILQ_REMOVE(&ahc_tailq, ahc, links);
|
|
ahc_list_unlock(&l);
|
|
ahc_lock(ahc, &s);
|
|
ahc_intr_enable(ahc, FALSE);
|
|
bus_teardown_intr(dev, ahc->platform_data->irq, ahc->platform_data->ih);
|
|
ahc_unlock(ahc, &s);
|
|
ahc_free(ahc);
|
|
return (0);
|
|
}
|
|
|
|
#if UNUSED
|
|
static void
|
|
ahc_dump_targcmd(struct target_cmd *cmd)
|
|
{
|
|
uint8_t *byte;
|
|
uint8_t *last_byte;
|
|
int i;
|
|
|
|
byte = &cmd->initiator_channel;
|
|
/* Debugging info for received commands */
|
|
last_byte = &cmd[1].initiator_channel;
|
|
|
|
i = 0;
|
|
while (byte < last_byte) {
|
|
if (i == 0)
|
|
printf("\t");
|
|
printf("%#x", *byte++);
|
|
i++;
|
|
if (i == 8) {
|
|
printf("\n");
|
|
i = 0;
|
|
} else {
|
|
printf(", ");
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
ahc_modevent(module_t mod, int type, void *data)
|
|
{
|
|
/* XXX Deal with busy status on unload. */
|
|
return 0;
|
|
}
|
|
|
|
static moduledata_t ahc_mod = {
|
|
"ahc",
|
|
ahc_modevent,
|
|
NULL
|
|
};
|
|
|
|
DECLARE_MODULE(ahc, ahc_mod, SI_SUB_DRIVERS, SI_ORDER_MIDDLE);
|
|
MODULE_DEPEND(ahc, cam, 1, 1, 1);
|
|
MODULE_VERSION(ahc, 1);
|