78599c32ef
Follow-up to r353959 and r368070: do the same for other architectures. arm32 already seems to use its own .fnstart/.fnend directives, which appear to be ARM-specific variants of the same thing. Likewise, MIPS uses .frame directives. Reviewed by: arichardson Differential Revision: https://reviews.freebsd.org/D27387
385 lines
8.9 KiB
ArmAsm
385 lines
8.9 KiB
ArmAsm
/*-
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* Copyright (C) 2009-2011 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/syscall.h>
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#include <machine/trap.h>
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#include <machine/param.h>
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#include <machine/spr.h>
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#include <machine/asm.h>
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#include "opt_platform.h"
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#define OFWSTKSZ 4096 /* 4K Open Firmware stack */
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/*
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* Globals
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*/
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.data
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.align 4
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ofwstk:
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.space OFWSTKSZ
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rtas_regsave:
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.space 32 /* 4 * sizeof(register_t) */
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GLOBAL(ofmsr)
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.llong 0, 0, 0, 0, 0 /* msr/sprg0-3 used in Open Firmware */
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GLOBAL(rtasmsr)
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.llong 0
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GLOBAL(openfirmware_entry)
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.llong 0 /* Open Firmware entry point */
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GLOBAL(rtas_entry)
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.llong 0 /* RTAS entry point */
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TOC_ENTRY(ofmsr)
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TOC_ENTRY(ofwstk)
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TOC_ENTRY(rtasmsr)
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TOC_ENTRY(openfirmware_entry)
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TOC_ENTRY(rtas_entry)
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TOC_ENTRY(rtas_regsave)
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/*
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* Open Firmware Real-mode Entry Point. This is a huge pain.
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*/
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ASENTRY_NOPROF(ofwcall)
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mflr %r8
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std %r8,16(%r1)
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stdu %r1,-208(%r1)
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/*
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* We need to save the following, because OF's register save/
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* restore code assumes that the contents of registers are
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* at most 32 bits wide: lr, cr, r2, r13-r31, the old MSR. These
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* get placed in that order in the stack.
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*/
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mfcr %r4
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std %r4,48(%r1)
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std %r13,56(%r1)
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std %r14,64(%r1)
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std %r15,72(%r1)
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std %r16,80(%r1)
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std %r17,88(%r1)
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std %r18,96(%r1)
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std %r19,104(%r1)
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std %r20,112(%r1)
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std %r21,120(%r1)
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std %r22,128(%r1)
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std %r23,136(%r1)
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std %r24,144(%r1)
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std %r25,152(%r1)
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std %r26,160(%r1)
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std %r27,168(%r1)
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std %r28,176(%r1)
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std %r29,184(%r1)
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std %r30,192(%r1)
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std %r31,200(%r1)
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/* Record the old MSR */
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mfmsr %r6
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/* read client interface handler */
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addis %r4,%r2,TOC_REF(openfirmware_entry)@ha
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ld %r4,TOC_REF(openfirmware_entry)@l(%r4)
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ld %r4,0(%r4)
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/* Get OF stack pointer */
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addis %r7,%r2,TOC_REF(ofwstk)@ha
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ld %r7,TOC_REF(ofwstk)@l(%r7)
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addi %r7,%r7,OFWSTKSZ-40
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/*
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* Set the MSR to the OF value. This has the side effect of disabling
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* exceptions, which is important for the next few steps.
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* This does NOT, however, cause us to switch endianness.
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*/
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addis %r5,%r2,TOC_REF(ofmsr)@ha
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ld %r5,TOC_REF(ofmsr)@l(%r5)
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ld %r5,0(%r5)
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#if defined(__LITTLE_ENDIAN__) && defined(QEMU)
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/* QEMU hack: qemu does not emulate mtmsrd correctly! */
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ori %r5,%r5,1 /* Leave PSR_LE set */
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#endif
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mtmsrd %r5
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isync
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/*
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* Set up OF stack. This needs to be accessible in real mode and
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* use the 32-bit ABI stack frame format. The pointer to the current
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* kernel stack is placed at the very top of the stack along with
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* the old MSR so we can get them back later.
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*/
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mr %r5,%r1
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mr %r1,%r7
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std %r5,8(%r1) /* Save real stack pointer */
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std %r2,16(%r1) /* Save old TOC */
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std %r6,24(%r1) /* Save old MSR */
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std %r8,32(%r1) /* Save high 32-bits of the kernel's PC */
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li %r5,0
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stw %r5,4(%r1)
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stw %r5,0(%r1)
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#ifdef __LITTLE_ENDIAN__
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/* Atomic context switch w/ endian change */
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mtmsrd %r5, 1 /* Clear PSL_EE|PSL_RI */
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addis %r5,%r2,TOC_REF(ofmsr)@ha
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ld %r5,TOC_REF(ofmsr)@l(%r5)
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ld %r5,0(%r5)
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mtsrr0 %r4
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mtsrr1 %r5
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LOAD_LR_NIA
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1:
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mflr %r5
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addi %r5, %r5, (2f-1b)
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mtlr %r5
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li %r5, 0
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rfid
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2:
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RETURN_TO_NATIVE_ENDIAN
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#else
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/* Finally, branch to OF */
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mtctr %r4
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bctrl
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#endif
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/* Reload stack pointer, MSR, and reference PC from the OFW stack */
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ld %r7,32(%r1)
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ld %r6,24(%r1)
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ld %r2,16(%r1)
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ld %r1,8(%r1)
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/* Get back to the MSR/PC we want, using the cached high bits of PC */
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mtsrr1 %r6
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clrrdi %r7,%r7,32
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bl 1f
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1: mflr %r8
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or %r8,%r8,%r7
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addi %r8,%r8,2f-1b
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mtsrr0 %r8
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rfid /* Turn on MMU, exceptions, and 64-bit mode */
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2:
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/* Sign-extend the return value from OF */
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extsw %r3,%r3
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/* Restore all the non-volatile registers */
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ld %r5,48(%r1)
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mtcr %r5
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ld %r13,56(%r1)
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ld %r14,64(%r1)
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ld %r15,72(%r1)
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ld %r16,80(%r1)
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ld %r17,88(%r1)
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ld %r18,96(%r1)
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ld %r19,104(%r1)
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ld %r20,112(%r1)
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ld %r21,120(%r1)
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ld %r22,128(%r1)
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ld %r23,136(%r1)
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ld %r24,144(%r1)
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ld %r25,152(%r1)
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ld %r26,160(%r1)
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ld %r27,168(%r1)
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ld %r28,176(%r1)
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ld %r29,184(%r1)
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ld %r30,192(%r1)
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ld %r31,200(%r1)
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/* Restore the stack and link register */
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ld %r1,0(%r1)
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ld %r0,16(%r1)
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mtlr %r0
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blr
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ASEND(ofwcall)
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/*
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* RTAS 32-bit Entry Point. Similar to the OF one, but simpler (no separate
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* stack)
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*
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* C prototype: int rtascall(void *callbuffer, void *rtas_privdat);
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*/
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ASENTRY_NOPROF(rtascall)
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mflr %r9
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std %r9,16(%r1)
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stdu %r1,-208(%r1)
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/*
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* We need to save the following, because RTAS's register save/
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* restore code assumes that the contents of registers are
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* at most 32 bits wide: lr, cr, r2, r13-r31, the old MSR. These
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* get placed in that order in the stack.
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*/
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mfcr %r5
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std %r5,48(%r1)
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std %r13,56(%r1)
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std %r14,64(%r1)
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std %r15,72(%r1)
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std %r16,80(%r1)
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std %r17,88(%r1)
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std %r18,96(%r1)
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std %r19,104(%r1)
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std %r20,112(%r1)
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std %r21,120(%r1)
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std %r22,128(%r1)
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std %r23,136(%r1)
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std %r24,144(%r1)
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std %r25,152(%r1)
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std %r26,160(%r1)
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std %r27,168(%r1)
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std %r28,176(%r1)
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std %r29,184(%r1)
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std %r30,192(%r1)
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std %r31,200(%r1)
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/* Record the old MSR */
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mfmsr %r6
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/* Read RTAS entry and reg save area pointers */
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addis %r5,%r2,TOC_REF(rtas_entry)@ha
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ld %r5,TOC_REF(rtas_entry)@l(%r5)
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ld %r5,0(%r5)
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addis %r8,%r2,TOC_REF(rtas_regsave)@ha
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ld %r8,TOC_REF(rtas_regsave)@l(%r8)
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/*
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* Set the MSR to the RTAS value. This has the side effect of disabling
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* exceptions, which is important for the next few steps.
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*/
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addis %r7,%r2,TOC_REF(rtasmsr)@ha
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ld %r7,TOC_REF(rtasmsr)@l(%r7)
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ld %r7,0(%r7)
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#ifdef __LITTLE_ENDIAN__
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/* QEMU hack: qemu does not emulate mtmsrd correctly! */
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ori %r7,%r7,1 /* Leave PSR_LE set */
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#endif
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mtmsrd %r7
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isync
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/*
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* Set up RTAS register save area, so that we can get back all of
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* our 64-bit pointers. Save our stack pointer, the TOC, and the MSR.
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* Put this in r1, since RTAS is obliged to save it. Kernel globals
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* are below 4 GB, so this is safe.
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*/
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mr %r7,%r1
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mr %r1,%r8
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std %r7,0(%r1) /* Save 64-bit stack pointer */
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std %r2,8(%r1) /* Save TOC */
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std %r6,16(%r1) /* Save MSR */
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std %r9,24(%r1) /* Save reference PC for high 32 bits */
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#ifdef __LITTLE_ENDIAN__
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/* Atomic context switch w/ endian change */
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li %r7, 0
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mtmsrd %r7, 1 /* Clear PSL_EE|PSL_RI */
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addis %r7,%r2,TOC_REF(rtasmsr)@ha
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ld %r7,TOC_REF(rtasmsr)@l(%r7)
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ld %r7,0(%r7)
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mtsrr0 %r5
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mtsrr1 %r7
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LOAD_LR_NIA
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1:
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mflr %r5
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addi %r5, %r5, (2f-1b)
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mtlr %r5
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li %r5, 0
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rfid
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2:
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RETURN_TO_NATIVE_ENDIAN
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#else
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/* Finally, branch to RTAS */
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mtctr %r5
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bctrl
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#endif
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/*
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* Reload stack pointer, MSR, reg PC from the reg save area in r1. We
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* are running in 32-bit mode at this point, so it doesn't matter if r1
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* has become sign-extended.
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*/
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ld %r7,24(%r1)
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ld %r6,16(%r1)
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ld %r2,8(%r1)
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ld %r1,0(%r1)
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/*
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* Get back to the right PC. We need to atomically re-enable
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* exceptions, 64-bit mode, and the MMU. One thing that has likely
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* happened is that, if we were running in the high-memory direct
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* map, we no longer are as a result of LR truncation in RTAS.
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* Fix this by copying the high-order bits of the LR at function
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* entry onto the current PC and then jumping there while flipping
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* all the MSR bits.
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*/
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mtsrr1 %r6
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clrrdi %r7,%r7,32
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bl 1f
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1: mflr %r8
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or %r8,%r8,%r7
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addi %r8,%r8,2f-1b
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mtsrr0 %r8
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rfid /* Turn on MMU, exceptions, and 64-bit mode */
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2:
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/* Sign-extend the return value from RTAS */
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extsw %r3,%r3
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/* Restore all the non-volatile registers */
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ld %r5,48(%r1)
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mtcr %r5
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ld %r13,56(%r1)
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ld %r14,64(%r1)
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ld %r15,72(%r1)
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ld %r16,80(%r1)
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ld %r17,88(%r1)
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ld %r18,96(%r1)
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ld %r19,104(%r1)
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ld %r20,112(%r1)
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ld %r21,120(%r1)
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ld %r22,128(%r1)
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ld %r23,136(%r1)
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ld %r24,144(%r1)
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ld %r25,152(%r1)
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ld %r26,160(%r1)
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ld %r27,168(%r1)
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ld %r28,176(%r1)
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ld %r29,184(%r1)
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ld %r30,192(%r1)
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ld %r31,200(%r1)
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/* Restore the stack and link register */
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ld %r1,0(%r1)
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ld %r0,16(%r1)
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mtlr %r0
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blr
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ASEND(rtascall)
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