9d146ac5d1
we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
152 lines
5.2 KiB
C
152 lines
5.2 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)npx.h 5.3 (Berkeley) 1/18/91
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* $FreeBSD$
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*/
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/*
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* 287/387 NPX Coprocessor Data Structures and Constants
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* W. Jolitz 1/90
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*/
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#ifndef _MACHINE_NPX_H_
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#define _MACHINE_NPX_H_
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/* Environment information of floating point unit */
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struct env87 {
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long en_cw; /* control word (16bits) */
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long en_sw; /* status word (16bits) */
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long en_tw; /* tag word (16bits) */
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long en_fip; /* floating point instruction pointer */
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u_short en_fcs; /* floating code segment selector */
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u_short en_opcode; /* opcode last executed (11 bits ) */
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long en_foo; /* floating operand offset */
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long en_fos; /* floating operand segment selector */
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};
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/* Contents of each floating point accumulator */
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struct fpacc87 {
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#ifdef dontdef /* too unportable */
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u_long fp_mantlo; /* mantissa low (31:0) */
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u_long fp_manthi; /* mantissa high (63:32) */
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int fp_exp:15; /* exponent */
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int fp_sgn:1; /* mantissa sign */
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#else
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u_char fp_bytes[10];
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#endif
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};
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/* Floating point context */
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struct save87 {
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struct env87 sv_env; /* floating point control/status */
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struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
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u_long sv_ex_sw; /* status word for last exception */
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/*
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* Bogus padding for emulators. Emulators should use their own
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* struct and arrange to store into this struct (ending here)
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* before it is inspected for ptracing or for core dumps. Some
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* emulators overwrite the whole struct. We have no good way of
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* knowing how much padding to leave. Leave just enough for the
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* GPL emulator's i387_union (176 bytes total).
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*/
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u_char sv_pad[64]; /* padding; used by emulators */
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};
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struct envxmm {
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u_int16_t en_cw; /* control word (16bits) */
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u_int16_t en_sw; /* status word (16bits) */
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u_int16_t en_tw; /* tag word (16bits) */
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u_int16_t en_opcode; /* opcode last executed (11 bits ) */
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u_int32_t en_fip; /* floating point instruction pointer */
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u_int16_t en_fcs; /* floating code segment selector */
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u_int16_t en_pad0; /* padding */
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u_int32_t en_foo; /* floating operand offset */
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u_int16_t en_fos; /* floating operand segment selector */
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u_int16_t en_pad1; /* padding */
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u_int32_t en_mxcsr; /* SSE sontorol/status register */
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u_int32_t en_pad2; /* padding */
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};
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/* Contents of each SSE extended accumulator */
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struct xmmacc {
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u_char xmm_bytes[16];
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};
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struct savexmm {
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struct envxmm sv_env;
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struct {
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struct fpacc87 fp_acc;
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u_char fp_pad[6]; /* padding */
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} sv_fp[8];
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struct xmmacc sv_xmm[8];
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u_long sv_ex_sw; /* status word for last exception */
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u_char sv_pad[220];
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} __attribute__((aligned(16)));
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union savefpu {
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struct save87 sv_87;
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struct savexmm sv_xmm;
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};
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/*
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* The hardware default control word for i387's and later coprocessors is
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* 0x37F, giving:
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*
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* round to nearest
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* 64-bit precision
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* all exceptions masked.
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*
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* We modify the affine mode bit and precision bits in this to give:
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*
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* affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
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* 53-bit precision (2 in bitfield 3<<8)
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*
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* 64-bit precision often gives bad results with high level languages
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* because it makes the results of calculations depend on whether
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* intermediate values are stored in memory or in FPU registers.
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*/
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#define __INITIAL_NPXCW__ 0x127F
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#ifdef _KERNEL
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int npxdna __P((void));
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void npxexit __P((struct proc *p));
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void npxinit __P((int control));
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void npxsave __P((union savefpu *addr));
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int npxtrap __P((void));
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#endif
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#endif /* !_MACHINE_NPX_H_ */
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