f6b1c44d1f
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg. Lockfunc allows a driver to provide a function for managing its locking semantics while using busdma. At the moment, this is used for the asynchronous busdma_swi and callback mechanism. Two lockfunc implementations are provided: busdma_lock_mutex() performs standard mutex operations on the mutex that is specified from lockfuncarg. dftl_lock() is a panic implementation and is defaulted to when NULL, NULL are passed to bus_dma_tag_create(). The only time that NULL, NULL should ever be used is when the driver ensures that bus_dmamap_load() will not be deferred. Drivers that do not provide their own locking can pass busdma_lock_mutex,&Giant args in order to preserve the former behaviour. sparc64 and powerpc do not provide real busdma_swi functions, so this is largely a noop on those platforms. The busdma_swi on is64 is not properly locked yet, so warnings will be emitted on this platform when busdma callback deferrals happen. If anyone gets panics or warnings from dflt_lock() being called, please let me know right away. Reviewed by: tmm, gibbs
419 lines
10 KiB
C
419 lines
10 KiB
C
/* $FreeBSD$ */
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/* $NecBSD: ct_isa.c,v 1.6 1999/07/26 06:32:01 honda Exp $ */
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/* $NetBSD$ */
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/*
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1995, 1996, 1997, 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define SCSIBUS_RESCAN
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/queue.h>
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#include <sys/malloc.h>
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#include <sys/device_port.h>
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#include <sys/errno.h>
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#include <vm/vm.h>
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#ifdef __NetBSD__
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/scsipi/scsi_disk.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <machine/syspmgr.h>
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#include <i386/Cbus/dev/scsi_low.h>
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#include <dev/ic/wd33c93reg.h>
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#include <i386/Cbus/dev/ct/ctvar.h>
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#include <i386/Cbus/dev/ct/bshwvar.h>
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#endif /* __NetBSD__ */
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#ifdef __FreeBSD__
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/md_var.h>
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#include <pc98/pc98/pc98.h>
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#include <isa/isavar.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <cam/scsi/scsi_low.h>
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#include <dev/ic/wd33c93reg.h>
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#include <dev/ct/ctvar.h>
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#include <dev/ct/bshwvar.h>
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#endif /* __FreeBSD__ */
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#define BSHW_IOSZ 0x08
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#define BSHW_IOBASE 0xcc0
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#define BSHW_MEMSZ (PAGE_SIZE * 2)
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static int ct_isa_match(device_t);
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static int ct_isa_attach(device_t);
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static int ct_space_map(device_t, struct bshw *,
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struct resource **, struct resource **);
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static void ct_space_unmap(device_t, struct ct_softc *);
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static struct bshw *ct_find_hw(device_t);
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static void ct_dmamap(void *, bus_dma_segment_t *, int, int);
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static void ct_isa_bus_access_weight(struct ct_bus_access_handle *);
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static void ct_isa_dmasync_before(struct ct_softc *);
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static void ct_isa_dmasync_after(struct ct_softc *);
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struct ct_isa_softc {
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struct ct_softc sc_ct;
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struct bshw_softc sc_bshw;
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};
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static struct isa_pnp_id ct_pnp_ids[] = {
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{ 0x0100e7b1, "Logitec LHA-301" },
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{ 0x110154dc, "I-O DATA SC-98III" },
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{ 0x4120acb4, "MELCO IFC-NN" },
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{ 0, NULL }
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};
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static device_method_t ct_isa_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ct_isa_match),
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DEVMETHOD(device_attach, ct_isa_attach),
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{ 0, 0 }
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};
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static driver_t ct_isa_driver = {
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"ct", ct_isa_methods, sizeof(struct ct_isa_softc),
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};
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static devclass_t ct_devclass;
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DRIVER_MODULE(ct, isa, ct_isa_driver, ct_devclass, 0, 0);
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static int
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ct_isa_match(device_t dev)
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{
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struct bshw *hw;
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struct resource *port_res, *mem_res;
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struct ct_bus_access_handle ch;
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int rv;
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if (ISA_PNP_PROBE(device_get_parent(dev), dev, ct_pnp_ids) == ENXIO)
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return ENXIO;
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switch (isa_get_logicalid(dev)) {
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case 0x0100e7b1: /* LHA-301 */
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case 0x110154dc: /* SC-98III */
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case 0x4120acb4: /* IFC-NN */
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/* XXX - force to SMIT mode */
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device_set_flags(dev, device_get_flags(dev) | 0x40000);
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break;
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}
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if (isa_get_port(dev) == -1)
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bus_set_resource(dev, SYS_RES_IOPORT, 0,
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BSHW_IOBASE, BSHW_IOSZ);
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if ((hw = ct_find_hw(dev)) == NULL)
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return ENXIO;
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if (ct_space_map(dev, hw, &port_res, &mem_res) != 0)
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return ENXIO;
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bzero(&ch, sizeof(ch));
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ch.ch_iot = rman_get_bustag(port_res);
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ch.ch_ioh = rman_get_bushandle(port_res),
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ch.ch_bus_weight = ct_isa_bus_access_weight;
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rv = ctprobesubr(&ch, 0, BSHW_DEFAULT_HOSTID,
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BSHW_DEFAULT_CHIPCLK, NULL);
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if (rv != 0)
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{
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struct bshw_softc bshw_tab;
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struct bshw_softc *bs = &bshw_tab;
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memset(bs, 0, sizeof(*bs));
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bshw_read_settings(&ch, bs);
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bus_set_resource(dev, SYS_RES_IRQ, 0, bs->sc_irq, 1);
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bus_set_resource(dev, SYS_RES_DRQ, 0, bs->sc_drq, 1);
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}
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bus_release_resource(dev, SYS_RES_IOPORT, 0, port_res);
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if (mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, mem_res);
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if (rv != 0)
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return 0;
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return ENXIO;
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}
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static int
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ct_isa_attach(device_t dev)
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{
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struct ct_isa_softc *pct = device_get_softc(dev);
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struct ct_softc *ct = &pct->sc_ct;
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struct ct_bus_access_handle *chp = &ct->sc_ch;
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struct scsi_low_softc *slp = &ct->sc_sclow;
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struct bshw_softc *bs = &pct->sc_bshw;
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struct bshw *hw;
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int irq_rid, drq_rid, chiprev;
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u_int8_t *vaddr;
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bus_addr_t addr;
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intrmask_t s;
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hw = ct_find_hw(dev);
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if (ct_space_map(dev, hw, &ct->port_res, &ct->mem_res) != 0) {
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device_printf(dev, "bus io mem map failed\n");
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return ENXIO;
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}
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bzero(chp, sizeof(*chp));
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chp->ch_iot = rman_get_bustag(ct->port_res);
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chp->ch_ioh = rman_get_bushandle(ct->port_res);
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if (ct->mem_res) {
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chp->ch_memt = rman_get_bustag(ct->mem_res);
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chp->ch_memh = rman_get_bushandle(ct->mem_res);
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}
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chp->ch_bus_weight = ct_isa_bus_access_weight;
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irq_rid = 0;
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ct->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &irq_rid, 0, ~0,
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1, RF_ACTIVE);
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drq_rid = 0;
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ct->drq_res = bus_alloc_resource(dev, SYS_RES_DRQ, &drq_rid, 0, ~0,
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1, RF_ACTIVE);
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if (ct->irq_res == NULL || ct->drq_res == NULL) {
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ct_space_unmap(dev, ct);
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return ENXIO;
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}
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if (ctprobesubr(chp, 0, BSHW_DEFAULT_HOSTID,
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BSHW_DEFAULT_CHIPCLK, &chiprev) == 0)
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{
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device_printf(dev, "hardware missing\n");
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ct_space_unmap(dev, ct);
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return ENXIO;
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}
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/* setup DMA map */
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if (bus_dma_tag_create(NULL, 1, 0,
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BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, MAXBSIZE, 1,
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BUS_SPACE_MAXSIZE_32BIT,
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BUS_DMA_ALLOCNOW, NULL, NULL,
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&ct->sc_dmat) != 0) {
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device_printf(dev, "can't set up ISA DMA map\n");
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ct_space_unmap(dev, ct);
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return ENXIO;
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}
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if (bus_dmamem_alloc(ct->sc_dmat, (void **)&vaddr, BUS_DMA_NOWAIT,
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&ct->sc_dmamapt) != 0) {
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device_printf(dev, "can't set up ISA DMA map\n");
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ct_space_unmap(dev, ct);
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return ENXIO;
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}
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bus_dmamap_load(ct->sc_dmat, ct->sc_dmamapt, vaddr, MAXBSIZE,
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ct_dmamap, &addr, BUS_DMA_NOWAIT);
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/* setup machdep softc */
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bs->sc_hw = hw;
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bs->sc_io_control = 0;
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bs->sc_bounce_phys = (u_int8_t *)addr;
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bs->sc_bounce_addr = vaddr;
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bs->sc_bounce_size = MAXBSIZE;
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bs->sc_minphys = (1 << 24);
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bs->sc_dmasync_before = ct_isa_dmasync_before;
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bs->sc_dmasync_after = ct_isa_dmasync_after;
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bshw_read_settings(chp, bs);
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/* setup ct driver softc */
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ct->ct_hw = bs;
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ct->ct_dma_xfer_start = bshw_dma_xfer_start;
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ct->ct_pio_xfer_start = bshw_smit_xfer_start;
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ct->ct_dma_xfer_stop = bshw_dma_xfer_stop;
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ct->ct_pio_xfer_stop = bshw_smit_xfer_stop;
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ct->ct_bus_reset = bshw_bus_reset;
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ct->ct_synch_setup = bshw_synch_setup;
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ct->sc_xmode = CT_XMODE_DMA;
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if (chp->ch_memh != NULL)
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ct->sc_xmode |= CT_XMODE_PIO;
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ct->sc_chiprev = chiprev;
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switch (chiprev)
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{
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case CT_WD33C93:
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/* s = "WD33C93"; */
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ct->sc_chipclk = 8;
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break;
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case CT_WD33C93_A:
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if (DVCFG_MAJOR(device_get_flags(dev)) > 0)
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{
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/* s = "AM33C93_A"; */
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ct->sc_chipclk = 20;
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ct->sc_chiprev = CT_AM33C93_A;
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}
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else
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{
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/* s = "WD33C93_A"; */
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ct->sc_chipclk = 10;
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}
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break;
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case CT_AM33C93_A:
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/* s = "AM33C93_A"; */
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ct->sc_chipclk = 20;
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break;
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default:
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case CT_WD33C93_B:
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/* s = "WD33C93_B"; */
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ct->sc_chipclk = 20;
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break;
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}
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#if 0
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printf("%s: chiprev %s chipclk %d Mhz\n",
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slp->sl_dev.dv_xname, s, ct->sc_chipclk);
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#endif
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slp->sl_dev = dev;
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slp->sl_hostid = bs->sc_hostid;
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slp->sl_irq = isa_get_irq(dev);
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slp->sl_cfgflags = device_get_flags(dev);
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s = splcam();
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ctattachsubr(ct);
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splx(s);
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if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM,
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(driver_intr_t *)ctintr, ct, &ct->sc_ih)) {
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ct_space_unmap(dev, ct);
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return ENXIO;
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}
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return 0;
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}
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static struct bshw *
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ct_find_hw(device_t dev)
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{
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return DVCFG_HW(&bshw_hwsel, DVCFG_MAJOR(device_get_flags(dev)));
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}
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static int
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ct_space_map(device_t dev, struct bshw *hw,
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struct resource **iohp, struct resource **memhp)
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{
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int port_rid, mem_rid;
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*memhp = NULL;
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port_rid = 0;
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*iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0, ~0,
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BSHW_IOSZ, RF_ACTIVE);
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if (*iohp == NULL)
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return ENXIO;
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if ((hw->hw_flags & BSHW_SMFIFO) == 0 || isa_get_maddr(dev) == -1)
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return 0;
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mem_rid = 0;
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*memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0, ~0,
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BSHW_MEMSZ, RF_ACTIVE);
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if (*memhp == NULL) {
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bus_release_resource(dev, SYS_RES_IOPORT, port_rid, *iohp);
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return ENXIO;
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}
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return 0;
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}
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static void
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ct_space_unmap(device_t dev, struct ct_softc *ct)
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{
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if (ct->port_res != NULL)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, ct->port_res);
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if (ct->mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, ct->mem_res);
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if (ct->irq_res != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, ct->irq_res);
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if (ct->drq_res != NULL)
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bus_release_resource(dev, SYS_RES_DRQ, 0, ct->drq_res);
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}
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static void
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ct_dmamap(void *arg, bus_dma_segment_t *seg, int nseg, int error)
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{
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bus_addr_t *addr = (bus_addr_t *)arg;
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*addr = seg->ds_addr;
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}
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static void
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ct_isa_bus_access_weight(chp)
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struct ct_bus_access_handle *chp;
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{
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outb(0x5f, 0);
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}
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static void
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ct_isa_dmasync_before(ct)
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struct ct_softc *ct;
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{
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if (need_pre_dma_flush)
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wbinvd();
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}
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static void
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ct_isa_dmasync_after(ct)
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struct ct_softc *ct;
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{
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if (need_post_dma_flush)
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invd();
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}
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