f6b1c44d1f
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg. Lockfunc allows a driver to provide a function for managing its locking semantics while using busdma. At the moment, this is used for the asynchronous busdma_swi and callback mechanism. Two lockfunc implementations are provided: busdma_lock_mutex() performs standard mutex operations on the mutex that is specified from lockfuncarg. dftl_lock() is a panic implementation and is defaulted to when NULL, NULL are passed to bus_dma_tag_create(). The only time that NULL, NULL should ever be used is when the driver ensures that bus_dmamap_load() will not be deferred. Drivers that do not provide their own locking can pass busdma_lock_mutex,&Giant args in order to preserve the former behaviour. sparc64 and powerpc do not provide real busdma_swi functions, so this is largely a noop on those platforms. The busdma_swi on is64 is not properly locked yet, so warnings will be emitted on this platform when busdma callback deferrals happen. If anyone gets panics or warnings from dflt_lock() being called, please let me know right away. Reviewed by: tmm, gibbs
895 lines
27 KiB
C
895 lines
27 KiB
C
/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
|
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
* must display the following acknowledgement:
|
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* This product includes software developed by the University of
|
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
|
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* may be used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1999 Eduardo Horvath
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* Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
|
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)sbus.c 8.1 (Berkeley) 6/11/93
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* from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
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*
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* $FreeBSD$
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*/
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/*
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* Sbus support.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/pcpu.h>
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#include <sys/reboot.h>
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#include <ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/bus_private.h>
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#include <machine/iommureg.h>
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#include <machine/bus_common.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/nexusvar.h>
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#include <machine/ofw_upa.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <machine/iommuvar.h>
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#include <sparc64/sbus/ofw_sbus.h>
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#include <sparc64/sbus/sbusreg.h>
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#include <sparc64/sbus/sbusvar.h>
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#ifdef DEBUG
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#define SDB_DVMA 0x1
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#define SDB_INTR 0x2
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int sbus_debug = 0;
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#define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0)
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#else
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#define DPRINTF(l, s)
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#endif
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struct sbus_devinfo {
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int sdi_burstsz;
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char *sdi_compat;
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char *sdi_name; /* PROM name */
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phandle_t sdi_node; /* PROM node */
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int sdi_slot;
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char *sdi_type; /* PROM name */
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struct resource_list sdi_rl;
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};
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/* Range descriptor, allocated for each sc_range. */
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struct sbus_rd {
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bus_addr_t rd_poffset;
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bus_addr_t rd_pend;
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int rd_slot;
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bus_addr_t rd_coffset;
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bus_addr_t rd_cend;
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struct rman rd_rman;
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bus_space_handle_t rd_bushandle;
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struct resource *rd_res;
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};
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struct sbus_softc {
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bus_space_tag_t sc_bustag;
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bus_space_handle_t sc_bushandle;
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bus_dma_tag_t sc_dmatag;
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bus_dma_tag_t sc_cdmatag;
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bus_space_tag_t sc_cbustag;
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int sc_clockfreq; /* clock frequency (in Hz) */
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struct upa_regs *sc_reg;
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int sc_nreg;
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int sc_nrange;
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struct sbus_rd *sc_rd;
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int sc_burst; /* burst transfer sizes supported */
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int *sc_intr_compat;/* `intr' property to sbus compat */
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struct resource *sc_sysio_res;
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int sc_ign; /* Interrupt group number for this sysio */
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struct iommu_state sc_is; /* IOMMU state, see iommureg.h */
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struct resource *sc_ot_ires;
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void *sc_ot_ihand;
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struct resource *sc_pf_ires;
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void *sc_pf_ihand;
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};
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struct sbus_clr {
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struct sbus_softc *scl_sc;
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bus_addr_t scl_clr; /* clear register */
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driver_intr_t *scl_handler; /* handler to call */
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void *scl_arg; /* argument for the handler */
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void *scl_cookie; /* interrupt cookie of parent bus */
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};
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#define SYSIO_READ8(sc, off) \
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bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off))
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#define SYSIO_WRITE8(sc, off, v) \
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bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v))
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static int sbus_probe(device_t dev);
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static int sbus_print_child(device_t dev, device_t child);
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static void sbus_probe_nomatch(device_t dev, device_t child);
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static int sbus_read_ivar(device_t, device_t, int, u_long *);
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static struct resource_list *sbus_get_resource_list(device_t dev,
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device_t child);
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static int sbus_setup_intr(device_t, device_t, struct resource *, int,
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driver_intr_t *, void *, void **);
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static int sbus_teardown_intr(device_t, device_t, struct resource *, void *);
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static struct resource *sbus_alloc_resource(device_t, device_t, int, int *,
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u_long, u_long, u_long, u_int);
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static int sbus_activate_resource(device_t, device_t, int, int,
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struct resource *);
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static int sbus_deactivate_resource(device_t, device_t, int, int,
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struct resource *);
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static int sbus_release_resource(device_t, device_t, int, int,
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struct resource *);
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static struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc,
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phandle_t node, char *name);
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static void sbus_destroy_dinfo(struct sbus_devinfo *dinfo);
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static void sbus_intr_stub(void *);
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static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
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static void sbus_overtemp(void *);
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static void sbus_pwrfail(void *);
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static device_method_t sbus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, sbus_probe),
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DEVMETHOD(device_attach, bus_generic_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, sbus_print_child),
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DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
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DEVMETHOD(bus_read_ivar, sbus_read_ivar),
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DEVMETHOD(bus_setup_intr, sbus_setup_intr),
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DEVMETHOD(bus_teardown_intr, sbus_teardown_intr),
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DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
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DEVMETHOD(bus_activate_resource, sbus_activate_resource),
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DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource),
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DEVMETHOD(bus_release_resource, sbus_release_resource),
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DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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{ 0, 0 }
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};
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static driver_t sbus_driver = {
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"sbus",
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sbus_methods,
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sizeof(struct sbus_softc),
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};
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static devclass_t sbus_devclass;
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DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0);
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#define OFW_SBUS_TYPE "sbus"
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#define OFW_SBUS_NAME "sbus"
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static int
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sbus_probe(device_t dev)
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{
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struct sbus_softc *sc = device_get_softc(dev);
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struct sbus_devinfo *sdi;
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struct sbus_ranges *range;
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struct resource *res;
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device_t cdev;
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bus_addr_t phys;
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bus_size_t size;
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char *name, *cname, *t;
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phandle_t child, node = nexus_get_node(dev);
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u_int64_t mr;
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int intr, clock, rid, vec, i;
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t = nexus_get_device_type(dev);
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if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
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strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0)
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return (ENXIO);
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device_set_desc(dev, "U2S UPA-SBus bridge");
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if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg),
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(void **)&sc->sc_reg)) == -1) {
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panic("sbus_probe: error getting reg property");
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}
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if (sc->sc_nreg < 1)
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panic("sbus_probe: bogus properties");
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phys = UPA_REG_PHYS(&sc->sc_reg[0]);
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size = UPA_REG_SIZE(&sc->sc_reg[0]);
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rid = 0;
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sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
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phys + size - 1, size, RF_ACTIVE);
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if (sc->sc_sysio_res == NULL ||
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rman_get_start(sc->sc_sysio_res) != phys)
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panic("sbus_probe: can't allocate device memory");
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sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res);
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sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res);
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if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1)
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panic("sbus_probe: cannot get IGN");
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sc->sc_ign = intr & INTMAP_IGN_MASK; /* Find interrupt group no */
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sc->sc_cbustag = sbus_alloc_bustag(sc);
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/*
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* Record clock frequency for synchronous SCSI.
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* IS THIS THE CORRECT DEFAULT??
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*/
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if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1)
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clock = 25000000;
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sc->sc_clockfreq = clock;
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clock /= 1000;
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device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000);
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/*
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* Collect address translations from the OBP.
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*/
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if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
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sizeof(*range), (void **)&range)) == -1) {
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panic("%s: error getting ranges property",
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device_get_name(dev));
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}
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sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
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M_DEVBUF, M_NOWAIT);
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if (sc->sc_rd == NULL)
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panic("sbus_probe: could not allocate rmans");
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/*
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* Preallocate all space that the SBus bridge decodes, so that nothing
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* else gets in the way; set up rmans etc.
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*/
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for (i = 0; i < sc->sc_nrange; i++) {
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phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
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size = range[i].size;
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sc->sc_rd[i].rd_slot = range[i].cspace;
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sc->sc_rd[i].rd_coffset = range[i].coffset;
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sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
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rid = 0;
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if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
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phys + size - 1, size, RF_ACTIVE)) == NULL)
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panic("sbus_probe: could not allocate decoded range");
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sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
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sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
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sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
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if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
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rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
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panic("sbus_probe: failed to set up memory rman");
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sc->sc_rd[i].rd_poffset = phys;
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sc->sc_rd[i].rd_pend = phys + size;
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sc->sc_rd[i].rd_res = res;
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}
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free(range, M_OFWPROP);
|
|
|
|
/*
|
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* Get the SBus burst transfer size if burst transfers are supported.
|
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* XXX: is the default correct?
|
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*/
|
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if (OF_getprop(node, "burst-sizes", &sc->sc_burst,
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sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
|
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sc->sc_burst = SBUS_BURST_DEF;
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|
|
/* initalise the IOMMU */
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|
|
|
/* punch in our copies */
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sc->sc_is.is_bustag = sc->sc_bustag;
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sc->sc_is.is_bushandle = sc->sc_bushandle;
|
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sc->sc_is.is_iommu = SBR_IOMMU;
|
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sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
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sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
|
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sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
|
|
sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
|
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sc->sc_is.is_dtcmp = 0;
|
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sc->sc_is.is_sb[0] = SBR_STRBUF;
|
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sc->sc_is.is_sb[1] = NULL;
|
|
|
|
/* give us a nice name.. */
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name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
|
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if (name == 0)
|
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panic("sbus_probe: couldn't malloc iommu name");
|
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snprintf(name, 32, "%s dvma", device_get_name(dev));
|
|
|
|
/*
|
|
* Note: the SBus IOMMU ignores the high bits of an address, so a NULL
|
|
* DMA pointer will be translated by the first page of the IOTSB.
|
|
* To detect bugs we'll allocate and ignore the first entry.
|
|
*/
|
|
iommu_init(name, &sc->sc_is, 3, -1, 1);
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|
|
|
/* Create the DMA tag. */
|
|
sc->sc_dmatag = nexus_get_dmatag(dev);
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|
if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL,
|
|
0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
|
|
panic("bus_dma_tag_create failed");
|
|
/* Customize the tag. */
|
|
sc->sc_cdmatag->dt_cookie = &sc->sc_is;
|
|
sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
|
|
/* XXX: register as root dma tag (kludge). */
|
|
sparc64_root_dma_tag = sc->sc_cdmatag;
|
|
|
|
/* Enable the over-temperature and power-fail intrrupts. */
|
|
rid = 0;
|
|
mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP);
|
|
vec = INTVEC(mr);
|
|
if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
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|
vec, 1, RF_ACTIVE)) == NULL)
|
|
panic("sbus_probe: failed to get temperature interrupt");
|
|
bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST,
|
|
sbus_overtemp, sc, &sc->sc_ot_ihand);
|
|
SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
|
|
rid = 0;
|
|
mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP);
|
|
vec = INTVEC(mr);
|
|
if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
|
|
vec, 1, RF_ACTIVE)) == NULL)
|
|
panic("sbus_probe: failed to get power fail interrupt");
|
|
bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST,
|
|
sbus_pwrfail, sc, &sc->sc_pf_ihand);
|
|
SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
|
|
|
|
/* Initialize the counter-timer. */
|
|
sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0);
|
|
|
|
/*
|
|
* Loop through ROM children, fixing any relative addresses
|
|
* and then configuring each device.
|
|
* `specials' is an array of device names that are treated
|
|
* specially:
|
|
*/
|
|
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
|
|
if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1)
|
|
continue;
|
|
|
|
if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) {
|
|
device_printf(dev, "<%s>: incomplete\n", cname);
|
|
free(cname, M_OFWPROP);
|
|
continue;
|
|
}
|
|
if ((cdev = device_add_child(dev, NULL, -1)) == NULL)
|
|
panic("sbus_probe: device_add_child failed");
|
|
device_set_ivars(cdev, sdi);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static struct sbus_devinfo *
|
|
sbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
struct sbus_regs *reg;
|
|
u_int32_t base, iv, *intr;
|
|
int i, nreg, nintr, slot, rslot;
|
|
|
|
sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
|
|
if (sdi == NULL)
|
|
return (NULL);
|
|
resource_list_init(&sdi->sdi_rl);
|
|
sdi->sdi_name = name;
|
|
sdi->sdi_node = node;
|
|
OF_getprop_alloc(node, "compat", 1, (void **)&sdi->sdi_compat);
|
|
OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type);
|
|
slot = -1;
|
|
nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
|
|
if (nreg == -1) {
|
|
if (sdi->sdi_type == NULL ||
|
|
strcmp(sdi->sdi_type, "hierarchical") != 0) {
|
|
sbus_destroy_dinfo(sdi);
|
|
return (NULL);
|
|
}
|
|
} else {
|
|
for (i = 0; i < nreg; i++) {
|
|
base = reg[i].sbr_offset;
|
|
if (SBUS_ABS(base)) {
|
|
rslot = SBUS_ABS_TO_SLOT(base);
|
|
base = SBUS_ABS_TO_OFFSET(base);
|
|
} else
|
|
rslot = reg[i].sbr_slot;
|
|
if (slot != -1 && slot != rslot)
|
|
panic("sbus_setup_dinfo: multiple slots");
|
|
slot = rslot;
|
|
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
|
|
base, base + reg[i].sbr_size, reg[i].sbr_size);
|
|
}
|
|
free(reg, M_OFWPROP);
|
|
}
|
|
sdi->sdi_slot = slot;
|
|
|
|
/*
|
|
* The `interrupts' property contains the Sbus interrupt level.
|
|
*/
|
|
nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), (void **)&intr);
|
|
if (nintr != -1) {
|
|
for (i = 0; i < nintr; i++) {
|
|
iv = intr[i];
|
|
/*
|
|
* Sbus card devices need the slot number encoded into
|
|
* the vector as this is generally not done.
|
|
*/
|
|
if ((iv & INTMAP_OBIO_MASK) == 0)
|
|
iv |= slot << 3;
|
|
/* Set the ign as appropriate. */
|
|
iv |= sc->sc_ign;
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
|
|
iv, iv, 1);
|
|
}
|
|
free(intr, M_OFWPROP);
|
|
}
|
|
if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
|
|
sizeof(sdi->sdi_burstsz)) == -1)
|
|
sdi->sdi_burstsz = sc->sc_burst;
|
|
else
|
|
sdi->sdi_burstsz &= sc->sc_burst;
|
|
|
|
return (sdi);
|
|
}
|
|
|
|
/* Free everything except sdi_name, which is handled separately. */
|
|
static void
|
|
sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
|
|
{
|
|
|
|
resource_list_free(&dinfo->sdi_rl);
|
|
if (dinfo->sdi_compat != NULL)
|
|
free(dinfo->sdi_compat, M_OFWPROP);
|
|
if (dinfo->sdi_type != NULL)
|
|
free(dinfo->sdi_type, M_OFWPROP);
|
|
free(dinfo, M_DEVBUF);
|
|
}
|
|
|
|
static int
|
|
sbus_print_child(device_t dev, device_t child)
|
|
{
|
|
struct sbus_devinfo *dinfo;
|
|
struct resource_list *rl;
|
|
int rv;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
rl = &dinfo->sdi_rl;
|
|
rv = bus_print_child_header(dev, child);
|
|
rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
|
|
rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
|
|
rv += bus_print_child_footer(dev, child);
|
|
return (rv);
|
|
}
|
|
|
|
static void
|
|
sbus_probe_nomatch(device_t dev, device_t child)
|
|
{
|
|
char *name;
|
|
char *type;
|
|
|
|
if (BUS_READ_IVAR(dev, child, SBUS_IVAR_NAME,
|
|
(uintptr_t *)&name) != 0 ||
|
|
BUS_READ_IVAR(dev, child, SBUS_IVAR_DEVICE_TYPE,
|
|
(uintptr_t *)&type) != 0)
|
|
return;
|
|
|
|
if (type == NULL)
|
|
type = "(unknown)";
|
|
device_printf(dev, "<%s>, type %s (no driver attached)\n",
|
|
name, type);
|
|
}
|
|
|
|
static int
|
|
sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
|
{
|
|
struct sbus_softc *sc = device_get_softc(dev);
|
|
struct sbus_devinfo *dinfo;
|
|
|
|
if ((dinfo = device_get_ivars(child)) == NULL)
|
|
return (ENOENT);
|
|
switch (which) {
|
|
case SBUS_IVAR_BURSTSZ:
|
|
*result = dinfo->sdi_burstsz;
|
|
break;
|
|
case SBUS_IVAR_CLOCKFREQ:
|
|
*result = sc->sc_clockfreq;
|
|
break;
|
|
case SBUS_IVAR_COMPAT:
|
|
*result = (uintptr_t)dinfo->sdi_compat;
|
|
break;
|
|
case SBUS_IVAR_NAME:
|
|
*result = (uintptr_t)dinfo->sdi_name;
|
|
break;
|
|
case SBUS_IVAR_NODE:
|
|
*result = dinfo->sdi_node;
|
|
break;
|
|
case SBUS_IVAR_SLOT:
|
|
*result = dinfo->sdi_slot;
|
|
break;
|
|
case SBUS_IVAR_DEVICE_TYPE:
|
|
*result = (uintptr_t)dinfo->sdi_type;
|
|
break;
|
|
default:
|
|
return (ENOENT);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct resource_list *
|
|
sbus_get_resource_list(device_t dev, device_t child)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
|
|
sdi = device_get_ivars(child);
|
|
return (&sdi->sdi_rl);
|
|
}
|
|
|
|
/* Write to the correct clr register, and call the actual handler. */
|
|
static void
|
|
sbus_intr_stub(void *arg)
|
|
{
|
|
struct sbus_clr *scl;
|
|
|
|
scl = (struct sbus_clr *)arg;
|
|
scl->scl_handler(scl->scl_arg);
|
|
SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0);
|
|
}
|
|
|
|
static int
|
|
sbus_setup_intr(device_t dev, device_t child,
|
|
struct resource *ires, int flags, driver_intr_t *intr, void *arg,
|
|
void **cookiep)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct sbus_clr *scl;
|
|
bus_addr_t intrmapptr, intrclrptr, intrptr;
|
|
u_int64_t intrmap;
|
|
u_int32_t inr, slot;
|
|
int error, i;
|
|
long vec = rman_get_start(ires);
|
|
|
|
sc = (struct sbus_softc *)device_get_softc(dev);
|
|
scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT);
|
|
if (scl == NULL)
|
|
return (NULL);
|
|
intrptr = intrmapptr = intrclrptr = 0;
|
|
intrmap = 0;
|
|
inr = INTVEC(vec);
|
|
if ((inr & INTMAP_OBIO_MASK) == 0) {
|
|
/*
|
|
* We're in an SBUS slot, register the map and clear
|
|
* intr registers.
|
|
*/
|
|
slot = INTSLOT(vec);
|
|
intrmapptr = SBR_SLOT0_INT_MAP + slot * 8;
|
|
intrclrptr = SBR_SLOT0_INT_CLR +
|
|
(slot * 8 * 8) + (INTPRI(vec) * 8);
|
|
/* Enable the interrupt, insert IGN. */
|
|
intrmap = inr | sc->sc_ign;
|
|
} else {
|
|
intrptr = SBR_SCSI_INT_MAP;
|
|
/* Insert IGN */
|
|
inr |= sc->sc_ign;
|
|
for (i = 0; intrptr <= SBR_RESERVED_INT_MAP &&
|
|
INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) !=
|
|
INTVEC(inr); intrptr += 8, i++)
|
|
;
|
|
if (INTVEC(intrmap) == INTVEC(inr)) {
|
|
/* Register the map and clear intr registers */
|
|
intrmapptr = intrptr;
|
|
intrclrptr = SBR_SCSI_INT_CLR + i * 8;
|
|
/* Enable the interrupt */
|
|
} else
|
|
panic("sbus_setup_intr: IRQ not found!");
|
|
}
|
|
|
|
scl->scl_sc = sc;
|
|
scl->scl_arg = arg;
|
|
scl->scl_handler = intr;
|
|
scl->scl_clr = intrclrptr;
|
|
/* Disable the interrupt while we fiddle with it */
|
|
SYSIO_WRITE8(sc, intrmapptr, intrmap);
|
|
error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
|
|
sbus_intr_stub, scl, cookiep);
|
|
if (error != 0) {
|
|
free(scl, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
scl->scl_cookie = *cookiep;
|
|
*cookiep = scl;
|
|
|
|
/*
|
|
* Clear the interrupt, it might have been triggered before it was
|
|
* set up.
|
|
*/
|
|
SYSIO_WRITE8(sc, intrclrptr, 0);
|
|
/*
|
|
* Enable the interrupt and program the target module now we have the
|
|
* handler installed.
|
|
*/
|
|
SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid)));
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
sbus_teardown_intr(device_t dev, device_t child,
|
|
struct resource *vec, void *cookie)
|
|
{
|
|
struct sbus_clr *scl;
|
|
int error;
|
|
|
|
scl = (struct sbus_clr *)cookie;
|
|
error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
|
|
scl->scl_cookie);
|
|
/*
|
|
* Don't disable the interrupt for now, so that stray interupts get
|
|
* detected...
|
|
*/
|
|
if (error != 0)
|
|
free(scl, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* There is no need to handle pass-throughs here; there are no bridges to
|
|
* SBuses.
|
|
*/
|
|
static struct resource *
|
|
sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct sbus_devinfo *sdi;
|
|
struct rman *rm;
|
|
struct resource *rv;
|
|
struct resource_list *rl;
|
|
struct resource_list_entry *rle;
|
|
bus_space_handle_t bh;
|
|
bus_addr_t toffs;
|
|
bus_size_t tend;
|
|
int i;
|
|
int isdefault = (start == 0UL && end == ~0UL);
|
|
int needactivate = flags & RF_ACTIVE;
|
|
|
|
sc = (struct sbus_softc *)device_get_softc(bus);
|
|
sdi = device_get_ivars(child);
|
|
rl = &sdi->sdi_rl;
|
|
rle = resource_list_find(rl, type, *rid);
|
|
if (rle == NULL)
|
|
return (NULL);
|
|
if (rle->res != NULL)
|
|
panic("sbus_alloc_resource: resource entry is busy");
|
|
if (isdefault) {
|
|
start = rle->start;
|
|
count = ulmax(count, rle->count);
|
|
end = ulmax(rle->end, start + count - 1);
|
|
}
|
|
switch (type) {
|
|
case SYS_RES_IRQ:
|
|
rv = BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
|
|
rid, start, end, count, flags);
|
|
if (rv == NULL)
|
|
return (NULL);
|
|
break;
|
|
case SYS_RES_MEMORY:
|
|
rm = NULL;
|
|
bh = toffs = tend = 0;
|
|
for (i = 0; i < sc->sc_nrange; i++) {
|
|
if (sc->sc_rd[i].rd_slot != sdi->sdi_slot ||
|
|
start < sc->sc_rd[i].rd_coffset ||
|
|
start > sc->sc_rd[i].rd_cend)
|
|
continue;
|
|
/* Disallow cross-range allocations. */
|
|
if (end > sc->sc_rd[i].rd_cend)
|
|
return (NULL);
|
|
/* We've found the connection to the parent bus */
|
|
toffs = start - sc->sc_rd[i].rd_coffset;
|
|
tend = end - sc->sc_rd[i].rd_coffset;
|
|
rm = &sc->sc_rd[i].rd_rman;
|
|
bh = sc->sc_rd[i].rd_bushandle;
|
|
}
|
|
if (toffs == NULL)
|
|
return (NULL);
|
|
flags &= ~RF_ACTIVE;
|
|
rv = rman_reserve_resource(rm, toffs, tend, count, flags,
|
|
child);
|
|
if (rv == NULL)
|
|
return (NULL);
|
|
rman_set_bustag(rv, sc->sc_cbustag);
|
|
rman_set_bushandle(rv, bh + rman_get_start(rv));
|
|
if (needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv)) {
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
return (NULL);
|
|
}
|
|
rle->res = rv;
|
|
return (rv);
|
|
}
|
|
|
|
static int
|
|
sbus_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
|
|
if (type == SYS_RES_IRQ) {
|
|
return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
|
|
child, type, rid, r));
|
|
}
|
|
return (rman_activate_resource(r));
|
|
}
|
|
|
|
static int
|
|
sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
|
|
if (type == SYS_RES_IRQ) {
|
|
return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
|
|
child, type, rid, r));
|
|
}
|
|
return (rman_deactivate_resource(r));
|
|
}
|
|
|
|
static int
|
|
sbus_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
struct resource_list_entry *rle;
|
|
int error = 0;
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
error = BUS_RELEASE_RESOURCE(device_get_parent(bus), child,
|
|
type, rid, r);
|
|
else {
|
|
if ((rman_get_flags(r) & RF_ACTIVE) != 0)
|
|
error = bus_deactivate_resource(child, type, rid, r);
|
|
if (error != 0)
|
|
return (error);
|
|
error = rman_release_resource(r);
|
|
}
|
|
if (error != 0)
|
|
return (error);
|
|
sdi = device_get_ivars(child);
|
|
rle = resource_list_find(&sdi->sdi_rl, type, rid);
|
|
if (rle == NULL)
|
|
panic("sbus_release_resource: can't find resource");
|
|
if (rle->res == NULL)
|
|
panic("sbus_release_resource: resource entry is not busy");
|
|
rle->res = NULL;
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Handle an overtemp situation.
|
|
*
|
|
* SPARCs have temperature sensors which generate interrupts
|
|
* if the machine's temperature exceeds a certain threshold.
|
|
* This handles the interrupt and powers off the machine.
|
|
* The same needs to be done to PCI controller drivers.
|
|
*/
|
|
static void
|
|
sbus_overtemp(void *arg)
|
|
{
|
|
|
|
printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
|
|
shutdown_nice(RB_POWEROFF);
|
|
}
|
|
|
|
/* Try to shut down in time in case of power failure. */
|
|
static void
|
|
sbus_pwrfail(void *arg)
|
|
{
|
|
|
|
printf("Power failure detected\nShutting down NOW.\n");
|
|
shutdown_nice(0);
|
|
}
|
|
|
|
static bus_space_tag_t
|
|
sbus_alloc_bustag(struct sbus_softc *sc)
|
|
{
|
|
bus_space_tag_t sbt;
|
|
|
|
sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
|
|
M_NOWAIT | M_ZERO);
|
|
if (sbt == NULL)
|
|
panic("sbus_alloc_bustag: out of memory");
|
|
|
|
bzero(sbt, sizeof *sbt);
|
|
sbt->bst_cookie = sc;
|
|
sbt->bst_parent = sc->sc_bustag;
|
|
sbt->bst_type = SBUS_BUS_SPACE;
|
|
return (sbt);
|
|
}
|